From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 476E9C3A5A0 for ; Mon, 19 Aug 2019 17:44:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1DEF722CEB for ; Mon, 19 Aug 2019 17:44:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1566236693; bh=rPPSTeREMOhM63OX8aLIOnM2/PMOvXNBAI0oNNX3lOw=; h=Date:From:To:Cc:Subject:References:In-Reply-To:List-ID:From; b=JJYcd91Ny4ZsfhVfNT2tIKKF9SUZWG61LqT6S8UcvVGi/WCUzAd/yZEfRZ/yuBtXE xw2F3Zds7wQbtrRwVov9Qt1EUMM+PsDI8qu6qfZvQ4/x2gjnLo3YvzH8xVnucMwFIo zbuC7HbXw/834c6pvdddO/u4o5yCiuPudGxHX+dw= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727653AbfHSRow (ORCPT ); Mon, 19 Aug 2019 13:44:52 -0400 Received: from mail.kernel.org ([198.145.29.99]:37930 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726959AbfHSRow (ORCPT ); Mon, 19 Aug 2019 13:44:52 -0400 Received: from localhost (unknown [122.182.221.154]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8C7A222CE9; Mon, 19 Aug 2019 17:44:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1566236691; bh=rPPSTeREMOhM63OX8aLIOnM2/PMOvXNBAI0oNNX3lOw=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=WdDYjY24LNIR7Pu5+mFd2nykuuMNPakuP2uc743zn72ovmdu4/5T87rsuGW9Faa/g u48DyNjZ6BHeVxMuEPwpkDiiRu4gws8CrSj0N9dCNZIDt1dPCQF3w3BaAy7w+XRjH0 kObAyXSKUDaRHoWFmj4y8fvDr7kEkvuFN+MwChGE= Date: Mon, 19 Aug 2019 23:13:31 +0530 From: Vinod Koul To: Stephen Boyd Cc: Andy Gross , linux-arm-msm@vger.kernel.org, Bjorn Andersson , sibis@codeaurora.org, Rob Herring , Mark Rutland , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 10/22] arm64: dts: qcom: pm8150b: Add pon and adc nodes Message-ID: <20190819174331.GN12733@vkoul-mobl.Dlink> References: <20190814125012.8700-1-vkoul@kernel.org> <20190814125012.8700-11-vkoul@kernel.org> <20190814170803.DEFCC214DA@mail.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190814170803.DEFCC214DA@mail.kernel.org> User-Agent: Mutt/1.11.3 (2019-02-01) Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 14-08-19, 10:08, Stephen Boyd wrote: > Quoting Vinod Koul (2019-08-14 05:50:00) > > Add the pon and adc nodes found in pm8150b PMIC. > > > > Signed-off-by: Vinod Koul > > --- > > arch/arm64/boot/dts/qcom/pm8150b.dtsi | 54 +++++++++++++++++++++++++++ > > 1 file changed, 54 insertions(+) > > Squash? Ok > > > > > diff --git a/arch/arm64/boot/dts/qcom/pm8150b.dtsi b/arch/arm64/boot/dts/qcom/pm8150b.dtsi > > index c0a678b0f159..846197bd65cd 100644 > > --- a/arch/arm64/boot/dts/qcom/pm8150b.dtsi > > +++ b/arch/arm64/boot/dts/qcom/pm8150b.dtsi > > @@ -2,6 +2,7 @@ > > // Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. > > // Copyright (c) 2019, Linaro Limited > > > > +#include > > #include > > #include > > > > @@ -11,6 +12,59 @@ > > reg = <0x2 SPMI_USID>; > > #address-cells = <1>; > > #size-cells = <0>; > > + > > + pon@800 { > > Maybe pon node name should be 'key' or 'power-on'? pon stands for power on device. See Documentation/devicetree/bindings/power/reset/qcom,pon.txt > > > + compatible = "qcom,pm8916-pon"; > > + reg = <0x0800>; > > + }; > > + > > + adc@3100 { > > + compatible = "qcom,spmi-adc5"; > > + reg = <0x3100>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + #io-channel-cells = <1>; > > + interrupts = <0x2 0x31 0x0 IRQ_TYPE_EDGE_RISING>; > > + > > + ref-gnd@0 { > > + reg = ; > > + qcom,pre-scaling = <1 1>; > > + label = "ref_gnd"; > > + }; > > + > > + vref-1p25@1 { > > + reg = ; > > + qcom,pre-scaling = <1 1>; > > + label = "vref_1p25"; > > + }; > > + > > + die-temp@6 { > > + reg = ; > > + qcom,pre-scaling = <1 1>; > > + label = "die_temp"; > > + }; > > + > > + chg-temp@9 { > > + reg = ; > > + qcom,pre-scaling = <1 1>; > > + label = "chg_temp"; > > + }; > > + > > + smb1390-therm@14 { > > + reg = ; > > + qcom,hw-settle-time = <200>; > > + qcom,pre-scaling = <1 1>; > > + label = "smb1390_therm"; > > + }; > > + > > + smb1355-therm@78 { > > + reg = ; > > + qcom,ratiometric; > > + qcom,hw-settle-time = <200>; > > + qcom,pre-scaling = <1 1>; > > + label = "smb1355_therm"; > > + }; > > Again, are these board level details? Maybe should be provided here with > status = "disabled" and then added by the boards that use these ADCs. Sure I will update these -- ~Vinod