From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2BC62C3276C for ; Thu, 2 Jan 2020 18:01:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 048C820866 for ; Thu, 2 Jan 2020 18:01:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728011AbgABSBt (ORCPT ); Thu, 2 Jan 2020 13:01:49 -0500 Received: from foss.arm.com ([217.140.110.172]:49046 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727890AbgABSBt (ORCPT ); Thu, 2 Jan 2020 13:01:49 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A0DBB328; Thu, 2 Jan 2020 10:01:48 -0800 (PST) Received: from arrakis.emea.arm.com (arrakis.cambridge.arm.com [10.1.197.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BC4A73F703; Thu, 2 Jan 2020 10:01:47 -0800 (PST) Date: Thu, 2 Jan 2020 18:01:45 +0000 From: Catalin Marinas To: Srinivas Ramana Cc: will@kernel.org, maz@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: Re: [PATCH] arm64: Set SSBS for user threads while creation Message-ID: <20200102180145.GE27940@arrakis.emea.arm.com> References: <1577106146-8999-1-git-send-email-sramana@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1577106146-8999-1-git-send-email-sramana@codeaurora.org> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Mon, Dec 23, 2019 at 06:32:26PM +0530, Srinivas Ramana wrote: > Current SSBS implementation takes care of setting the > SSBS bit in start_thread() for user threads. While this works > for tasks launched with fork/clone followed by execve, for cases > where userspace would just call fork (eg, Java applications) this > leaves the SSBS bit unset. This results in performance > regression for such tasks. > > It is understood that commit cbdf8a189a66 ("arm64: Force SSBS > on context switch") masks this issue, but that was done for a > different reason where heterogeneous CPUs(both SSBS supported > and unsupported) are present. It is appropriate to take care > of the SSBS bit for all threads while creation itself. > > Fixes: 8f04e8e6e29c ("arm64: ssbd: Add support for PSTATE.SSBS rather than trapping to EL3") > Signed-off-by: Srinivas Ramana I suppose the parent process cleared SSBS explicitly. Isn't the child after fork() supposed to be nearly identical to the parent? If we did as you suggest, someone else might complain that SSBS has been set in the child after fork(). I think the fix is for user space to set SSBS in the child if it no longer needs it. -- Catalin