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From: Matthias Kaehlcke <mka@chromium.org>
To: Roja Rani Yarubandi <rojay@codeaurora.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	akashast@codeaurora.org, msavaliy@qti.qualcomm.com,
	mgautam@codeaurora.org, skakit@codeaurora.org,
	Andy Gross <agross@kernel.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Jiri Slaby <jslaby@suse.com>,
	linux-arm-msm@vger.kernel.org, linux-serial@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Douglas Anderson <dianders@chromium.org>
Subject: Re: [PATCH v2 1/1] tty: serial: qcom_geni_serial: Configure UART_IO_MACRO_CTRL register
Date: Thu, 23 Jan 2020 09:32:50 -0800	[thread overview]
Message-ID: <20200123173250.GX89495@google.com> (raw)
In-Reply-To: <20200123124802.24862-2-rojay@codeaurora.org>

Hi Roja,

On Thu, Jan 23, 2020 at 06:18:02PM +0530, Roja Rani Yarubandi wrote:

> subject: tty: serial: qcom_geni_serial: Configure UART_IO_MACRO_CTRL register

Something like 'Support pin swapping' would be more useful.

> Configure UART_IO_MACRO_CTRL register if UART lines are swapped.
> 
> Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org>
> ---
>  drivers/tty/serial/qcom_geni_serial.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c
> index ff63728a95f4..24b862937c1e 100644
> --- a/drivers/tty/serial/qcom_geni_serial.c
> +++ b/drivers/tty/serial/qcom_geni_serial.c
> @@ -24,6 +24,7 @@
>  
>  /* UART specific GENI registers */
>  #define SE_UART_LOOPBACK_CFG		0x22c
> +#define SE_UART_IO_MACRO_CTRL		0x240
>  #define SE_UART_TX_TRANS_CFG		0x25c
>  #define SE_UART_TX_WORD_LEN		0x268
>  #define SE_UART_TX_STOP_BIT_LEN		0x26c
> @@ -1260,6 +1261,7 @@ static int qcom_geni_serial_probe(struct platform_device *pdev)
>  	int irq;
>  	bool console = false;
>  	struct uart_driver *drv;
> +	u32 val;
>  
>  	if (of_device_is_compatible(pdev->dev.of_node, "qcom,geni-debug-uart"))
>  		console = true;
> @@ -1309,6 +1311,10 @@ static int qcom_geni_serial_probe(struct platform_device *pdev)
>  		return irq;
>  	uport->irq = irq;
>  
> +	ret = of_property_read_u32(pdev->dev.of_node, "qcom,pin_inverse", &val);
> +	if (!ret)
> +		writel(val, uport->membase + SE_UART_IO_MACRO_CTRL);
> +

Which pins are/can be inversed only RX/TX or also CTS/RTS? If both pairs can be
inversed individually it would be nice to support that.

As Bjorn commented, it's probably better to have boolean properties and keep the
magic values in the driver.

      parent reply	other threads:[~2020-01-23 17:32 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-23 12:48 [PATCH v2 0/1] tty: serial: qcom_geni_serial: Configure UART_IO_MACRO_CTRL register Roja Rani Yarubandi
2020-01-23 12:48 ` [PATCH v2 1/1] " Roja Rani Yarubandi
2020-01-23 13:44   ` Greg Kroah-Hartman
2020-01-23 16:08   ` Bjorn Andersson
2020-01-23 17:32   ` Matthias Kaehlcke [this message]

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