Re: [PATCH v2 00/40] PCI: dwc: Driver clean-ups

Rob Herring
2020-09-29T14:32:31Z

On Tue, Sep 29, 2020 at 12:24 AM Kishon Vijay Abraham I <kishon@ti.com> wrote:
>
> Hi,
>
> On 16/09/20 1:24 pm, Michael Walle wrote:
> > Am 2020-09-16 00:02, schrieb Rob Herring:
> >> Can you try this? The link up check seemed unnecessary as it is racy.
> >> What happens if the link goes down right after checking? That's the
> >> only thing in the change that sticks out.
> >>
> >> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c
> >> b/drivers/pci/controller/dwc/pcie-designware-host.c
> >> index 317ff512f8df..afee1a0e8883 100644
> >> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> >> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> >> @@ -441,6 +441,9 @@ static void __iomem
> >> *dw_pcie_other_conf_map_bus(struct pci_bus *bus,
> >> struct pcie_port *pp = bus->sysdata;
> >> struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> >>
> >> + if (!dw_pcie_link_up(pci))
> >> + return NULL;
> >> +
> >> busdev = PCIE_ATU_BUS(bus->number) |
> >> PCIE_ATU_DEV(PCI_SLOT(devfn)) |
> >> PCIE_ATU_FUNC(PCI_FUNC(devfn));
> >
> > This will fix the issue.
>
> This fix is required to get DRA7 EVM booting again in linux-next.

Did you see the discussion here[1]? Is firmware setting up the same
register in question?

Rob

[1] http://lore.kernel.org/r/HE1PR0402MB33713A623A37D08AE3253DEB84320@HE1PR0402MB3371.eurprd04.prod.outlook.com