From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 414F9C43461 for ; Tue, 1 Sep 2020 04:58:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1E0EC20FC3 for ; Tue, 1 Sep 2020 04:58:38 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ewhD6ICQ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726247AbgIAE6e (ORCPT ); Tue, 1 Sep 2020 00:58:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41356 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726006AbgIAE6c (ORCPT ); Tue, 1 Sep 2020 00:58:32 -0400 Received: from mail-oo1-xc41.google.com (mail-oo1-xc41.google.com [IPv6:2607:f8b0:4864:20::c41]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E92CEC0612A0 for ; Mon, 31 Aug 2020 21:58:31 -0700 (PDT) Received: by mail-oo1-xc41.google.com with SMTP id m25so5965oou.0 for ; Mon, 31 Aug 2020 21:58:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=KPPzOd4S5Oo6nrlND6IQthNcXuqMvh5LHpQP3YI6R7E=; b=ewhD6ICQ1SgoLstQajN77CTLdULS5zqw29h2elkj+FHI9pa8i71+BVMpzhUK55smit 3jBeMp15emblXj28HqSsOsSgGW/dxzOMuwE7RPMBpKTjhkkdBrxnRQyC93Bhne39doZA eJ2j+2x8Wqy6LhKXTLO2qn/WBg6JlOeq/DRZJ/MfsR6NzpIEGcrXoKgfUzjvf+SHr4+M plydV6o9K36XCe68xzcV1cS6mSQdBWqR2/U4OrfBELAOCgRIdLkjnCWkdStBrov03UMm Pt3TpFnNv+w4h+ANHqAy/KhOTUvsymm4StXmKv2fEj2XiEJcayiyMzfvji6NcEwpz/6D fOsQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=KPPzOd4S5Oo6nrlND6IQthNcXuqMvh5LHpQP3YI6R7E=; b=eJoQatEH4pK8iqxxToq4mfdcJo8dxYtJhEYLr8DINByuXtVXXPBMwKxkQvcoqLFSHC /a2HoEMo/Zb6dLp0wQZNNFR4XTuFDhzsBF0fmEWUd5gJIMXta0nJVyhTsF6ln9miVq8+ yXGA2o2nIcVSfDp0gS9K6Lqlr+E1zsLEXKYklVK+EQRs3ae0lLuJPf11s46oUla7moLs 51100UdjCQYSUDPzVbMfYV2FVILlP+hr2FNL4SyaW7m9dgNLJt+sIbw38vxaMRd2cYrT I78+SM2eXB/pyG58cw6Fw0BYc6UQZXgkn55Ls8boVD973v5O2zMi1sTwA1nIBQq53AML H/9Q== X-Gm-Message-State: AOAM533vVg+QomoLDar86LoOeqEHsbn5/8sgcE0UTHJ4sR9gCyzP2pZV NMoxkeRYs5YNmrd2EuQsY24wHQ== X-Google-Smtp-Source: ABdhPJxrPBozUfI+nlt0nkFZ4l7dT06KTI3ftv7H/ltBoqgGY1jMGlNRVE8cvXIGCulF5qGLIxFSxw== X-Received: by 2002:a4a:9622:: with SMTP id q31mr3138001ooi.78.1598936311137; Mon, 31 Aug 2020 21:58:31 -0700 (PDT) Received: from yoga ([2605:6000:e5cb:c100:8898:14ff:fe6d:34e]) by smtp.gmail.com with ESMTPSA id 126sm31576oof.28.2020.08.31.21.58.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Aug 2020 21:58:30 -0700 (PDT) Date: Mon, 31 Aug 2020 23:58:27 -0500 From: Bjorn Andersson To: Rob Clark Cc: dri-devel@lists.freedesktop.org, iommu@lists.linux-foundation.org, linux-arm-msm@vger.kernel.org, Sai Prakash Ranjan , Will Deacon , freedreno@lists.freedesktop.org, Sibi Sankar , Vivek Gautam , Stephen Boyd , Robin Murphy , Joerg Roedel , linux-arm-kernel@lists.infradead.org, Rob Clark , Sean Paul , David Airlie , Daniel Vetter , Jordan Crouse , Jonathan Marek , Shawn Guo , Sharat Masetty , AngeloGioacchino Del Regno , open list Subject: Re: [PATCH 07/19] drm/msm: set adreno_smmu as gpu's drvdata Message-ID: <20200901045827.GP3715@yoga> References: <20200810222657.1841322-1-jcrouse@codeaurora.org> <20200814024114.1177553-8-robdclark@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200814024114.1177553-8-robdclark@gmail.com> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote: > From: Rob Clark > > This will be populated by adreno-smmu, to provide a way for coordinating > enabling/disabling TTBR0 translation. > Reviewed-by: Bjorn Andersson > Signed-off-by: Rob Clark > --- > drivers/gpu/drm/msm/adreno/adreno_device.c | 2 -- > drivers/gpu/drm/msm/msm_gpu.c | 2 +- > drivers/gpu/drm/msm/msm_gpu.h | 6 +++++- > 3 files changed, 6 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c > index 26664e1b30c0..58e03b20e1c7 100644 > --- a/drivers/gpu/drm/msm/adreno/adreno_device.c > +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c > @@ -417,8 +417,6 @@ static int adreno_bind(struct device *dev, struct device *master, void *data) > return PTR_ERR(gpu); > } > > - dev_set_drvdata(dev, gpu); > - > return 0; > } > > diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c > index 6aa9e04e52e7..806eb0957280 100644 > --- a/drivers/gpu/drm/msm/msm_gpu.c > +++ b/drivers/gpu/drm/msm/msm_gpu.c > @@ -892,7 +892,7 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev, > gpu->gpu_cx = NULL; > > gpu->pdev = pdev; > - platform_set_drvdata(pdev, gpu); > + platform_set_drvdata(pdev, &gpu->adreno_smmu); > > msm_devfreq_init(gpu); > > diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h > index 8bda7beaed4b..f91b141add75 100644 > --- a/drivers/gpu/drm/msm/msm_gpu.h > +++ b/drivers/gpu/drm/msm/msm_gpu.h > @@ -7,6 +7,7 @@ > #ifndef __MSM_GPU_H__ > #define __MSM_GPU_H__ > > +#include > #include > #include > #include > @@ -73,6 +74,8 @@ struct msm_gpu { > struct platform_device *pdev; > const struct msm_gpu_funcs *funcs; > > + struct adreno_smmu_priv adreno_smmu; > + > /* performance counters (hw & sw): */ > spinlock_t perf_lock; > bool perfcntr_active; > @@ -143,7 +146,8 @@ struct msm_gpu { > > static inline struct msm_gpu *dev_to_gpu(struct device *dev) > { > - return dev_get_drvdata(dev); > + struct adreno_smmu_priv *adreno_smmu = dev_get_drvdata(dev); > + return container_of(adreno_smmu, struct msm_gpu, adreno_smmu); > } > > /* It turns out that all targets use the same ringbuffer size */ > -- > 2.26.2 >