From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Subject: [PATCH 2/2] arm64: dts: qcom: qrb5165-rb5: switch into using GPIO for SPI0 CS
Date: Thu, 4 Feb 2021 23:49:04 +0300 [thread overview]
Message-ID: <20210204204904.294555-2-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20210204204904.294555-1-dmitry.baryshkov@linaro.org>
GENI SPI controller shows several issues if it manages the CS on its own
(see 37dd4b777942 ("arm64: dts: qcom: sc7180: Provide pinconf for SPI to
use GPIO for CS")) for the details. Configure SPI0 CS pin as a GPIO.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
index 50f94460c970..6098ccba85de 100644
--- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
+++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
@@ -1129,6 +1129,8 @@ &slpi {
/* CAN */
&spi0 {
status = "okay";
+ pinctrl-0 = <&qup_spi0_cs_gpio>;
+ cs-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>;
can@0 {
compatible = "microchip,mcp2518fd";
--
2.30.0
next prev parent reply other threads:[~2021-02-04 20:50 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-04 20:49 [PATCH 1/2] arm64: dts: qcom: sm8250: add pinctrl for SPI using GPIO as a CS Dmitry Baryshkov
2021-02-04 20:49 ` Dmitry Baryshkov [this message]
2021-02-04 23:07 ` Bjorn Andersson
2021-02-04 23:31 ` Doug Anderson
2021-02-05 0:08 ` Dmitry Baryshkov
2021-02-05 0:25 ` Bjorn Andersson
2021-02-05 15:00 ` Doug Anderson
2021-02-05 16:48 ` Bjorn Andersson
2021-02-08 15:58 ` Doug Anderson
2021-02-08 18:04 ` Bjorn Andersson
2021-02-09 10:21 ` Dmitry Baryshkov
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