From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3AECFC433B4 for ; Fri, 21 May 2021 13:52:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1DEF5611AD for ; Fri, 21 May 2021 13:52:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235512AbhEUNxt (ORCPT ); Fri, 21 May 2021 09:53:49 -0400 Received: from mail.kernel.org ([198.145.29.99]:52594 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231349AbhEUNxs (ORCPT ); Fri, 21 May 2021 09:53:48 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 191086008E; Fri, 21 May 2021 13:52:21 +0000 (UTC) Date: Fri, 21 May 2021 19:22:18 +0530 From: Manivannan Sadhasivam To: Bhaumik Bhatt Cc: linux-arm-msm@vger.kernel.org, hemantk@codeaurora.org, jhugo@codeaurora.org, linux-kernel@vger.kernel.org, loic.poulain@linaro.org, linux-wireless@vger.kernel.org, kvalo@codeaurora.org, ath11k@lists.infradead.org Subject: Re: [PATCH v4 5/6] bus: mhi: pci_generic: Set register access length for MHI driver Message-ID: <20210521135218.GM70095@thinkpad> References: <1620330705-40192-1-git-send-email-bbhatt@codeaurora.org> <1620330705-40192-6-git-send-email-bbhatt@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1620330705-40192-6-git-send-email-bbhatt@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Thu, May 06, 2021 at 12:51:44PM -0700, Bhaumik Bhatt wrote: > MHI driver requires register space length to add range checks and > prevent memory region accesses outside of that for MMIO space. > Set it from the PCI generic controller driver before registering > the MHI controller. > > Signed-off-by: Bhaumik Bhatt > Reviewed-by: Hemant Kumar > Reviewed-by: Loic Poulain Reviewed-by: Manivannan Sadhasivam Thanks, Mani > --- > drivers/bus/mhi/pci_generic.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c > index 7c810f0..fb7889f 100644 > --- a/drivers/bus/mhi/pci_generic.c > +++ b/drivers/bus/mhi/pci_generic.c > @@ -463,6 +463,7 @@ static int mhi_pci_claim(struct mhi_controller *mhi_cntrl, > return err; > } > mhi_cntrl->regs = pcim_iomap_table(pdev)[bar_num]; > + mhi_cntrl->reg_len = pci_resource_len(pdev, bar_num); > > err = pci_set_dma_mask(pdev, dma_mask); > if (err) { > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, > a Linux Foundation Collaborative Project >