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From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Bjorn Andersson <bjorn.andersson@linaro.org>,
	Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
	Abhinav Kumar <abhinavk@codeaurora.org>
Cc: Jonathan Marek <jonathan@marek.ca>,
	Stephen Boyd <sboyd@kernel.org>, David Airlie <airlied@linux.ie>,
	Daniel Vetter <daniel@ffwll.ch>,
	linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	freedreno@lists.freedesktop.org
Subject: [PATCH v2 13/22] drm/msm/dpu: drop src_split and multirect check from dpu_crtc_atomic_check
Date: Mon,  5 Jul 2021 04:21:06 +0300	[thread overview]
Message-ID: <20210705012115.4179824-14-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20210705012115.4179824-1-dmitry.baryshkov@linaro.org>

Neither source split nor multirect are properly supported at this
moment. Both of these checks depend on zpos being equal for several
planes (which is a clear userspace bug). Drop these checks to simplify
dpu_crtc_atomic_check(). The actual support for either of these features
is not removed from the backend code (sspp, ctl, etc).

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 128 +----------------------
 1 file changed, 4 insertions(+), 124 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index 6fe0af9ffc23..f311cdbfe7d2 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -895,12 +895,8 @@ static int dpu_crtc_atomic_check(struct drm_crtc *crtc,
 	struct drm_plane *plane;
 	struct drm_display_mode *mode;
 
-	int cnt = 0, rc = 0, mixer_width = 0, i, z_pos;
+	int cnt = 0, rc = 0, i;
 
-	struct dpu_multirect_plane_states multirect_plane[DPU_STAGE_MAX * 2];
-	int multirect_count = 0;
-	const struct drm_plane_state *pipe_staged[SSPP_MAX];
-	int left_zpos_cnt = 0, right_zpos_cnt = 0;
 	struct drm_rect crtc_rect = { 0 };
 
 	pstates = kzalloc(sizeof(*pstates) * DPU_STAGE_MAX * 4, GFP_KERNEL);
@@ -920,13 +916,8 @@ static int dpu_crtc_atomic_check(struct drm_crtc *crtc,
 	if (crtc_state->active_changed)
 		crtc_state->mode_changed = true;
 
-	memset(pipe_staged, 0, sizeof(pipe_staged));
-
-	if (cstate->num_mixers) {
-		mixer_width = mode->hdisplay / cstate->num_mixers;
-
+	if (cstate->num_mixers)
 		_dpu_crtc_setup_lm_bounds(crtc, crtc_state);
-	}
 
 	crtc_rect.x2 = mode->hdisplay;
 	crtc_rect.y2 = mode->vdisplay;
@@ -947,18 +938,8 @@ static int dpu_crtc_atomic_check(struct drm_crtc *crtc,
 		pstates[cnt].dpu_pstate = to_dpu_plane_state(pstate);
 		pstates[cnt].drm_pstate = pstate;
 		pstates[cnt].stage = pstate->normalized_zpos;
-		pstates[cnt].pipe_id = dpu_plane_pipe(plane);
 
-		if (pipe_staged[pstates[cnt].pipe_id]) {
-			multirect_plane[multirect_count].r0 =
-				pipe_staged[pstates[cnt].pipe_id];
-			multirect_plane[multirect_count].r1 = pstate;
-			multirect_count++;
-
-			pipe_staged[pstates[cnt].pipe_id] = NULL;
-		} else {
-			pipe_staged[pstates[cnt].pipe_id] = pstate;
-		}
+		dpu_plane_clear_multirect(pstate);
 
 		cnt++;
 
@@ -973,19 +954,8 @@ static int dpu_crtc_atomic_check(struct drm_crtc *crtc,
 		}
 	}
 
-	for (i = 1; i < SSPP_MAX; i++) {
-		if (pipe_staged[i])
-			dpu_plane_clear_multirect(pipe_staged[i]);
-	}
-
-	z_pos = -1;
 	for (i = 0; i < cnt; i++) {
-		/* reset counts at every new blend stage */
-		if (pstates[i].stage != z_pos) {
-			left_zpos_cnt = 0;
-			right_zpos_cnt = 0;
-			z_pos = pstates[i].stage;
-		}
+		int z_pos = pstates[i].stage;
 
 		/* verify z_pos setting before using it */
 		if (z_pos >= DPU_STAGE_MAX - DPU_STAGE_0) {
@@ -993,40 +963,12 @@ static int dpu_crtc_atomic_check(struct drm_crtc *crtc,
 					DPU_STAGE_MAX - DPU_STAGE_0);
 			rc = -EINVAL;
 			goto end;
-		} else if (pstates[i].drm_pstate->crtc_x < mixer_width) {
-			if (left_zpos_cnt == 2) {
-				DPU_ERROR("> 2 planes @ stage %d on left\n",
-					z_pos);
-				rc = -EINVAL;
-				goto end;
-			}
-			left_zpos_cnt++;
-
-		} else {
-			if (right_zpos_cnt == 2) {
-				DPU_ERROR("> 2 planes @ stage %d on right\n",
-					z_pos);
-				rc = -EINVAL;
-				goto end;
-			}
-			right_zpos_cnt++;
 		}
 
 		pstates[i].dpu_pstate->stage = z_pos + DPU_STAGE_0;
 		DRM_DEBUG_ATOMIC("%s: zpos %d\n", dpu_crtc->name, z_pos);
 	}
 
-	for (i = 0; i < multirect_count; i++) {
-		if (dpu_plane_validate_multirect_v2(&multirect_plane[i])) {
-			DPU_ERROR(
-			"multirect validation failed for planes (%d - %d)\n",
-					multirect_plane[i].r0->plane->base.id,
-					multirect_plane[i].r1->plane->base.id);
-			rc = -EINVAL;
-			goto end;
-		}
-	}
-
 	atomic_inc(&_dpu_crtc_get_kms(crtc)->bandwidth_ref);
 
 	rc = dpu_core_perf_crtc_check(crtc, crtc_state);
@@ -1036,68 +978,6 @@ static int dpu_crtc_atomic_check(struct drm_crtc *crtc,
 		goto end;
 	}
 
-	/* validate source split:
-	 * use pstates sorted by stage to check planes on same stage
-	 * we assume that all pipes are in source split so its valid to compare
-	 * without taking into account left/right mixer placement
-	 */
-	for (i = 1; i < cnt; i++) {
-		struct plane_state *prv_pstate, *cur_pstate;
-		struct drm_rect left_rect, right_rect;
-		int32_t left_pid, right_pid;
-		int32_t stage;
-
-		prv_pstate = &pstates[i - 1];
-		cur_pstate = &pstates[i];
-		if (prv_pstate->stage != cur_pstate->stage)
-			continue;
-
-		stage = cur_pstate->stage;
-
-		left_pid = prv_pstate->dpu_pstate->base.plane->base.id;
-		left_rect = drm_plane_state_dest(prv_pstate->drm_pstate);
-
-		right_pid = cur_pstate->dpu_pstate->base.plane->base.id;
-		right_rect = drm_plane_state_dest(cur_pstate->drm_pstate);
-
-		if (right_rect.x1 < left_rect.x1) {
-			swap(left_pid, right_pid);
-			swap(left_rect, right_rect);
-		}
-
-		/**
-		 * - planes are enumerated in pipe-priority order such that
-		 *   planes with lower drm_id must be left-most in a shared
-		 *   blend-stage when using source split.
-		 * - planes in source split must be contiguous in width
-		 * - planes in source split must have same dest yoff and height
-		 */
-		if (right_pid < left_pid) {
-			DPU_ERROR(
-				"invalid src split cfg. priority mismatch. stage: %d left: %d right: %d\n",
-				stage, left_pid, right_pid);
-			rc = -EINVAL;
-			goto end;
-		} else if (right_rect.x1 != drm_rect_width(&left_rect)) {
-			DPU_ERROR("non-contiguous coordinates for src split. "
-				  "stage: %d left: " DRM_RECT_FMT " right: "
-				  DRM_RECT_FMT "\n", stage,
-				  DRM_RECT_ARG(&left_rect),
-				  DRM_RECT_ARG(&right_rect));
-			rc = -EINVAL;
-			goto end;
-		} else if (left_rect.y1 != right_rect.y1 ||
-			   drm_rect_height(&left_rect) != drm_rect_height(&right_rect)) {
-			DPU_ERROR("source split at stage: %d. invalid "
-				  "yoff/height: left: " DRM_RECT_FMT " right: "
-				  DRM_RECT_FMT "\n", stage,
-				  DRM_RECT_ARG(&left_rect),
-				  DRM_RECT_ARG(&right_rect));
-			rc = -EINVAL;
-			goto end;
-		}
-	}
-
 end:
 	kfree(pstates);
 	return rc;
-- 
2.30.2


  parent reply	other threads:[~2021-07-05  1:25 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-05  1:20 [PATCH v2 00/22] drm/msm/dpu: switch dpu_plane to be virtual Dmitry Baryshkov
2021-07-05  1:20 ` [PATCH v2 01/22] drm/msm/dpu: move LUT levels out of QOS config Dmitry Baryshkov
2021-07-05  1:20 ` [PATCH v2 02/22] drm/msm/dpu: remove pipe_qos_cfg from struct dpu_plane Dmitry Baryshkov
2021-07-05  1:20 ` [PATCH v2 03/22] drm/msm/dpu: drop pipe_name " Dmitry Baryshkov
2021-07-05  1:20 ` [PATCH v2 04/22] drm/msm/dpu: remove stage_cfg from struct dpu_crtc Dmitry Baryshkov
2021-07-05  1:20 ` [PATCH v2 05/22] drm/msm/dpu: rip out master planes support Dmitry Baryshkov
2021-07-05  1:20 ` [PATCH v2 06/22] drm/msm/dpu: move dpu_hw_pipe_cfg out of struct dpu_plane Dmitry Baryshkov
2021-07-05  1:21 ` [PATCH v2 07/22] drm/msm/dpu: drop scaler config from plane state Dmitry Baryshkov
2021-07-05  1:21 ` [PATCH v2 08/22] drm/msm/dpu: drop dpu_csc_cfg from dpu_plane Dmitry Baryshkov
2021-07-05  1:21 ` [PATCH v2 09/22] drm/msm/dpu: remove dpu_hw_pipe_cdp_cfg " Dmitry Baryshkov
2021-07-05  1:21 ` [PATCH v2 10/22] drm/msm/dpu: don't cache pipe->cap->features in dpu_plane Dmitry Baryshkov
2021-07-05  1:21 ` [PATCH v2 11/22] drm/msm/dpu: don't cache pipe->cap->sblk " Dmitry Baryshkov
2021-07-05  1:21 ` [PATCH v2 12/22] drm/msm/dpu: rip out debugfs support from dpu_plane Dmitry Baryshkov
2021-07-05  1:21 ` Dmitry Baryshkov [this message]
2021-07-05  1:21 ` [PATCH v2 14/22] drm/msm/dpu: add list of supported formats to the DPU caps Dmitry Baryshkov
2021-11-09 20:05   ` [Freedreno] " abhinavk
2021-07-05  1:21 ` [PATCH v2 15/22] drm/msm/dpu: simplify DPU_SSPP features checks Dmitry Baryshkov
2021-11-09 20:06   ` [Freedreno] " abhinavk
2021-07-05  1:21 ` [PATCH v2 16/22] drm/msm/dpu: do not limit the zpos property Dmitry Baryshkov
2021-11-09 20:15   ` [Freedreno] " abhinavk
2021-11-09 20:21     ` Dmitry Baryshkov
2021-11-10  1:35       ` abhinavk
2021-11-10  1:58         ` Dmitry Baryshkov
2021-07-05  1:21 ` [PATCH v2 17/22] drm/msm/dpu: add support for SSPP allocation to RM Dmitry Baryshkov
2021-11-10  0:30   ` [Freedreno] " abhinavk
2021-07-05  1:21 ` [PATCH v2 18/22] drm/msm/dpu: move pipe_hw to dpu_plane_state Dmitry Baryshkov
2021-07-05  1:21 ` [PATCH v2 19/22] drm/msm/dpu: add support for virtualized planes Dmitry Baryshkov
2021-07-05  1:21 ` [PATCH v2 20/22] drm/msm/dpu: fix smart dma support Dmitry Baryshkov
2021-11-10  2:06   ` [Freedreno] " abhinavk
2021-07-05  1:21 ` [PATCH v2 21/22] drm/msm/dpu: fix CDP setup to account for multirect index Dmitry Baryshkov
2021-11-10  2:12   ` [Freedreno] " abhinavk
2021-07-05  1:21 ` [PATCH v2 22/22] drm/msm/dpu: add multirect support Dmitry Baryshkov
2021-11-10  2:22   ` [Freedreno] " abhinavk
2021-09-30  2:19 ` [Freedreno] [PATCH v2 00/22] drm/msm/dpu: switch dpu_plane to be virtual abhinavk
2021-09-30 10:56   ` Dmitry Baryshkov

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