From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: dri-devel@lists.freedesktop.org
Cc: intel-gfx@lists.freedesktop.org, Rob Clark <robdclark@gmail.com>,
Sean Paul <sean@poorly.run>,
Abhinav Kumar <quic_abhinavk@quicinc.com>,
linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org
Subject: [PATCH 11/22] drm/msm: Use drm_mode_init() for on-stack modes
Date: Fri, 18 Feb 2022 12:03:52 +0200 [thread overview]
Message-ID: <20220218100403.7028-12-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20220218100403.7028-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Initialize on-stack modes with drm_mode_init() to guarantee
no stack garbage in the list head, or that we aren't copying
over another mode's list head.
Based on the following cocci script, with manual fixups:
@decl@
identifier M;
expression E;
@@
- struct drm_display_mode M = E;
+ struct drm_display_mode M;
@@
identifier decl.M;
expression decl.E;
statement S, S1;
@@
struct drm_display_mode M;
... when != S
+ drm_mode_init(&M, &E);
+
S1
@@
expression decl.E;
@@
- &*E
+ E
Cc: Rob Clark <robdclark@gmail.com>
Cc: Sean Paul <sean@poorly.run>
Cc: Abhinav Kumar <quic_abhinavk@quicinc.com>
Cc: linux-arm-msm@vger.kernel.org
Cc: freedreno@lists.freedesktop.org
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
index ddd9d89cd456..e7813c6f7bd9 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
@@ -248,12 +248,13 @@ static void dpu_encoder_phys_vid_setup_timing_engine(
unsigned long lock_flags;
struct dpu_hw_intf_cfg intf_cfg = { 0 };
+ drm_mode_init(&mode, &phys_enc->cached_mode);
+
if (!phys_enc->hw_ctl->ops.setup_intf_cfg) {
DPU_ERROR("invalid encoder %d\n", phys_enc != NULL);
return;
}
- mode = phys_enc->cached_mode;
if (!phys_enc->hw_intf->ops.setup_timing_gen) {
DPU_ERROR("timing engine setup is not supported\n");
return;
@@ -652,7 +653,9 @@ static int dpu_encoder_phys_vid_get_frame_count(
{
struct intf_status s = {0};
u32 fetch_start = 0;
- struct drm_display_mode mode = phys_enc->cached_mode;
+ struct drm_display_mode mode;
+
+ drm_mode_init(&mode, &phys_enc->cached_mode);
if (!dpu_encoder_phys_vid_is_master(phys_enc))
return -EINVAL;
--
2.34.1
next prev parent reply other threads:[~2022-02-18 10:05 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-18 10:03 [PATCH 00/22] drm: Review of mode copies Ville Syrjala
2022-02-18 10:03 ` [PATCH 10/22] drm/msm: Nuke weird on stack mode copy Ville Syrjala
2022-03-23 10:19 ` Dmitry Baryshkov
2022-02-18 10:03 ` Ville Syrjala [this message]
2022-03-23 10:11 ` [PATCH 11/22] drm/msm: Use drm_mode_init() for on-stack modes Dmitry Baryshkov
2022-03-23 20:04 ` Abhinav Kumar
2022-02-18 10:03 ` [PATCH 12/22] drm/msm: Use drm_mode_copy() Ville Syrjala
2022-03-23 10:12 ` Dmitry Baryshkov
2022-03-23 20:09 ` Abhinav Kumar
2022-03-14 22:11 ` [PATCH 00/22] drm: Review of mode copies Ville Syrjälä
2022-03-15 18:52 ` Alex Deucher
2022-03-21 22:37 ` Ville Syrjälä
2022-03-23 10:39 ` Dmitry Baryshkov
2022-03-23 15:10 ` Ville Syrjälä
2022-03-23 20:50 ` Abhinav Kumar
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