RE: [PATCH 3/5] iommu: Introduce the domain op enforce_cache_coherency()

Tian, Kevin
2022-04-06T05:41:31Z

> From: Tian, Kevin
> Sent: Wednesday, April 6, 2022 7:32 AM
>
> > From: Jason Gunthorpe <jgg@nvidia.com>
> > Sent: Wednesday, April 6, 2022 6:58 AM
> >
> > On Tue, Apr 05, 2022 at 01:50:36PM -0600, Alex Williamson wrote:
> > > >
> > > > +static bool intel_iommu_enforce_cache_coherency(struct
> > iommu_domain *domain)
> > > > +{
> > > > + struct dmar_domain *dmar_domain = to_dmar_domain(domain);
> > > > +
> > > > + if (!dmar_domain->iommu_snooping)
> > > > + return false;
> > > > + dmar_domain->enforce_no_snoop = true;
> > > > + return true;
> > > > +}
> > >
> > > Don't we have issues if we try to set DMA_PTE_SNP on DMARs that don't
> > > support it, ie. reserved register bit set in pte faults?
> >
> > The way the Intel driver is setup that is not possible. Currently it
> > does:
> >
> > static bool intel_iommu_capable(enum iommu_cap cap)
> > {
> > if (cap == IOMMU_CAP_CACHE_COHERENCY)
> > return domain_update_iommu_snooping(NULL);
> >
> > Which is a global property unrelated to any device.
> >
> > Thus either all devices and all domains support iommu_snooping, or
> > none do.
> >
> > It is unclear because for some reason the driver recalculates this
> > almost constant value on every device attach..
>
> The reason is simply because iommu capability is a global flag 😉

...and intel iommu driver supports hotplug-ed iommu. But in reality this
recalculation is almost a no-op because the only iommu that doesn't
support force snoop is for Intel GPU and built-in in the platform.

>
> when the cap is removed by this series I don't think we need keep that
> global recalculation thing.
>
> Thanks
> Kevin