[PATCH v2 0/3] Small fixes/improvement for hfpll and krait

[PATCH v2 0/3] Small fixes/improvement for hfpll and krait

[Ansuel Smith]

This series has small fixes/improvement to the hfpll and krait clk
driver.

This comes from another series that got split to better facilitate the
merge since it was grown to 21 patches and was getting hard to review.

For hfpll, a conversion to read_poll macro and introduction
of a timeout to prevent a stall.
For krait, a fix for the mux sel logic and an introduction for
8064 errata.

v2:
- Drop patch add hw_parent check for div2_round_rate
- Add extra comments for errata patch

Ansuel Smith (3):
  clk: qcom: clk-hfpll: use poll_timeout macro
  clk: qcom: clk-krait: unlock spin after mux completion
  clk: qcom: clk-krait: add apq/ipq8064 errata workaround

 drivers/clk/qcom/clk-hfpll.c | 15 +++++++++------
 drivers/clk/qcom/clk-krait.c | 23 ++++++++++++++++++++++-
 drivers/clk/qcom/clk-krait.h |  1 +
 drivers/clk/qcom/krait-cc.c  |  8 ++++++++
 4 files changed, 40 insertions(+), 7 deletions(-)

-- 
2.34.1

[PATCH v2 1/3] clk: qcom: clk-hfpll: use poll_timeout macro

[Ansuel Smith]

Use regmap_read_poll_timeout macro instead of do-while structure to tidy
things up. Also set a timeout to prevent any sort of system stall.

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/clk/qcom/clk-hfpll.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/drivers/clk/qcom/clk-hfpll.c b/drivers/clk/qcom/clk-hfpll.c
index e847d586a73a..7dd17c184b69 100644
--- a/drivers/clk/qcom/clk-hfpll.c
+++ b/drivers/clk/qcom/clk-hfpll.c
@@ -72,13 +72,16 @@ static void __clk_hfpll_enable(struct clk_hw *hw)
 	regmap_update_bits(regmap, hd->mode_reg, PLL_RESET_N, PLL_RESET_N);
 
 	/* Wait for PLL to lock. */
-	if (hd->status_reg) {
-		do {
-			regmap_read(regmap, hd->status_reg, &val);
-		} while (!(val & BIT(hd->lock_bit)));
-	} else {
+	if (hd->status_reg)
+		/*
+		 * Busy wait. Should never timeout, we add a timeout to
+		 * prevent any sort of stall.
+		 */
+		regmap_read_poll_timeout(regmap, hd->status_reg, val,
+					 !(val & BIT(hd->lock_bit)), 0,
+					 100 * USEC_PER_MSEC);
+	else
 		udelay(60);
-	}
 
 	/* Enable PLL output. */
 	regmap_update_bits(regmap, hd->mode_reg, PLL_OUTCTRL, PLL_OUTCTRL);
-- 
2.34.1

[PATCH v2 2/3] clk: qcom: clk-krait: unlock spin after mux completion

[Ansuel Smith]

Unlock spinlock after the mux switch is completed to prevent any corner
case of mux request while the switch still needs to be done.

Fixes: 4d7dc77babfe ("clk: qcom: Add support for Krait clocks")
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/clk/qcom/clk-krait.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/qcom/clk-krait.c b/drivers/clk/qcom/clk-krait.c
index 59f1af415b58..90046428693c 100644
--- a/drivers/clk/qcom/clk-krait.c
+++ b/drivers/clk/qcom/clk-krait.c
@@ -32,11 +32,16 @@ static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel)
 		regval |= (sel & mux->mask) << (mux->shift + LPL_SHIFT);
 	}
 	krait_set_l2_indirect_reg(mux->offset, regval);
-	spin_unlock_irqrestore(&krait_clock_reg_lock, flags);
 
 	/* Wait for switch to complete. */
 	mb();
 	udelay(1);
+
+	/*
+	 * Unlock now to make sure the mux register is not
+	 * modified while switching to the new parent.
+	 */
+	spin_unlock_irqrestore(&krait_clock_reg_lock, flags);
 }
 
 static int krait_mux_set_parent(struct clk_hw *hw, u8 index)
-- 
2.34.1

[PATCH v2 3/3] clk: qcom: clk-krait: add apq/ipq8064 errata workaround

[Ansuel Smith]

Add apq/ipq8064 errata workaround where the sec_src clock gating needs to
be disabled during switching. krait-cc compatible is not enough to
handle this and limit this workaround to apq/ipq8064. We check machine
compatible to handle this.

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
 drivers/clk/qcom/clk-krait.c | 16 ++++++++++++++++
 drivers/clk/qcom/clk-krait.h |  1 +
 drivers/clk/qcom/krait-cc.c  |  8 ++++++++
 3 files changed, 25 insertions(+)

diff --git a/drivers/clk/qcom/clk-krait.c b/drivers/clk/qcom/clk-krait.c
index 90046428693c..45da736bd5f4 100644
--- a/drivers/clk/qcom/clk-krait.c
+++ b/drivers/clk/qcom/clk-krait.c
@@ -18,13 +18,23 @@
 static DEFINE_SPINLOCK(krait_clock_reg_lock);
 
 #define LPL_SHIFT	8
+#define SECCLKAGD	BIT(4)
+
 static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel)
 {
 	unsigned long flags;
 	u32 regval;
 
 	spin_lock_irqsave(&krait_clock_reg_lock, flags);
+
 	regval = krait_get_l2_indirect_reg(mux->offset);
+
+	/* apq/ipq8064 Errata: disable sec_src clock gating during switch. */
+	if (mux->disable_sec_src_gating) {
+		regval |= SECCLKAGD;
+		krait_set_l2_indirect_reg(mux->offset, regval);
+	}
+
 	regval &= ~(mux->mask << mux->shift);
 	regval |= (sel & mux->mask) << mux->shift;
 	if (mux->lpl) {
@@ -33,6 +43,12 @@ static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel)
 	}
 	krait_set_l2_indirect_reg(mux->offset, regval);
 
+	/* apq/ipq8064 Errata: re-enabled sec_src clock gating. */
+	if (mux->disable_sec_src_gating) {
+		regval &= ~SECCLKAGD;
+		krait_set_l2_indirect_reg(mux->offset, regval);
+	}
+
 	/* Wait for switch to complete. */
 	mb();
 	udelay(1);
diff --git a/drivers/clk/qcom/clk-krait.h b/drivers/clk/qcom/clk-krait.h
index 9120bd2f5297..f930538c539e 100644
--- a/drivers/clk/qcom/clk-krait.h
+++ b/drivers/clk/qcom/clk-krait.h
@@ -15,6 +15,7 @@ struct krait_mux_clk {
 	u8		safe_sel;
 	u8		old_index;
 	bool		reparent;
+	bool		disable_sec_src_gating;
 
 	struct clk_hw	hw;
 	struct notifier_block   clk_nb;
diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c
index 4d4b657d33c3..cfd961d5cc45 100644
--- a/drivers/clk/qcom/krait-cc.c
+++ b/drivers/clk/qcom/krait-cc.c
@@ -139,6 +139,14 @@ krait_add_sec_mux(struct device *dev, int id, const char *s,
 	mux->hw.init = &init;
 	mux->safe_sel = 0;
 
+	/* Checking for qcom,krait-cc-v1 or qcom,krait-cc-v2 is not
+	 * enough to limit this to apq/ipq8064. Directly check machine
+	 * compatible to correctly handle this errata.
+	 */
+	if (of_machine_is_compatible("qcom,ipq8064") ||
+	    of_machine_is_compatible("qcom,apq8064"))
+		mux->disable_sec_src_gating = true;
+
 	init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s);
 	if (!init.name)
 		return -ENOMEM;
-- 
2.34.1

Re: [PATCH v2 3/3] clk: qcom: clk-krait: add apq/ipq8064 errata workaround

[Dmitry Baryshkov]

On Sat, 30 Apr 2022 at 15:53, Ansuel Smith <ansuelsmth@gmail.com> wrote:
>
> Add apq/ipq8064 errata workaround where the sec_src clock gating needs to
> be disabled during switching. krait-cc compatible is not enough to
> handle this and limit this workaround to apq/ipq8064. We check machine
> compatible to handle this.
>
> Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

> ---
>  drivers/clk/qcom/clk-krait.c | 16 ++++++++++++++++
>  drivers/clk/qcom/clk-krait.h |  1 +
>  drivers/clk/qcom/krait-cc.c  |  8 ++++++++
>  3 files changed, 25 insertions(+)
>
> diff --git a/drivers/clk/qcom/clk-krait.c b/drivers/clk/qcom/clk-krait.c
> index 90046428693c..45da736bd5f4 100644
> --- a/drivers/clk/qcom/clk-krait.c
> +++ b/drivers/clk/qcom/clk-krait.c
> @@ -18,13 +18,23 @@
>  static DEFINE_SPINLOCK(krait_clock_reg_lock);
>
>  #define LPL_SHIFT      8
> +#define SECCLKAGD      BIT(4)
> +
>  static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel)
>  {
>         unsigned long flags;
>         u32 regval;
>
>         spin_lock_irqsave(&krait_clock_reg_lock, flags);
> +
>         regval = krait_get_l2_indirect_reg(mux->offset);
> +
> +       /* apq/ipq8064 Errata: disable sec_src clock gating during switch. */
> +       if (mux->disable_sec_src_gating) {
> +               regval |= SECCLKAGD;
> +               krait_set_l2_indirect_reg(mux->offset, regval);
> +       }
> +
>         regval &= ~(mux->mask << mux->shift);
>         regval |= (sel & mux->mask) << mux->shift;
>         if (mux->lpl) {
> @@ -33,6 +43,12 @@ static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel)
>         }
>         krait_set_l2_indirect_reg(mux->offset, regval);
>
> +       /* apq/ipq8064 Errata: re-enabled sec_src clock gating. */
> +       if (mux->disable_sec_src_gating) {
> +               regval &= ~SECCLKAGD;
> +               krait_set_l2_indirect_reg(mux->offset, regval);
> +       }
> +
>         /* Wait for switch to complete. */
>         mb();
>         udelay(1);
> diff --git a/drivers/clk/qcom/clk-krait.h b/drivers/clk/qcom/clk-krait.h
> index 9120bd2f5297..f930538c539e 100644
> --- a/drivers/clk/qcom/clk-krait.h
> +++ b/drivers/clk/qcom/clk-krait.h
> @@ -15,6 +15,7 @@ struct krait_mux_clk {
>         u8              safe_sel;
>         u8              old_index;
>         bool            reparent;
> +       bool            disable_sec_src_gating;
>
>         struct clk_hw   hw;
>         struct notifier_block   clk_nb;
> diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c
> index 4d4b657d33c3..cfd961d5cc45 100644
> --- a/drivers/clk/qcom/krait-cc.c
> +++ b/drivers/clk/qcom/krait-cc.c
> @@ -139,6 +139,14 @@ krait_add_sec_mux(struct device *dev, int id, const char *s,
>         mux->hw.init = &init;
>         mux->safe_sel = 0;
>
> +       /* Checking for qcom,krait-cc-v1 or qcom,krait-cc-v2 is not
> +        * enough to limit this to apq/ipq8064. Directly check machine
> +        * compatible to correctly handle this errata.
> +        */
> +       if (of_machine_is_compatible("qcom,ipq8064") ||
> +           of_machine_is_compatible("qcom,apq8064"))
> +               mux->disable_sec_src_gating = true;
> +
>         init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s);
>         if (!init.name)
>                 return -ENOMEM;
> --
> 2.34.1
>


-- 
With best wishes
Dmitry

Re: [PATCH v2 0/3] Small fixes/improvement for hfpll and krait

[Bjorn Andersson]

On Sat, 30 Apr 2022 07:44:55 +0200, Ansuel Smith wrote:
> This series has small fixes/improvement to the hfpll and krait clk
> driver.
> 
> This comes from another series that got split to better facilitate the
> merge since it was grown to 21 patches and was getting hard to review.
> 
> For hfpll, a conversion to read_poll macro and introduction
> of a timeout to prevent a stall.
> For krait, a fix for the mux sel logic and an introduction for
> 8064 errata.
> 
> [...]

Applied, thanks!

[1/3] clk: qcom: clk-hfpll: use poll_timeout macro
      commit: fcfbfe373d41b4728ffec075f8f91b6572a88c27
[2/3] clk: qcom: clk-krait: unlock spin after mux completion
      commit: df83d2c9e72910416f650ade1e07cc314ff02731
[3/3] clk: qcom: clk-krait: add apq/ipq8064 errata workaround
      commit: 898d0d6483a9360f1968e0a900465c1fa152a4a9

Best regards,
-- 
Bjorn Andersson <bjorn.andersson@linaro.org>