* [PATCH v2 0/7] drm/msm: clean up the hw catalog init
@ 2022-06-02 13:30 Dmitry Baryshkov
2022-06-02 13:30 ` [PATCH v2 1/7] drm/msm/dpu: use feature bit for LM combined alpha check Dmitry Baryshkov
` (6 more replies)
0 siblings, 7 replies; 15+ messages in thread
From: Dmitry Baryshkov @ 2022-06-02 13:30 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Abhinav Kumar
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno
Replace superfluous cfg_init functions, which just assign a static
config to the struct dpu_mdss_cfg, with static instances of struct
dpu_mdss_cfg.
Changes since v1:
- Turn catalog->perf and catalog->dma_cfg to be pointers, otherwise
clang complains that they are not constant.
Dmitry Baryshkov (7):
drm/msm/dpu: use feature bit for LM combined alpha check
drm/msm/dpu: move VBIF_XINL_QOS_LVL_REMAP size to hw_catalog
drm/msm/dpu: remove hwversion field from data structures
drm/msm/dpu: change catalog->perf to be a const pointer
drm/msm/dpu: change catalog->dma_cfg to be a const pointer
drm/msm/dpu: constify struct dpu_mdss_cfg
drm/msm/dpu: make dpu hardware catalog static const
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 24 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 4 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 4 +-
.../drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 12 +-
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 500 ++++++++----------
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 20 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 5 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c | 1 -
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 5 +-
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 7 +-
.../gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c | 1 -
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 5 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 4 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h | 2 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c | 5 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 6 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 20 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 2 +-
27 files changed, 282 insertions(+), 358 deletions(-)
--
2.35.1
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 1/7] drm/msm/dpu: use feature bit for LM combined alpha check
2022-06-02 13:30 [PATCH v2 0/7] drm/msm: clean up the hw catalog init Dmitry Baryshkov
@ 2022-06-02 13:30 ` Dmitry Baryshkov
2022-06-02 18:37 ` Abhinav Kumar
2022-06-02 13:30 ` [PATCH v2 2/7] drm/msm/dpu: move VBIF_XINL_QOS_LVL_REMAP size to hw_catalog Dmitry Baryshkov
` (5 subsequent siblings)
6 siblings, 1 reply; 15+ messages in thread
From: Dmitry Baryshkov @ 2022-06-02 13:30 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Abhinav Kumar
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno
Rather than checking hwversion, follow the usual patter and add special
bit to the lm->features to check whether the LM has combined or separate
alpha registers. While we are at it, rename
dpu_hw_lm_setup_blend_config_sdm845() to
dpu_hw_lm_setup_blend_config_combined_alpha().
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 17 ++++++++++-------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 6 +++---
3 files changed, 15 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 400ebceb56bb..78c7d987c2ca 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -50,9 +50,12 @@
#define DMA_CURSOR_MSM8998_MASK \
(DMA_MSM8998_MASK | BIT(DPU_SSPP_CURSOR))
-#define MIXER_SDM845_MASK \
+#define MIXER_MSM8998_MASK \
(BIT(DPU_MIXER_SOURCESPLIT) | BIT(DPU_DIM_LAYER))
+#define MIXER_SDM845_MASK \
+ (BIT(DPU_MIXER_SOURCESPLIT) | BIT(DPU_DIM_LAYER) | BIT(DPU_MIXER_COMBINED_ALPHA))
+
#define MIXER_SC7180_MASK \
(BIT(DPU_DIM_LAYER))
@@ -936,17 +939,17 @@ static const struct dpu_lm_sub_blks msm8998_lm_sblk = {
};
static const struct dpu_lm_cfg msm8998_lm[] = {
- LM_BLK("lm_0", LM_0, 0x44000, MIXER_SDM845_MASK,
+ LM_BLK("lm_0", LM_0, 0x44000, MIXER_MSM8998_MASK,
&msm8998_lm_sblk, PINGPONG_0, LM_2, DSPP_0),
- LM_BLK("lm_1", LM_1, 0x45000, MIXER_SDM845_MASK,
+ LM_BLK("lm_1", LM_1, 0x45000, MIXER_MSM8998_MASK,
&msm8998_lm_sblk, PINGPONG_1, LM_5, DSPP_1),
- LM_BLK("lm_2", LM_2, 0x46000, MIXER_SDM845_MASK,
+ LM_BLK("lm_2", LM_2, 0x46000, MIXER_MSM8998_MASK,
&msm8998_lm_sblk, PINGPONG_2, LM_0, 0),
- LM_BLK("lm_3", LM_3, 0x47000, MIXER_SDM845_MASK,
+ LM_BLK("lm_3", LM_3, 0x47000, MIXER_MSM8998_MASK,
&msm8998_lm_sblk, PINGPONG_MAX, 0, 0),
- LM_BLK("lm_4", LM_4, 0x48000, MIXER_SDM845_MASK,
+ LM_BLK("lm_4", LM_4, 0x48000, MIXER_MSM8998_MASK,
&msm8998_lm_sblk, PINGPONG_MAX, 0, 0),
- LM_BLK("lm_5", LM_5, 0x49000, MIXER_SDM845_MASK,
+ LM_BLK("lm_5", LM_5, 0x49000, MIXER_MSM8998_MASK,
&msm8998_lm_sblk, PINGPONG_3, LM_1, 0),
};
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
index 8cb6d1f25bf9..80bc09b1f1b3 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
@@ -145,6 +145,7 @@ enum {
* @DPU_MIXER_SOURCESPLIT Layer mixer supports source-split configuration
* @DPU_MIXER_GC Gamma correction block
* @DPU_DIM_LAYER Layer mixer supports dim layer
+ * @DPU_MIXER_COMBINED_ALPHA Layer mixer has combined alpha register
* @DPU_MIXER_MAX maximum value
*/
enum {
@@ -152,6 +153,7 @@ enum {
DPU_MIXER_SOURCESPLIT,
DPU_MIXER_GC,
DPU_DIM_LAYER,
+ DPU_MIXER_COMBINED_ALPHA,
DPU_MIXER_MAX
};
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
index 462f5082099e..25d2eba28e71 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
@@ -148,7 +148,7 @@ static int dpu_hw_lm_collect_misr(struct dpu_hw_mixer *ctx, u32 *misr_value)
return 0;
}
-static void dpu_hw_lm_setup_blend_config_sdm845(struct dpu_hw_mixer *ctx,
+static void dpu_hw_lm_setup_blend_config_combined_alpha(struct dpu_hw_mixer *ctx,
u32 stage, u32 fg_alpha, u32 bg_alpha, u32 blend_op)
{
struct dpu_hw_blk_reg_map *c = &ctx->hw;
@@ -204,8 +204,8 @@ static void _setup_mixer_ops(const struct dpu_mdss_cfg *m,
unsigned long features)
{
ops->setup_mixer_out = dpu_hw_lm_setup_out;
- if (m->hwversion >= DPU_HW_VER_400)
- ops->setup_blend_config = dpu_hw_lm_setup_blend_config_sdm845;
+ if (test_bit(DPU_MIXER_COMBINED_ALPHA, &features))
+ ops->setup_blend_config = dpu_hw_lm_setup_blend_config_combined_alpha;
else
ops->setup_blend_config = dpu_hw_lm_setup_blend_config;
ops->setup_alpha_out = dpu_hw_lm_setup_color3;
--
2.35.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 2/7] drm/msm/dpu: move VBIF_XINL_QOS_LVL_REMAP size to hw_catalog
2022-06-02 13:30 [PATCH v2 0/7] drm/msm: clean up the hw catalog init Dmitry Baryshkov
2022-06-02 13:30 ` [PATCH v2 1/7] drm/msm/dpu: use feature bit for LM combined alpha check Dmitry Baryshkov
@ 2022-06-02 13:30 ` Dmitry Baryshkov
2022-06-02 18:44 ` Abhinav Kumar
2022-06-02 13:30 ` [PATCH v2 3/7] drm/msm/dpu: remove hwversion field from data structures Dmitry Baryshkov
` (4 subsequent siblings)
6 siblings, 1 reply; 15+ messages in thread
From: Dmitry Baryshkov @ 2022-06-02 13:30 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Abhinav Kumar
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno
Rather than detecting VBIF_XINL_QOS_LVL_REMAP_000 based on the
hwversion, push the offset to the hw_catalog.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 2 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c | 4 ++--
3 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 78c7d987c2ca..cff6fe3a85ac 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -1339,6 +1339,7 @@ static const struct dpu_vbif_cfg msm8998_vbif[] = {
.default_ot_wr_limit = 32,
.features = BIT(DPU_VBIF_QOS_REMAP) | BIT(DPU_VBIF_QOS_OTLIM),
.xin_halt_timeout = 0x4000,
+ .qos_rp_remap_size = 0x20,
.dynamic_ot_rd_tbl = {
.count = ARRAY_SIZE(msm8998_ot_rdwr_cfg),
.cfg = msm8998_ot_rdwr_cfg,
@@ -1366,6 +1367,7 @@ static const struct dpu_vbif_cfg sdm845_vbif[] = {
.base = 0, .len = 0x1040,
.features = BIT(DPU_VBIF_QOS_REMAP),
.xin_halt_timeout = 0x4000,
+ .qos_rp_remap_size = 0x40,
.qos_rt_tbl = {
.npriority_lvl = ARRAY_SIZE(sdm845_rt_pri_lvl),
.priority_lvl = sdm845_rt_pri_lvl,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
index 80bc09b1f1b3..f70de97f492a 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
@@ -709,6 +709,7 @@ struct dpu_vbif_qos_tbl {
* @ot_rd_limit default OT read limit
* @ot_wr_limit default OT write limit
* @xin_halt_timeout maximum time (in usec) for xin to halt
+ * @qos_rp_remap_size size of VBIF_XINL_QOS_RP_REMAP register space
* @dynamic_ot_rd_tbl dynamic OT read configuration table
* @dynamic_ot_wr_tbl dynamic OT write configuration table
* @qos_rt_tbl real-time QoS priority table
@@ -721,6 +722,7 @@ struct dpu_vbif_cfg {
u32 default_ot_rd_limit;
u32 default_ot_wr_limit;
u32 xin_halt_timeout;
+ u32 qos_rp_remap_size;
struct dpu_vbif_dynamic_ot_tbl dynamic_ot_rd_tbl;
struct dpu_vbif_dynamic_ot_tbl dynamic_ot_wr_tbl;
struct dpu_vbif_qos_tbl qos_rt_tbl;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
index b757054e1c23..046854c3fbed 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
@@ -30,7 +30,7 @@
#define VBIF_XIN_HALT_CTRL0 0x0200
#define VBIF_XIN_HALT_CTRL1 0x0204
#define VBIF_XINL_QOS_RP_REMAP_000 0x0550
-#define VBIF_XINL_QOS_LVL_REMAP_000(v) (v < DPU_HW_VER_400 ? 0x570 : 0x0590)
+#define VBIF_XINL_QOS_LVL_REMAP_000(vbif) (VBIF_XINL_QOS_RP_REMAP_000 + (vbif)->cap->qos_rp_remap_size)
static void dpu_hw_clear_errors(struct dpu_hw_vbif *vbif,
u32 *pnd_errors, u32 *src_errors)
@@ -163,7 +163,7 @@ static void dpu_hw_set_qos_remap(struct dpu_hw_vbif *vbif,
c = &vbif->hw;
- reg_lvl = VBIF_XINL_QOS_LVL_REMAP_000(c->hwversion);
+ reg_lvl = VBIF_XINL_QOS_LVL_REMAP_000(vbif);
reg_high = ((xin_id & 0x8) >> 3) * 4 + (level * 8);
reg_shift = (xin_id & 0x7) * 4;
--
2.35.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 3/7] drm/msm/dpu: remove hwversion field from data structures
2022-06-02 13:30 [PATCH v2 0/7] drm/msm: clean up the hw catalog init Dmitry Baryshkov
2022-06-02 13:30 ` [PATCH v2 1/7] drm/msm/dpu: use feature bit for LM combined alpha check Dmitry Baryshkov
2022-06-02 13:30 ` [PATCH v2 2/7] drm/msm/dpu: move VBIF_XINL_QOS_LVL_REMAP size to hw_catalog Dmitry Baryshkov
@ 2022-06-02 13:30 ` Dmitry Baryshkov
2022-06-02 18:47 ` Abhinav Kumar
2022-06-02 13:30 ` [PATCH v2 4/7] drm/msm/dpu: change catalog->perf to be a const pointer Dmitry Baryshkov
` (3 subsequent siblings)
6 siblings, 1 reply; 15+ messages in thread
From: Dmitry Baryshkov @ 2022-06-02 13:30 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Abhinav Kumar
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno
The driver should not depend on hw revision for detecting features.
Instead it should use features from the hw catalog. Drop the hwversion
field from struct dpu_mdss_cfg and struct dpu_hw_blk_reg_map.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 --
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h | 2 --
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c | 1 -
15 files changed, 17 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index cff6fe3a85ac..367279371e8d 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -2002,7 +2002,6 @@ struct dpu_mdss_cfg *dpu_hw_catalog_init(u32 hw_rev)
for (i = 0; i < ARRAY_SIZE(cfg_handler); i++) {
if (cfg_handler[i].hw_rev == hw_rev) {
cfg_handler[i].cfg_init(dpu_cfg);
- dpu_cfg->hwversion = hw_rev;
return dpu_cfg;
}
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
index f70de97f492a..4225f58d8f97 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
@@ -826,8 +826,6 @@ struct dpu_perf_cfg {
* @mdss_irqs: Bitmap with the irqs supported by the target
*/
struct dpu_mdss_cfg {
- u32 hwversion;
-
const struct dpu_caps *caps;
u32 mdp_count;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
index c33e7ef611a6..7d416bf4ae91 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
@@ -61,7 +61,6 @@ static const struct dpu_ctl_cfg *_ctl_offset(enum dpu_ctl ctl,
b->base_off = addr;
b->blk_off = m->ctl[i].base;
b->length = m->ctl[i].len;
- b->hwversion = m->hwversion;
b->log_mask = DPU_DBG_MASK_CTL;
return &m->ctl[i];
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
index 4ad8991fc7d9..6f20d6b6dddd 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
@@ -169,7 +169,6 @@ static struct dpu_dsc_cfg *_dsc_offset(enum dpu_dsc dsc,
b->base_off = addr;
b->blk_off = m->dsc[i].base;
b->length = m->dsc[i].len;
- b->hwversion = m->hwversion;
b->log_mask = DPU_DBG_MASK_DSC;
return &m->dsc[i];
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
index 355894a3b48c..3e63bf4fa64e 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
@@ -83,7 +83,6 @@ static const struct dpu_dspp_cfg *_dspp_offset(enum dpu_dspp dspp,
b->base_off = addr;
b->blk_off = m->dspp[i].base;
b->length = m->dspp[i].len;
- b->hwversion = m->hwversion;
b->log_mask = DPU_DBG_MASK_DSPP;
return &m->dspp[i];
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
index 61284e6c313d..01bb2d84c3a0 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
@@ -403,7 +403,6 @@ static void __intr_offset(struct dpu_mdss_cfg *m,
{
hw->base_off = addr;
hw->blk_off = m->mdp[0].base;
- hw->hwversion = m->hwversion;
}
struct dpu_hw_intr *dpu_hw_intr_init(void __iomem *addr,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
index 3f4d2c6e1b45..b2ca8d19fdd7 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
@@ -80,7 +80,6 @@ static const struct dpu_intf_cfg *_intf_offset(enum dpu_intf intf,
b->base_off = addr;
b->blk_off = m->intf[i].base;
b->length = m->intf[i].len;
- b->hwversion = m->hwversion;
b->log_mask = DPU_DBG_MASK_INTF;
return &m->intf[i];
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
index 25d2eba28e71..b41993269d09 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
@@ -46,7 +46,6 @@ static const struct dpu_lm_cfg *_lm_offset(enum dpu_lm mixer,
b->base_off = addr;
b->blk_off = m->mixer[i].base;
b->length = m->mixer[i].len;
- b->hwversion = m->hwversion;
b->log_mask = DPU_DBG_MASK_LM;
return &m->mixer[i];
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c
index c06d595d5df0..b053d68d38da 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c
@@ -26,7 +26,6 @@ static const struct dpu_merge_3d_cfg *_merge_3d_offset(enum dpu_merge_3d idx,
b->base_off = addr;
b->blk_off = m->merge_3d[i].base;
b->length = m->merge_3d[i].len;
- b->hwversion = m->hwversion;
b->log_mask = DPU_DBG_MASK_PINGPONG;
return &m->merge_3d[i];
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
index 47c6ab6caf95..6538e195cfe9 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
@@ -54,7 +54,6 @@ static const struct dpu_pingpong_cfg *_pingpong_offset(enum dpu_pingpong pp,
b->base_off = addr;
b->blk_off = m->pingpong[i].base;
b->length = m->pingpong[i].len;
- b->hwversion = m->hwversion;
b->log_mask = DPU_DBG_MASK_PINGPONG;
return &m->pingpong[i];
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
index 0a0864dff783..ab7f1a4cc578 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
@@ -772,7 +772,6 @@ static const struct dpu_sspp_cfg *_sspp_offset(enum dpu_sspp sspp,
b->base_off = addr;
b->blk_off = catalog->sspp[i].base;
b->length = catalog->sspp[i].len;
- b->hwversion = catalog->hwversion;
b->log_mask = DPU_DBG_MASK_SSPP;
return &catalog->sspp[i];
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
index ab3ef162b666..12d3b0067275 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
@@ -288,7 +288,6 @@ static const struct dpu_mdp_cfg *_top_offset(enum dpu_mdp mdp,
b->base_off = addr;
b->blk_off = m->mdp[i].base;
b->length = m->mdp[i].len;
- b->hwversion = m->hwversion;
b->log_mask = DPU_DBG_MASK_TOP;
return &m->mdp[i];
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h
index e4a65eb4f769..550b2e2b3e34 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h
@@ -21,14 +21,12 @@
* @blk_off: pipe offset relative to mdss offset
* @length length of register block offset
* @xin_id xin id
- * @hwversion mdss hw version number
*/
struct dpu_hw_blk_reg_map {
void __iomem *base_off;
u32 blk_off;
u32 length;
u32 xin_id;
- u32 hwversion;
u32 log_mask;
};
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
index 046854c3fbed..789ecc531b43 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
@@ -223,7 +223,6 @@ static const struct dpu_vbif_cfg *_top_offset(enum dpu_vbif vbif,
b->base_off = addr;
b->blk_off = m->vbif[i].base;
b->length = m->vbif[i].len;
- b->hwversion = m->hwversion;
b->log_mask = DPU_DBG_MASK_VBIF;
return &m->vbif[i];
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c
index bcccce292937..084439fdd3a0 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c
@@ -63,7 +63,6 @@ static const struct dpu_wb_cfg *_wb_offset(enum dpu_wb wb,
b->base_off = addr;
b->blk_off = m->wb[i].base;
b->length = m->wb[i].len;
- b->hwversion = m->hwversion;
return &m->wb[i];
}
}
--
2.35.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 4/7] drm/msm/dpu: change catalog->perf to be a const pointer
2022-06-02 13:30 [PATCH v2 0/7] drm/msm: clean up the hw catalog init Dmitry Baryshkov
` (2 preceding siblings ...)
2022-06-02 13:30 ` [PATCH v2 3/7] drm/msm/dpu: remove hwversion field from data structures Dmitry Baryshkov
@ 2022-06-02 13:30 ` Dmitry Baryshkov
2022-06-02 19:20 ` Abhinav Kumar
2022-06-02 13:30 ` [PATCH v2 5/7] drm/msm/dpu: change catalog->dma_cfg " Dmitry Baryshkov
` (2 subsequent siblings)
6 siblings, 1 reply; 15+ messages in thread
From: Dmitry Baryshkov @ 2022-06-02 13:30 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Abhinav Kumar
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno, kernel test robot
Change dpu_mdss_cfg::perf to be a const pointer rather than embedding
the dpu_perf_cfg struct into the struct dpu_mdss_cfg.
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 20 +++++++++----------
.../drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 10 +++++-----
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 16 +++++++--------
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 18 ++++++++---------
5 files changed, 33 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
index a7492dd6ed65..31767d0f7353 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
@@ -53,7 +53,7 @@ static u64 _dpu_core_perf_calc_bw(struct dpu_kms *kms,
crtc_plane_bw += pstate->plane_fetch_bw;
}
- bw_factor = kms->catalog->perf.bw_inefficiency_factor;
+ bw_factor = kms->catalog->perf->bw_inefficiency_factor;
if (bw_factor) {
crtc_plane_bw *= bw_factor;
do_div(crtc_plane_bw, 100);
@@ -90,7 +90,7 @@ static u64 _dpu_core_perf_calc_clk(struct dpu_kms *kms,
crtc_clk = max(pstate->plane_clk, crtc_clk);
}
- clk_factor = kms->catalog->perf.clk_inefficiency_factor;
+ clk_factor = kms->catalog->perf->clk_inefficiency_factor;
if (clk_factor) {
crtc_clk *= clk_factor;
do_div(crtc_clk, 100);
@@ -128,7 +128,7 @@ static void _dpu_core_perf_calc_crtc(struct dpu_kms *kms,
perf->core_clk_rate = kms->perf.fix_core_clk_rate;
} else {
perf->bw_ctl = _dpu_core_perf_calc_bw(kms, crtc);
- perf->max_per_pipe_ib = kms->catalog->perf.min_dram_ib;
+ perf->max_per_pipe_ib = kms->catalog->perf->min_dram_ib;
perf->core_clk_rate = _dpu_core_perf_calc_clk(kms, crtc, state);
}
@@ -189,7 +189,7 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc,
bw = DIV_ROUND_UP_ULL(bw_sum_of_intfs, 1000);
DRM_DEBUG_ATOMIC("calculated bandwidth=%uk\n", bw);
- threshold = kms->catalog->perf.max_bw_high;
+ threshold = kms->catalog->perf->max_bw_high;
DRM_DEBUG_ATOMIC("final threshold bw limit = %d\n", threshold);
@@ -413,7 +413,7 @@ static ssize_t _dpu_core_perf_mode_write(struct file *file,
const char __user *user_buf, size_t count, loff_t *ppos)
{
struct dpu_core_perf *perf = file->private_data;
- struct dpu_perf_cfg *cfg = &perf->catalog->perf;
+ const struct dpu_perf_cfg *cfg = perf->catalog->perf;
u32 perf_mode = 0;
int ret;
@@ -480,15 +480,15 @@ int dpu_core_perf_debugfs_init(struct dpu_kms *dpu_kms, struct dentry *parent)
debugfs_create_u32("enable_bw_release", 0600, entry,
(u32 *)&perf->enable_bw_release);
debugfs_create_u32("threshold_low", 0600, entry,
- (u32 *)&catalog->perf.max_bw_low);
+ (u32 *)&catalog->perf->max_bw_low);
debugfs_create_u32("threshold_high", 0600, entry,
- (u32 *)&catalog->perf.max_bw_high);
+ (u32 *)&catalog->perf->max_bw_high);
debugfs_create_u32("min_core_ib", 0600, entry,
- (u32 *)&catalog->perf.min_core_ib);
+ (u32 *)&catalog->perf->min_core_ib);
debugfs_create_u32("min_llcc_ib", 0600, entry,
- (u32 *)&catalog->perf.min_llcc_ib);
+ (u32 *)&catalog->perf->min_llcc_ib);
debugfs_create_u32("min_dram_ib", 0600, entry,
- (u32 *)&catalog->perf.min_dram_ib);
+ (u32 *)&catalog->perf->min_dram_ib);
debugfs_create_file("perf_mode", 0600, entry,
(u32 *)perf, &dpu_core_perf_mode_fops);
debugfs_create_u64("fix_core_clk_rate", 0600, entry,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
index 4829d1ce0cf8..1e4a4822fbf4 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
@@ -104,7 +104,7 @@ static void dpu_encoder_phys_wb_set_qos(struct dpu_encoder_phys *phys_enc)
struct dpu_hw_wb *hw_wb;
struct dpu_hw_wb_qos_cfg qos_cfg;
struct dpu_mdss_cfg *catalog;
- struct dpu_qos_lut_tbl *qos_lut_tb;
+ const struct dpu_qos_lut_tbl *qos_lut_tb;
if (!phys_enc || !phys_enc->dpu_kms || !phys_enc->dpu_kms->catalog) {
DPU_ERROR("invalid parameter(s)\n");
@@ -118,11 +118,11 @@ static void dpu_encoder_phys_wb_set_qos(struct dpu_encoder_phys *phys_enc)
memset(&qos_cfg, 0, sizeof(struct dpu_hw_wb_qos_cfg));
qos_cfg.danger_safe_en = true;
qos_cfg.danger_lut =
- catalog->perf.danger_lut_tbl[DPU_QOS_LUT_USAGE_NRT];
+ catalog->perf->danger_lut_tbl[DPU_QOS_LUT_USAGE_NRT];
- qos_cfg.safe_lut = catalog->perf.safe_lut_tbl[DPU_QOS_LUT_USAGE_NRT];
+ qos_cfg.safe_lut = catalog->perf->safe_lut_tbl[DPU_QOS_LUT_USAGE_NRT];
- qos_lut_tb = &catalog->perf.qos_lut_tbl[DPU_QOS_LUT_USAGE_NRT];
+ qos_lut_tb = &catalog->perf->qos_lut_tbl[DPU_QOS_LUT_USAGE_NRT];
qos_cfg.creq_lut = _dpu_hw_get_qos_lut(qos_lut_tb, 0);
if (hw_wb->ops.setup_qos_lut)
@@ -166,7 +166,7 @@ static void dpu_encoder_phys_wb_setup_fb(struct dpu_encoder_phys *phys_enc,
if (hw_wb->ops.setup_cdp) {
memset(&cdp_cfg, 0, sizeof(struct dpu_hw_cdp_cfg));
- cdp_cfg.enable = phys_enc->dpu_kms->catalog->perf.cdp_cfg
+ cdp_cfg.enable = phys_enc->dpu_kms->catalog->perf->cdp_cfg
[DPU_PERF_CDP_USAGE_NRT].wr_enable;
cdp_cfg.ubwc_meta_enable =
DPU_FORMAT_IS_UBWC(wb_cfg->dest.format);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 367279371e8d..a7040ca5da72 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -1750,7 +1750,7 @@ static void msm8998_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
.vbif_count = ARRAY_SIZE(msm8998_vbif),
.vbif = msm8998_vbif,
.reg_dma_count = 0,
- .perf = msm8998_perf_data,
+ .perf = &msm8998_perf_data,
.mdss_irqs = IRQ_SM8250_MASK,
};
}
@@ -1781,7 +1781,7 @@ static void sdm845_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
.vbif = sdm845_vbif,
.reg_dma_count = 1,
.dma_cfg = sdm845_regdma,
- .perf = sdm845_perf_data,
+ .perf = &sdm845_perf_data,
.mdss_irqs = IRQ_SDM845_MASK,
};
}
@@ -1812,7 +1812,7 @@ static void sc7180_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
.vbif = sdm845_vbif,
.reg_dma_count = 1,
.dma_cfg = sdm845_regdma,
- .perf = sc7180_perf_data,
+ .perf = &sc7180_perf_data,
.mdss_irqs = IRQ_SC7180_MASK,
};
}
@@ -1845,7 +1845,7 @@ static void sm8150_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
.vbif = sdm845_vbif,
.reg_dma_count = 1,
.dma_cfg = sm8150_regdma,
- .perf = sm8150_perf_data,
+ .perf = &sm8150_perf_data,
.mdss_irqs = IRQ_SDM845_MASK,
};
}
@@ -1876,7 +1876,7 @@ static void sc8180x_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
.vbif = sdm845_vbif,
.reg_dma_count = 1,
.dma_cfg = sm8150_regdma,
- .perf = sc8180x_perf_data,
+ .perf = &sc8180x_perf_data,
.mdss_irqs = IRQ_SC8180X_MASK,
};
}
@@ -1911,7 +1911,7 @@ static void sm8250_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
.wb = sm8250_wb,
.reg_dma_count = 1,
.dma_cfg = sm8250_regdma,
- .perf = sm8250_perf_data,
+ .perf = &sm8250_perf_data,
.mdss_irqs = IRQ_SM8250_MASK,
};
}
@@ -1934,7 +1934,7 @@ static void sc7280_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
.intf = sc7280_intf,
.vbif_count = ARRAY_SIZE(sdm845_vbif),
.vbif = sdm845_vbif,
- .perf = sc7280_perf_data,
+ .perf = &sc7280_perf_data,
.mdss_irqs = IRQ_SC7280_MASK,
};
}
@@ -1966,7 +1966,7 @@ static void qcm2290_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
.vbif = sdm845_vbif,
.reg_dma_count = 1,
.dma_cfg = sdm845_regdma,
- .perf = qcm2290_perf_data,
+ .perf = &qcm2290_perf_data,
.mdss_irqs = IRQ_SC7180_MASK,
};
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
index 4225f58d8f97..64ed96b2fa3d 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
@@ -868,7 +868,7 @@ struct dpu_mdss_cfg {
/* Add additional block data structures here */
- struct dpu_perf_cfg perf;
+ const struct dpu_perf_cfg *perf;
const struct dpu_format_extended *dma_formats;
const struct dpu_format_extended *cursor_formats;
const struct dpu_format_extended *vig_formats;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
index 9d2f0364d2c7..d8048b6862f9 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
@@ -160,7 +160,7 @@ static void _dpu_plane_calc_bw(struct drm_plane *plane,
vbp = mode->vtotal - mode->vsync_end;
vpw = mode->vsync_end - mode->vsync_start;
vfp = mode->vsync_start - mode->vdisplay;
- hw_latency_lines = dpu_kms->catalog->perf.min_prefill_lines;
+ hw_latency_lines = dpu_kms->catalog->perf->min_prefill_lines;
scale_factor = src_height > dst_height ?
mult_frac(src_height, 1, dst_height) : 1;
@@ -309,7 +309,7 @@ static void _dpu_plane_set_qos_lut(struct drm_plane *plane,
}
qos_lut = _dpu_hw_get_qos_lut(
- &pdpu->catalog->perf.qos_lut_tbl[lut_usage], total_fl);
+ &pdpu->catalog->perf->qos_lut_tbl[lut_usage], total_fl);
trace_dpu_perf_set_qos_luts(pdpu->pipe - SSPP_VIG0,
(fmt) ? fmt->base.pixel_format : 0,
@@ -336,9 +336,9 @@ static void _dpu_plane_set_danger_lut(struct drm_plane *plane,
u32 danger_lut, safe_lut;
if (!pdpu->is_rt_pipe) {
- danger_lut = pdpu->catalog->perf.danger_lut_tbl
+ danger_lut = pdpu->catalog->perf->danger_lut_tbl
[DPU_QOS_LUT_USAGE_NRT];
- safe_lut = pdpu->catalog->perf.safe_lut_tbl
+ safe_lut = pdpu->catalog->perf->safe_lut_tbl
[DPU_QOS_LUT_USAGE_NRT];
} else {
fmt = dpu_get_dpu_format_ext(
@@ -346,14 +346,14 @@ static void _dpu_plane_set_danger_lut(struct drm_plane *plane,
fb->modifier);
if (fmt && DPU_FORMAT_IS_LINEAR(fmt)) {
- danger_lut = pdpu->catalog->perf.danger_lut_tbl
+ danger_lut = pdpu->catalog->perf->danger_lut_tbl
[DPU_QOS_LUT_USAGE_LINEAR];
- safe_lut = pdpu->catalog->perf.safe_lut_tbl
+ safe_lut = pdpu->catalog->perf->safe_lut_tbl
[DPU_QOS_LUT_USAGE_LINEAR];
} else {
- danger_lut = pdpu->catalog->perf.danger_lut_tbl
+ danger_lut = pdpu->catalog->perf->danger_lut_tbl
[DPU_QOS_LUT_USAGE_MACROTILE];
- safe_lut = pdpu->catalog->perf.safe_lut_tbl
+ safe_lut = pdpu->catalog->perf->safe_lut_tbl
[DPU_QOS_LUT_USAGE_MACROTILE];
}
}
@@ -1225,7 +1225,7 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane)
memset(&cdp_cfg, 0, sizeof(struct dpu_hw_cdp_cfg));
- cdp_cfg.enable = pdpu->catalog->perf.cdp_cfg
+ cdp_cfg.enable = pdpu->catalog->perf->cdp_cfg
[DPU_PERF_CDP_USAGE_RT].rd_enable;
cdp_cfg.ubwc_meta_enable =
DPU_FORMAT_IS_UBWC(fmt);
--
2.35.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 5/7] drm/msm/dpu: change catalog->dma_cfg to be a const pointer
2022-06-02 13:30 [PATCH v2 0/7] drm/msm: clean up the hw catalog init Dmitry Baryshkov
` (3 preceding siblings ...)
2022-06-02 13:30 ` [PATCH v2 4/7] drm/msm/dpu: change catalog->perf to be a const pointer Dmitry Baryshkov
@ 2022-06-02 13:30 ` Dmitry Baryshkov
2022-06-02 19:21 ` Abhinav Kumar
2022-06-02 13:30 ` [PATCH v2 6/7] drm/msm/dpu: constify struct dpu_mdss_cfg Dmitry Baryshkov
2022-06-02 13:30 ` [PATCH v2 7/7] drm/msm/dpu: make dpu hardware catalog static const Dmitry Baryshkov
6 siblings, 1 reply; 15+ messages in thread
From: Dmitry Baryshkov @ 2022-06-02 13:30 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Abhinav Kumar
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno, kernel test robot
Change dpu_mdss_cfg::dma_cfg to be a const pointer rather than embedding
the dpu_reg_dma_cfg struct into the struct dpu_mdss_cfg.
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 12 ++++++------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 +-
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index a7040ca5da72..5470b8b14b0a 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -1780,7 +1780,7 @@ static void sdm845_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
.vbif_count = ARRAY_SIZE(sdm845_vbif),
.vbif = sdm845_vbif,
.reg_dma_count = 1,
- .dma_cfg = sdm845_regdma,
+ .dma_cfg = &sdm845_regdma,
.perf = &sdm845_perf_data,
.mdss_irqs = IRQ_SDM845_MASK,
};
@@ -1811,7 +1811,7 @@ static void sc7180_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
.vbif_count = ARRAY_SIZE(sdm845_vbif),
.vbif = sdm845_vbif,
.reg_dma_count = 1,
- .dma_cfg = sdm845_regdma,
+ .dma_cfg = &sdm845_regdma,
.perf = &sc7180_perf_data,
.mdss_irqs = IRQ_SC7180_MASK,
};
@@ -1844,7 +1844,7 @@ static void sm8150_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
.vbif_count = ARRAY_SIZE(sdm845_vbif),
.vbif = sdm845_vbif,
.reg_dma_count = 1,
- .dma_cfg = sm8150_regdma,
+ .dma_cfg = &sm8150_regdma,
.perf = &sm8150_perf_data,
.mdss_irqs = IRQ_SDM845_MASK,
};
@@ -1875,7 +1875,7 @@ static void sc8180x_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
.vbif_count = ARRAY_SIZE(sdm845_vbif),
.vbif = sdm845_vbif,
.reg_dma_count = 1,
- .dma_cfg = sm8150_regdma,
+ .dma_cfg = &sm8150_regdma,
.perf = &sc8180x_perf_data,
.mdss_irqs = IRQ_SC8180X_MASK,
};
@@ -1910,7 +1910,7 @@ static void sm8250_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
.wb_count = ARRAY_SIZE(sm8250_wb),
.wb = sm8250_wb,
.reg_dma_count = 1,
- .dma_cfg = sm8250_regdma,
+ .dma_cfg = &sm8250_regdma,
.perf = &sm8250_perf_data,
.mdss_irqs = IRQ_SM8250_MASK,
};
@@ -1965,7 +1965,7 @@ static void qcm2290_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
.vbif_count = ARRAY_SIZE(sdm845_vbif),
.vbif = sdm845_vbif,
.reg_dma_count = 1,
- .dma_cfg = sdm845_regdma,
+ .dma_cfg = &sdm845_regdma,
.perf = &qcm2290_perf_data,
.mdss_irqs = IRQ_SC7180_MASK,
};
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
index 64ed96b2fa3d..60b403ac9f0f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
@@ -859,7 +859,7 @@ struct dpu_mdss_cfg {
const struct dpu_wb_cfg *wb;
u32 reg_dma_count;
- struct dpu_reg_dma_cfg dma_cfg;
+ const struct dpu_reg_dma_cfg *dma_cfg;
u32 ad_count;
--
2.35.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 6/7] drm/msm/dpu: constify struct dpu_mdss_cfg
2022-06-02 13:30 [PATCH v2 0/7] drm/msm: clean up the hw catalog init Dmitry Baryshkov
` (4 preceding siblings ...)
2022-06-02 13:30 ` [PATCH v2 5/7] drm/msm/dpu: change catalog->dma_cfg " Dmitry Baryshkov
@ 2022-06-02 13:30 ` Dmitry Baryshkov
2022-06-02 19:32 ` Abhinav Kumar
2022-06-02 13:30 ` [PATCH v2 7/7] drm/msm/dpu: make dpu hardware catalog static const Dmitry Baryshkov
6 siblings, 1 reply; 15+ messages in thread
From: Dmitry Baryshkov @ 2022-06-02 13:30 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Abhinav Kumar
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno
Mark struct dpu_mdss_cfg instance as a const pointer. This is mostly a
preparation for the next patch.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 11 +++--------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 9 ++-------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 8 +++-----
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 2 +-
17 files changed, 29 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
index 31767d0f7353..1d9d83d7b99e 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
@@ -468,7 +468,7 @@ static const struct file_operations dpu_core_perf_mode_fops = {
int dpu_core_perf_debugfs_init(struct dpu_kms *dpu_kms, struct dentry *parent)
{
struct dpu_core_perf *perf = &dpu_kms->perf;
- struct dpu_mdss_cfg *catalog = perf->catalog;
+ const struct dpu_mdss_cfg *catalog = perf->catalog;
struct dentry *entry;
entry = debugfs_create_dir("core_perf", parent);
@@ -517,7 +517,7 @@ void dpu_core_perf_destroy(struct dpu_core_perf *perf)
int dpu_core_perf_init(struct dpu_core_perf *perf,
struct drm_device *dev,
- struct dpu_mdss_cfg *catalog,
+ const struct dpu_mdss_cfg *catalog,
struct clk *core_clk)
{
perf->dev = dev;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
index 8dfcc6db7176..e3795995e145 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
@@ -68,7 +68,7 @@ struct dpu_core_perf_tune {
struct dpu_core_perf {
struct drm_device *dev;
struct dentry *debugfs_root;
- struct dpu_mdss_cfg *catalog;
+ const struct dpu_mdss_cfg *catalog;
struct clk *core_clk;
u64 core_clk_rate;
u64 max_core_clk_rate;
@@ -119,7 +119,7 @@ void dpu_core_perf_destroy(struct dpu_core_perf *perf);
*/
int dpu_core_perf_init(struct dpu_core_perf *perf,
struct drm_device *dev,
- struct dpu_mdss_cfg *catalog,
+ const struct dpu_mdss_cfg *catalog,
struct clk *core_clk);
struct dpu_kms;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 52516eb20cb8..460df2a4831c 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -1207,7 +1207,7 @@ static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc)
mutex_unlock(&dpu_enc->enc_lock);
}
-static enum dpu_intf dpu_encoder_get_intf(struct dpu_mdss_cfg *catalog,
+static enum dpu_intf dpu_encoder_get_intf(const struct dpu_mdss_cfg *catalog,
enum dpu_intf_type type, u32 controller_id)
{
int i = 0;
@@ -1224,7 +1224,7 @@ static enum dpu_intf dpu_encoder_get_intf(struct dpu_mdss_cfg *catalog,
return INTF_MAX;
}
-static enum dpu_wb dpu_encoder_get_wb(struct dpu_mdss_cfg *catalog,
+static enum dpu_wb dpu_encoder_get_wb(const struct dpu_mdss_cfg *catalog,
enum dpu_intf_type type, u32 controller_id)
{
int i = 0;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
index 1e4a4822fbf4..4088c9e17d50 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
@@ -103,7 +103,7 @@ static void dpu_encoder_phys_wb_set_qos(struct dpu_encoder_phys *phys_enc)
{
struct dpu_hw_wb *hw_wb;
struct dpu_hw_wb_qos_cfg qos_cfg;
- struct dpu_mdss_cfg *catalog;
+ const struct dpu_mdss_cfg *catalog;
const struct dpu_qos_lut_tbl *qos_lut_tb;
if (!phys_enc || !phys_enc->dpu_kms || !phys_enc->dpu_kms->catalog) {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 5470b8b14b0a..4fa16fdae17d 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -1985,17 +1985,12 @@ static const struct dpu_mdss_hw_cfg_handler cfg_handler[] = {
{ .hw_rev = DPU_HW_VER_720, .cfg_init = sc7280_cfg_init},
};
-void dpu_hw_catalog_deinit(struct dpu_mdss_cfg *dpu_cfg)
-{
- kfree(dpu_cfg);
-}
-
-struct dpu_mdss_cfg *dpu_hw_catalog_init(u32 hw_rev)
+const struct dpu_mdss_cfg *dpu_hw_catalog_init(struct device *dev, u32 hw_rev)
{
int i;
struct dpu_mdss_cfg *dpu_cfg;
- dpu_cfg = kzalloc(sizeof(*dpu_cfg), GFP_KERNEL);
+ dpu_cfg = devm_kzalloc(dev, sizeof(*dpu_cfg), GFP_KERNEL);
if (!dpu_cfg)
return ERR_PTR(-ENOMEM);
@@ -2007,7 +2002,7 @@ struct dpu_mdss_cfg *dpu_hw_catalog_init(u32 hw_rev)
}
DPU_ERROR("unsupported chipset id:%X\n", hw_rev);
- dpu_hw_catalog_deinit(dpu_cfg);
+
return ERR_PTR(-ENODEV);
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
index 60b403ac9f0f..c317fa27daa0 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
@@ -884,16 +884,11 @@ struct dpu_mdss_hw_cfg_handler {
/**
* dpu_hw_catalog_init - dpu hardware catalog init API retrieves
* hardcoded target specific catalog information in config structure
+ * @dev: DPU device
* @hw_rev: caller needs provide the hardware revision.
*
* Return: dpu config structure
*/
-struct dpu_mdss_cfg *dpu_hw_catalog_init(u32 hw_rev);
-
-/**
- * dpu_hw_catalog_deinit - dpu hardware catalog cleanup
- * @dpu_cfg: pointer returned from init function
- */
-void dpu_hw_catalog_deinit(struct dpu_mdss_cfg *dpu_cfg);
+const struct dpu_mdss_cfg *dpu_hw_catalog_init(struct device *dev, u32 hw_rev);
#endif /* _DPU_HW_CATALOG_H */
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
index 6f20d6b6dddd..184a1b27b13d 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
@@ -158,7 +158,7 @@ static void dpu_hw_dsc_config_thresh(struct dpu_hw_dsc *hw_dsc,
}
static struct dpu_dsc_cfg *_dsc_offset(enum dpu_dsc dsc,
- struct dpu_mdss_cfg *m,
+ const struct dpu_mdss_cfg *m,
void __iomem *addr,
struct dpu_hw_blk_reg_map *b)
{
@@ -186,7 +186,7 @@ static void _setup_dsc_ops(struct dpu_hw_dsc_ops *ops,
};
struct dpu_hw_dsc *dpu_hw_dsc_init(enum dpu_dsc idx, void __iomem *addr,
- struct dpu_mdss_cfg *m)
+ const struct dpu_mdss_cfg *m)
{
struct dpu_hw_dsc *c;
struct dpu_dsc_cfg *cfg;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h
index 164e5f5b1002..5fab8bbba764 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h
@@ -64,7 +64,7 @@ struct dpu_hw_dsc {
* Returns: Error code or allocated dpu_hw_dsc context
*/
struct dpu_hw_dsc *dpu_hw_dsc_init(enum dpu_dsc idx, void __iomem *addr,
- struct dpu_mdss_cfg *m);
+ const struct dpu_mdss_cfg *m);
/**
* dpu_hw_dsc_destroy - destroys dsc driver context
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
index 01bb2d84c3a0..d83503ea2419 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
@@ -398,7 +398,7 @@ u32 dpu_core_irq_read(struct dpu_kms *dpu_kms, int irq_idx)
return intr_status;
}
-static void __intr_offset(struct dpu_mdss_cfg *m,
+static void __intr_offset(const struct dpu_mdss_cfg *m,
void __iomem *addr, struct dpu_hw_blk_reg_map *hw)
{
hw->base_off = addr;
@@ -406,7 +406,7 @@ static void __intr_offset(struct dpu_mdss_cfg *m,
}
struct dpu_hw_intr *dpu_hw_intr_init(void __iomem *addr,
- struct dpu_mdss_cfg *m)
+ const struct dpu_mdss_cfg *m)
{
struct dpu_hw_intr *intr;
int nirq = MDP_INTR_MAX * 32;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
index 4154c5e2b4ae..46443955443c 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
@@ -67,7 +67,7 @@ struct dpu_hw_intr {
* @m : pointer to mdss catalog data
*/
struct dpu_hw_intr *dpu_hw_intr_init(void __iomem *addr,
- struct dpu_mdss_cfg *m);
+ const struct dpu_mdss_cfg *m);
/**
* dpu_hw_intr_destroy(): Cleanup interrutps hw object
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
index ab7f1a4cc578..da4c7e4f304b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
@@ -761,7 +761,7 @@ int _dpu_hw_sspp_init_debugfs(struct dpu_hw_pipe *hw_pipe, struct dpu_kms *kms,
static const struct dpu_sspp_cfg *_sspp_offset(enum dpu_sspp sspp,
void __iomem *addr,
- struct dpu_mdss_cfg *catalog,
+ const struct dpu_mdss_cfg *catalog,
struct dpu_hw_blk_reg_map *b)
{
int i;
@@ -782,7 +782,7 @@ static const struct dpu_sspp_cfg *_sspp_offset(enum dpu_sspp sspp,
}
struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx,
- void __iomem *addr, struct dpu_mdss_cfg *catalog,
+ void __iomem *addr, const struct dpu_mdss_cfg *catalog,
bool is_virtual_pipe)
{
struct dpu_hw_pipe *hw_pipe;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
index a81e16657d61..7f7338fcddeb 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
@@ -360,7 +360,7 @@ struct dpu_hw_sspp_ops {
struct dpu_hw_pipe {
struct dpu_hw_blk base;
struct dpu_hw_blk_reg_map hw;
- struct dpu_mdss_cfg *catalog;
+ const struct dpu_mdss_cfg *catalog;
const struct dpu_mdp_cfg *mdp;
/* Pipe */
@@ -381,7 +381,7 @@ struct dpu_kms;
* @is_virtual_pipe: is this pipe virtual pipe
*/
struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx,
- void __iomem *addr, struct dpu_mdss_cfg *catalog,
+ void __iomem *addr, const struct dpu_mdss_cfg *catalog,
bool is_virtual_pipe);
/**
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 2b9d931474e0..bba29c31f843 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -747,7 +747,7 @@ static int _dpu_kms_drm_obj_init(struct dpu_kms *dpu_kms)
unsigned int num_encoders;
struct msm_drm_private *priv;
- struct dpu_mdss_cfg *catalog;
+ const struct dpu_mdss_cfg *catalog;
int primary_planes_idx = 0, cursor_planes_idx = 0, i, ret;
int max_crtc_count;
@@ -844,8 +844,6 @@ static void _dpu_kms_hw_destroy(struct dpu_kms *dpu_kms)
dpu_rm_destroy(&dpu_kms->rm);
dpu_kms->rm_init = false;
- if (dpu_kms->catalog)
- dpu_hw_catalog_deinit(dpu_kms->catalog);
dpu_kms->catalog = NULL;
if (dpu_kms->vbif[VBIF_NRT])
@@ -907,7 +905,7 @@ static void dpu_kms_mdp_snapshot(struct msm_disp_state *disp_state, struct msm_k
{
int i;
struct dpu_kms *dpu_kms;
- struct dpu_mdss_cfg *cat;
+ const struct dpu_mdss_cfg *cat;
struct dpu_hw_mdp *top;
dpu_kms = to_dpu_kms(kms);
@@ -1095,7 +1093,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
pr_info("dpu hardware revision:0x%x\n", dpu_kms->core_rev);
- dpu_kms->catalog = dpu_hw_catalog_init(dpu_kms->core_rev);
+ dpu_kms->catalog = dpu_hw_catalog_init(dev->dev, dpu_kms->core_rev);
if (IS_ERR_OR_NULL(dpu_kms->catalog)) {
rc = PTR_ERR(dpu_kms->catalog);
if (!dpu_kms->catalog)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
index 832a0769f2e7..ed80ed6784ee 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
@@ -69,7 +69,7 @@ struct dpu_kms {
struct msm_kms base;
struct drm_device *dev;
int core_rev;
- struct dpu_mdss_cfg *catalog;
+ const struct dpu_mdss_cfg *catalog;
/* io/register spaces: */
void __iomem *mmio, *vbif[VBIF_MAX], *reg_dma;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
index d8048b6862f9..71a4bdcf4ad8 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
@@ -106,7 +106,7 @@ struct dpu_plane {
bool is_rt_pipe;
bool is_virtual;
struct list_head mplane_list;
- struct dpu_mdss_cfg *catalog;
+ const struct dpu_mdss_cfg *catalog;
};
static const uint64_t supported_format_modifiers[] = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
index 06f03e7081bc..73b3442e7467 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
@@ -95,7 +95,7 @@ int dpu_rm_destroy(struct dpu_rm *rm)
}
int dpu_rm_init(struct dpu_rm *rm,
- struct dpu_mdss_cfg *cat,
+ const struct dpu_mdss_cfg *cat,
void __iomem *mmio)
{
int rc, i;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
index 2f34a31d8d0d..59de72b381f9 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
@@ -42,7 +42,7 @@ struct dpu_rm {
* @Return: 0 on Success otherwise -ERROR
*/
int dpu_rm_init(struct dpu_rm *rm,
- struct dpu_mdss_cfg *cat,
+ const struct dpu_mdss_cfg *cat,
void __iomem *mmio);
/**
--
2.35.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 7/7] drm/msm/dpu: make dpu hardware catalog static const
2022-06-02 13:30 [PATCH v2 0/7] drm/msm: clean up the hw catalog init Dmitry Baryshkov
` (5 preceding siblings ...)
2022-06-02 13:30 ` [PATCH v2 6/7] drm/msm/dpu: constify struct dpu_mdss_cfg Dmitry Baryshkov
@ 2022-06-02 13:30 ` Dmitry Baryshkov
6 siblings, 0 replies; 15+ messages in thread
From: Dmitry Baryshkov @ 2022-06-02 13:30 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Abhinav Kumar
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno
Replace superfluous cfg_init functions, which just assign a static
config to the struct dpu_mdss_cfg, with static instances of struct
dpu_mdss_cfg.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 475 ++++++++----------
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 5 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 2 +-
3 files changed, 213 insertions(+), 269 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 4fa16fdae17d..e8a9afda9e54 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -1722,283 +1722,228 @@ static const struct dpu_perf_cfg qcm2290_perf_data = {
.bw_inefficiency_factor = 120,
};
/*************************************************************
- * Hardware catalog init
+ * Hardware catalog
*************************************************************/
-/*
- * msm8998_cfg_init(): populate sdm845 dpu sub-blocks reg offsets
- * and instance counts.
- */
-static void msm8998_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
-{
- *dpu_cfg = (struct dpu_mdss_cfg){
- .caps = &msm8998_dpu_caps,
- .mdp_count = ARRAY_SIZE(msm8998_mdp),
- .mdp = msm8998_mdp,
- .ctl_count = ARRAY_SIZE(msm8998_ctl),
- .ctl = msm8998_ctl,
- .sspp_count = ARRAY_SIZE(msm8998_sspp),
- .sspp = msm8998_sspp,
- .mixer_count = ARRAY_SIZE(msm8998_lm),
- .mixer = msm8998_lm,
- .dspp_count = ARRAY_SIZE(msm8998_dspp),
- .dspp = msm8998_dspp,
- .pingpong_count = ARRAY_SIZE(sdm845_pp),
- .pingpong = sdm845_pp,
- .intf_count = ARRAY_SIZE(msm8998_intf),
- .intf = msm8998_intf,
- .vbif_count = ARRAY_SIZE(msm8998_vbif),
- .vbif = msm8998_vbif,
- .reg_dma_count = 0,
- .perf = &msm8998_perf_data,
- .mdss_irqs = IRQ_SM8250_MASK,
- };
-}
-
-/*
- * sdm845_cfg_init(): populate sdm845 dpu sub-blocks reg offsets
- * and instance counts.
- */
-static void sdm845_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
-{
- *dpu_cfg = (struct dpu_mdss_cfg){
- .caps = &sdm845_dpu_caps,
- .mdp_count = ARRAY_SIZE(sdm845_mdp),
- .mdp = sdm845_mdp,
- .ctl_count = ARRAY_SIZE(sdm845_ctl),
- .ctl = sdm845_ctl,
- .sspp_count = ARRAY_SIZE(sdm845_sspp),
- .sspp = sdm845_sspp,
- .mixer_count = ARRAY_SIZE(sdm845_lm),
- .mixer = sdm845_lm,
- .pingpong_count = ARRAY_SIZE(sdm845_pp),
- .pingpong = sdm845_pp,
- .dsc_count = ARRAY_SIZE(sdm845_dsc),
- .dsc = sdm845_dsc,
- .intf_count = ARRAY_SIZE(sdm845_intf),
- .intf = sdm845_intf,
- .vbif_count = ARRAY_SIZE(sdm845_vbif),
- .vbif = sdm845_vbif,
- .reg_dma_count = 1,
- .dma_cfg = &sdm845_regdma,
- .perf = &sdm845_perf_data,
- .mdss_irqs = IRQ_SDM845_MASK,
- };
-}
-
-/*
- * sc7180_cfg_init(): populate sc7180 dpu sub-blocks reg offsets
- * and instance counts.
- */
-static void sc7180_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
-{
- *dpu_cfg = (struct dpu_mdss_cfg){
- .caps = &sc7180_dpu_caps,
- .mdp_count = ARRAY_SIZE(sc7180_mdp),
- .mdp = sc7180_mdp,
- .ctl_count = ARRAY_SIZE(sc7180_ctl),
- .ctl = sc7180_ctl,
- .sspp_count = ARRAY_SIZE(sc7180_sspp),
- .sspp = sc7180_sspp,
- .mixer_count = ARRAY_SIZE(sc7180_lm),
- .mixer = sc7180_lm,
- .dspp_count = ARRAY_SIZE(sc7180_dspp),
- .dspp = sc7180_dspp,
- .pingpong_count = ARRAY_SIZE(sc7180_pp),
- .pingpong = sc7180_pp,
- .intf_count = ARRAY_SIZE(sc7180_intf),
- .intf = sc7180_intf,
- .vbif_count = ARRAY_SIZE(sdm845_vbif),
- .vbif = sdm845_vbif,
- .reg_dma_count = 1,
- .dma_cfg = &sdm845_regdma,
- .perf = &sc7180_perf_data,
- .mdss_irqs = IRQ_SC7180_MASK,
- };
-}
-
-/*
- * sm8150_cfg_init(): populate sm8150 dpu sub-blocks reg offsets
- * and instance counts.
- */
-static void sm8150_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
-{
- *dpu_cfg = (struct dpu_mdss_cfg){
- .caps = &sm8150_dpu_caps,
- .mdp_count = ARRAY_SIZE(sdm845_mdp),
- .mdp = sdm845_mdp,
- .ctl_count = ARRAY_SIZE(sm8150_ctl),
- .ctl = sm8150_ctl,
- .sspp_count = ARRAY_SIZE(sdm845_sspp),
- .sspp = sdm845_sspp,
- .mixer_count = ARRAY_SIZE(sm8150_lm),
- .mixer = sm8150_lm,
- .dspp_count = ARRAY_SIZE(sm8150_dspp),
- .dspp = sm8150_dspp,
- .pingpong_count = ARRAY_SIZE(sm8150_pp),
- .pingpong = sm8150_pp,
- .merge_3d_count = ARRAY_SIZE(sm8150_merge_3d),
- .merge_3d = sm8150_merge_3d,
- .intf_count = ARRAY_SIZE(sm8150_intf),
- .intf = sm8150_intf,
- .vbif_count = ARRAY_SIZE(sdm845_vbif),
- .vbif = sdm845_vbif,
- .reg_dma_count = 1,
- .dma_cfg = &sm8150_regdma,
- .perf = &sm8150_perf_data,
- .mdss_irqs = IRQ_SDM845_MASK,
- };
-}
-
-/*
- * sc8180x_cfg_init(): populate sc8180 dpu sub-blocks reg offsets
- * and instance counts.
- */
-static void sc8180x_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
-{
- *dpu_cfg = (struct dpu_mdss_cfg){
- .caps = &sc8180x_dpu_caps,
- .mdp_count = ARRAY_SIZE(sc8180x_mdp),
- .mdp = sc8180x_mdp,
- .ctl_count = ARRAY_SIZE(sm8150_ctl),
- .ctl = sm8150_ctl,
- .sspp_count = ARRAY_SIZE(sdm845_sspp),
- .sspp = sdm845_sspp,
- .mixer_count = ARRAY_SIZE(sm8150_lm),
- .mixer = sm8150_lm,
- .pingpong_count = ARRAY_SIZE(sm8150_pp),
- .pingpong = sm8150_pp,
- .merge_3d_count = ARRAY_SIZE(sm8150_merge_3d),
- .merge_3d = sm8150_merge_3d,
- .intf_count = ARRAY_SIZE(sc8180x_intf),
- .intf = sc8180x_intf,
- .vbif_count = ARRAY_SIZE(sdm845_vbif),
- .vbif = sdm845_vbif,
- .reg_dma_count = 1,
- .dma_cfg = &sm8150_regdma,
- .perf = &sc8180x_perf_data,
- .mdss_irqs = IRQ_SC8180X_MASK,
- };
-}
-
-/*
- * sm8250_cfg_init(): populate sm8250 dpu sub-blocks reg offsets
- * and instance counts.
- */
-static void sm8250_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
-{
- *dpu_cfg = (struct dpu_mdss_cfg){
- .caps = &sm8250_dpu_caps,
- .mdp_count = ARRAY_SIZE(sm8250_mdp),
- .mdp = sm8250_mdp,
- .ctl_count = ARRAY_SIZE(sm8150_ctl),
- .ctl = sm8150_ctl,
- .sspp_count = ARRAY_SIZE(sm8250_sspp),
- .sspp = sm8250_sspp,
- .mixer_count = ARRAY_SIZE(sm8150_lm),
- .mixer = sm8150_lm,
- .dspp_count = ARRAY_SIZE(sm8150_dspp),
- .dspp = sm8150_dspp,
- .pingpong_count = ARRAY_SIZE(sm8150_pp),
- .pingpong = sm8150_pp,
- .merge_3d_count = ARRAY_SIZE(sm8150_merge_3d),
- .merge_3d = sm8150_merge_3d,
- .intf_count = ARRAY_SIZE(sm8150_intf),
- .intf = sm8150_intf,
- .vbif_count = ARRAY_SIZE(sdm845_vbif),
- .vbif = sdm845_vbif,
- .wb_count = ARRAY_SIZE(sm8250_wb),
- .wb = sm8250_wb,
- .reg_dma_count = 1,
- .dma_cfg = &sm8250_regdma,
- .perf = &sm8250_perf_data,
- .mdss_irqs = IRQ_SM8250_MASK,
- };
-}
-
-static void sc7280_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
-{
- *dpu_cfg = (struct dpu_mdss_cfg){
- .caps = &sc7280_dpu_caps,
- .mdp_count = ARRAY_SIZE(sc7280_mdp),
- .mdp = sc7280_mdp,
- .ctl_count = ARRAY_SIZE(sc7280_ctl),
- .ctl = sc7280_ctl,
- .sspp_count = ARRAY_SIZE(sc7280_sspp),
- .sspp = sc7280_sspp,
- .mixer_count = ARRAY_SIZE(sc7280_lm),
- .mixer = sc7280_lm,
- .pingpong_count = ARRAY_SIZE(sc7280_pp),
- .pingpong = sc7280_pp,
- .intf_count = ARRAY_SIZE(sc7280_intf),
- .intf = sc7280_intf,
- .vbif_count = ARRAY_SIZE(sdm845_vbif),
- .vbif = sdm845_vbif,
- .perf = &sc7280_perf_data,
- .mdss_irqs = IRQ_SC7280_MASK,
- };
-}
-
-
-/*
- * qcm2290_cfg_init(): populate qcm2290 dpu sub-blocks reg offsets
- * and instance counts.
- */
-static void qcm2290_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
-{
- *dpu_cfg = (struct dpu_mdss_cfg){
- .caps = &qcm2290_dpu_caps,
- .mdp_count = ARRAY_SIZE(qcm2290_mdp),
- .mdp = qcm2290_mdp,
- .ctl_count = ARRAY_SIZE(qcm2290_ctl),
- .ctl = qcm2290_ctl,
- .sspp_count = ARRAY_SIZE(qcm2290_sspp),
- .sspp = qcm2290_sspp,
- .mixer_count = ARRAY_SIZE(qcm2290_lm),
- .mixer = qcm2290_lm,
- .dspp_count = ARRAY_SIZE(qcm2290_dspp),
- .dspp = qcm2290_dspp,
- .pingpong_count = ARRAY_SIZE(qcm2290_pp),
- .pingpong = qcm2290_pp,
- .intf_count = ARRAY_SIZE(qcm2290_intf),
- .intf = qcm2290_intf,
- .vbif_count = ARRAY_SIZE(sdm845_vbif),
- .vbif = sdm845_vbif,
- .reg_dma_count = 1,
- .dma_cfg = &sdm845_regdma,
- .perf = &qcm2290_perf_data,
- .mdss_irqs = IRQ_SC7180_MASK,
- };
-}
+static const struct dpu_mdss_cfg msm8998_dpu_cfg = {
+ .caps = &msm8998_dpu_caps,
+ .mdp_count = ARRAY_SIZE(msm8998_mdp),
+ .mdp = msm8998_mdp,
+ .ctl_count = ARRAY_SIZE(msm8998_ctl),
+ .ctl = msm8998_ctl,
+ .sspp_count = ARRAY_SIZE(msm8998_sspp),
+ .sspp = msm8998_sspp,
+ .mixer_count = ARRAY_SIZE(msm8998_lm),
+ .mixer = msm8998_lm,
+ .dspp_count = ARRAY_SIZE(msm8998_dspp),
+ .dspp = msm8998_dspp,
+ .pingpong_count = ARRAY_SIZE(sdm845_pp),
+ .pingpong = sdm845_pp,
+ .intf_count = ARRAY_SIZE(msm8998_intf),
+ .intf = msm8998_intf,
+ .vbif_count = ARRAY_SIZE(msm8998_vbif),
+ .vbif = msm8998_vbif,
+ .reg_dma_count = 0,
+ .perf = &msm8998_perf_data,
+ .mdss_irqs = IRQ_SM8250_MASK,
+};
+
+static const struct dpu_mdss_cfg sdm845_dpu_cfg = {
+ .caps = &sdm845_dpu_caps,
+ .mdp_count = ARRAY_SIZE(sdm845_mdp),
+ .mdp = sdm845_mdp,
+ .ctl_count = ARRAY_SIZE(sdm845_ctl),
+ .ctl = sdm845_ctl,
+ .sspp_count = ARRAY_SIZE(sdm845_sspp),
+ .sspp = sdm845_sspp,
+ .mixer_count = ARRAY_SIZE(sdm845_lm),
+ .mixer = sdm845_lm,
+ .pingpong_count = ARRAY_SIZE(sdm845_pp),
+ .pingpong = sdm845_pp,
+ .dsc_count = ARRAY_SIZE(sdm845_dsc),
+ .dsc = sdm845_dsc,
+ .intf_count = ARRAY_SIZE(sdm845_intf),
+ .intf = sdm845_intf,
+ .vbif_count = ARRAY_SIZE(sdm845_vbif),
+ .vbif = sdm845_vbif,
+ .reg_dma_count = 1,
+ .dma_cfg = &sdm845_regdma,
+ .perf = &sdm845_perf_data,
+ .mdss_irqs = IRQ_SDM845_MASK,
+};
+
+static const struct dpu_mdss_cfg sc7180_dpu_cfg = {
+ .caps = &sc7180_dpu_caps,
+ .mdp_count = ARRAY_SIZE(sc7180_mdp),
+ .mdp = sc7180_mdp,
+ .ctl_count = ARRAY_SIZE(sc7180_ctl),
+ .ctl = sc7180_ctl,
+ .sspp_count = ARRAY_SIZE(sc7180_sspp),
+ .sspp = sc7180_sspp,
+ .mixer_count = ARRAY_SIZE(sc7180_lm),
+ .mixer = sc7180_lm,
+ .dspp_count = ARRAY_SIZE(sc7180_dspp),
+ .dspp = sc7180_dspp,
+ .pingpong_count = ARRAY_SIZE(sc7180_pp),
+ .pingpong = sc7180_pp,
+ .intf_count = ARRAY_SIZE(sc7180_intf),
+ .intf = sc7180_intf,
+ .vbif_count = ARRAY_SIZE(sdm845_vbif),
+ .vbif = sdm845_vbif,
+ .reg_dma_count = 1,
+ .dma_cfg = &sdm845_regdma,
+ .perf = &sc7180_perf_data,
+ .mdss_irqs = IRQ_SC7180_MASK,
+};
+
+static const struct dpu_mdss_cfg sm8150_dpu_cfg = {
+ .caps = &sm8150_dpu_caps,
+ .mdp_count = ARRAY_SIZE(sdm845_mdp),
+ .mdp = sdm845_mdp,
+ .ctl_count = ARRAY_SIZE(sm8150_ctl),
+ .ctl = sm8150_ctl,
+ .sspp_count = ARRAY_SIZE(sdm845_sspp),
+ .sspp = sdm845_sspp,
+ .mixer_count = ARRAY_SIZE(sm8150_lm),
+ .mixer = sm8150_lm,
+ .dspp_count = ARRAY_SIZE(sm8150_dspp),
+ .dspp = sm8150_dspp,
+ .pingpong_count = ARRAY_SIZE(sm8150_pp),
+ .pingpong = sm8150_pp,
+ .merge_3d_count = ARRAY_SIZE(sm8150_merge_3d),
+ .merge_3d = sm8150_merge_3d,
+ .intf_count = ARRAY_SIZE(sm8150_intf),
+ .intf = sm8150_intf,
+ .vbif_count = ARRAY_SIZE(sdm845_vbif),
+ .vbif = sdm845_vbif,
+ .reg_dma_count = 1,
+ .dma_cfg = &sm8150_regdma,
+ .perf = &sm8150_perf_data,
+ .mdss_irqs = IRQ_SDM845_MASK,
+};
+
+static const struct dpu_mdss_cfg sc8180x_dpu_cfg = {
+ .caps = &sc8180x_dpu_caps,
+ .mdp_count = ARRAY_SIZE(sc8180x_mdp),
+ .mdp = sc8180x_mdp,
+ .ctl_count = ARRAY_SIZE(sm8150_ctl),
+ .ctl = sm8150_ctl,
+ .sspp_count = ARRAY_SIZE(sdm845_sspp),
+ .sspp = sdm845_sspp,
+ .mixer_count = ARRAY_SIZE(sm8150_lm),
+ .mixer = sm8150_lm,
+ .pingpong_count = ARRAY_SIZE(sm8150_pp),
+ .pingpong = sm8150_pp,
+ .merge_3d_count = ARRAY_SIZE(sm8150_merge_3d),
+ .merge_3d = sm8150_merge_3d,
+ .intf_count = ARRAY_SIZE(sc8180x_intf),
+ .intf = sc8180x_intf,
+ .vbif_count = ARRAY_SIZE(sdm845_vbif),
+ .vbif = sdm845_vbif,
+ .reg_dma_count = 1,
+ .dma_cfg = &sm8150_regdma,
+ .perf = &sc8180x_perf_data,
+ .mdss_irqs = IRQ_SC8180X_MASK,
+};
+
+static const struct dpu_mdss_cfg sm8250_dpu_cfg = {
+ .caps = &sm8250_dpu_caps,
+ .mdp_count = ARRAY_SIZE(sm8250_mdp),
+ .mdp = sm8250_mdp,
+ .ctl_count = ARRAY_SIZE(sm8150_ctl),
+ .ctl = sm8150_ctl,
+ .sspp_count = ARRAY_SIZE(sm8250_sspp),
+ .sspp = sm8250_sspp,
+ .mixer_count = ARRAY_SIZE(sm8150_lm),
+ .mixer = sm8150_lm,
+ .dspp_count = ARRAY_SIZE(sm8150_dspp),
+ .dspp = sm8150_dspp,
+ .pingpong_count = ARRAY_SIZE(sm8150_pp),
+ .pingpong = sm8150_pp,
+ .merge_3d_count = ARRAY_SIZE(sm8150_merge_3d),
+ .merge_3d = sm8150_merge_3d,
+ .intf_count = ARRAY_SIZE(sm8150_intf),
+ .intf = sm8150_intf,
+ .vbif_count = ARRAY_SIZE(sdm845_vbif),
+ .vbif = sdm845_vbif,
+ .wb_count = ARRAY_SIZE(sm8250_wb),
+ .wb = sm8250_wb,
+ .reg_dma_count = 1,
+ .dma_cfg = &sm8250_regdma,
+ .perf = &sm8250_perf_data,
+ .mdss_irqs = IRQ_SM8250_MASK,
+};
+
+static const struct dpu_mdss_cfg sc7280_dpu_cfg = {
+ .caps = &sc7280_dpu_caps,
+ .mdp_count = ARRAY_SIZE(sc7280_mdp),
+ .mdp = sc7280_mdp,
+ .ctl_count = ARRAY_SIZE(sc7280_ctl),
+ .ctl = sc7280_ctl,
+ .sspp_count = ARRAY_SIZE(sc7280_sspp),
+ .sspp = sc7280_sspp,
+ .mixer_count = ARRAY_SIZE(sc7280_lm),
+ .mixer = sc7280_lm,
+ .pingpong_count = ARRAY_SIZE(sc7280_pp),
+ .pingpong = sc7280_pp,
+ .intf_count = ARRAY_SIZE(sc7280_intf),
+ .intf = sc7280_intf,
+ .vbif_count = ARRAY_SIZE(sdm845_vbif),
+ .vbif = sdm845_vbif,
+ .perf = &sc7280_perf_data,
+ .mdss_irqs = IRQ_SC7280_MASK,
+};
+
+static const struct dpu_mdss_cfg qcm2290_dpu_cfg = {
+ .caps = &qcm2290_dpu_caps,
+ .mdp_count = ARRAY_SIZE(qcm2290_mdp),
+ .mdp = qcm2290_mdp,
+ .ctl_count = ARRAY_SIZE(qcm2290_ctl),
+ .ctl = qcm2290_ctl,
+ .sspp_count = ARRAY_SIZE(qcm2290_sspp),
+ .sspp = qcm2290_sspp,
+ .mixer_count = ARRAY_SIZE(qcm2290_lm),
+ .mixer = qcm2290_lm,
+ .dspp_count = ARRAY_SIZE(qcm2290_dspp),
+ .dspp = qcm2290_dspp,
+ .pingpong_count = ARRAY_SIZE(qcm2290_pp),
+ .pingpong = qcm2290_pp,
+ .intf_count = ARRAY_SIZE(qcm2290_intf),
+ .intf = qcm2290_intf,
+ .vbif_count = ARRAY_SIZE(sdm845_vbif),
+ .vbif = sdm845_vbif,
+ .reg_dma_count = 1,
+ .dma_cfg = &sdm845_regdma,
+ .perf = &qcm2290_perf_data,
+ .mdss_irqs = IRQ_SC7180_MASK,
+};
static const struct dpu_mdss_hw_cfg_handler cfg_handler[] = {
- { .hw_rev = DPU_HW_VER_300, .cfg_init = msm8998_cfg_init},
- { .hw_rev = DPU_HW_VER_301, .cfg_init = msm8998_cfg_init},
- { .hw_rev = DPU_HW_VER_400, .cfg_init = sdm845_cfg_init},
- { .hw_rev = DPU_HW_VER_401, .cfg_init = sdm845_cfg_init},
- { .hw_rev = DPU_HW_VER_500, .cfg_init = sm8150_cfg_init},
- { .hw_rev = DPU_HW_VER_501, .cfg_init = sm8150_cfg_init},
- { .hw_rev = DPU_HW_VER_510, .cfg_init = sc8180x_cfg_init},
- { .hw_rev = DPU_HW_VER_600, .cfg_init = sm8250_cfg_init},
- { .hw_rev = DPU_HW_VER_620, .cfg_init = sc7180_cfg_init},
- { .hw_rev = DPU_HW_VER_650, .cfg_init = qcm2290_cfg_init},
- { .hw_rev = DPU_HW_VER_720, .cfg_init = sc7280_cfg_init},
-};
-
-const struct dpu_mdss_cfg *dpu_hw_catalog_init(struct device *dev, u32 hw_rev)
+ { .hw_rev = DPU_HW_VER_300, .dpu_cfg = &msm8998_dpu_cfg},
+ { .hw_rev = DPU_HW_VER_301, .dpu_cfg = &msm8998_dpu_cfg},
+ { .hw_rev = DPU_HW_VER_400, .dpu_cfg = &sdm845_dpu_cfg},
+ { .hw_rev = DPU_HW_VER_401, .dpu_cfg = &sdm845_dpu_cfg},
+ { .hw_rev = DPU_HW_VER_500, .dpu_cfg = &sm8150_dpu_cfg},
+ { .hw_rev = DPU_HW_VER_501, .dpu_cfg = &sm8150_dpu_cfg},
+ { .hw_rev = DPU_HW_VER_510, .dpu_cfg = &sc8180x_dpu_cfg},
+ { .hw_rev = DPU_HW_VER_600, .dpu_cfg = &sm8250_dpu_cfg},
+ { .hw_rev = DPU_HW_VER_620, .dpu_cfg = &sc7180_dpu_cfg},
+ { .hw_rev = DPU_HW_VER_650, .dpu_cfg = &qcm2290_dpu_cfg},
+ { .hw_rev = DPU_HW_VER_720, .dpu_cfg = &sc7280_dpu_cfg},
+};
+
+const struct dpu_mdss_cfg *dpu_hw_catalog_init(u32 hw_rev)
{
int i;
struct dpu_mdss_cfg *dpu_cfg;
- dpu_cfg = devm_kzalloc(dev, sizeof(*dpu_cfg), GFP_KERNEL);
+ dpu_cfg = kzalloc(sizeof(*dpu_cfg), GFP_KERNEL);
if (!dpu_cfg)
return ERR_PTR(-ENOMEM);
for (i = 0; i < ARRAY_SIZE(cfg_handler); i++) {
- if (cfg_handler[i].hw_rev == hw_rev) {
- cfg_handler[i].cfg_init(dpu_cfg);
- return dpu_cfg;
- }
+ if (cfg_handler[i].hw_rev == hw_rev)
+ return cfg_handler[i].dpu_cfg;
}
DPU_ERROR("unsupported chipset id:%X\n", hw_rev);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
index c317fa27daa0..71fe4c505f5b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
@@ -878,17 +878,16 @@ struct dpu_mdss_cfg {
struct dpu_mdss_hw_cfg_handler {
u32 hw_rev;
- void (*cfg_init)(struct dpu_mdss_cfg *dpu_cfg);
+ const struct dpu_mdss_cfg *dpu_cfg;
};
/**
* dpu_hw_catalog_init - dpu hardware catalog init API retrieves
* hardcoded target specific catalog information in config structure
- * @dev: DPU device
* @hw_rev: caller needs provide the hardware revision.
*
* Return: dpu config structure
*/
-const struct dpu_mdss_cfg *dpu_hw_catalog_init(struct device *dev, u32 hw_rev);
+const struct dpu_mdss_cfg *dpu_hw_catalog_init(u32 hw_rev);
#endif /* _DPU_HW_CATALOG_H */
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index bba29c31f843..688dc4409af6 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -1093,7 +1093,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
pr_info("dpu hardware revision:0x%x\n", dpu_kms->core_rev);
- dpu_kms->catalog = dpu_hw_catalog_init(dev->dev, dpu_kms->core_rev);
+ dpu_kms->catalog = dpu_hw_catalog_init(dpu_kms->core_rev);
if (IS_ERR_OR_NULL(dpu_kms->catalog)) {
rc = PTR_ERR(dpu_kms->catalog);
if (!dpu_kms->catalog)
--
2.35.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v2 1/7] drm/msm/dpu: use feature bit for LM combined alpha check
2022-06-02 13:30 ` [PATCH v2 1/7] drm/msm/dpu: use feature bit for LM combined alpha check Dmitry Baryshkov
@ 2022-06-02 18:37 ` Abhinav Kumar
2022-06-02 20:15 ` Dmitry Baryshkov
0 siblings, 1 reply; 15+ messages in thread
From: Abhinav Kumar @ 2022-06-02 18:37 UTC (permalink / raw)
To: Dmitry Baryshkov, Rob Clark, Sean Paul
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno
On 6/2/2022 6:30 AM, Dmitry Baryshkov wrote:
> Rather than checking hwversion, follow the usual patter and add special
> bit to the lm->features to check whether the LM has combined or separate
> alpha registers. While we are at it, rename
> dpu_hw_lm_setup_blend_config_sdm845() to
> dpu_hw_lm_setup_blend_config_combined_alpha().
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 17 ++++++++++-------
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 ++
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 6 +++---
> 3 files changed, 15 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index 400ebceb56bb..78c7d987c2ca 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -50,9 +50,12 @@
> #define DMA_CURSOR_MSM8998_MASK \
> (DMA_MSM8998_MASK | BIT(DPU_SSPP_CURSOR))
>
> -#define MIXER_SDM845_MASK \
> +#define MIXER_MSM8998_MASK \
> (BIT(DPU_MIXER_SOURCESPLIT) | BIT(DPU_DIM_LAYER))
>
> +#define MIXER_SDM845_MASK \
> + (BIT(DPU_MIXER_SOURCESPLIT) | BIT(DPU_DIM_LAYER) | BIT(DPU_MIXER_COMBINED_ALPHA))
> +
> #define MIXER_SC7180_MASK \
> (BIT(DPU_DIM_LAYER))
>
> @@ -936,17 +939,17 @@ static const struct dpu_lm_sub_blks msm8998_lm_sblk = {
> };
>
> static const struct dpu_lm_cfg msm8998_lm[] = {
> - LM_BLK("lm_0", LM_0, 0x44000, MIXER_SDM845_MASK,
> + LM_BLK("lm_0", LM_0, 0x44000, MIXER_MSM8998_MASK,
> &msm8998_lm_sblk, PINGPONG_0, LM_2, DSPP_0),
> - LM_BLK("lm_1", LM_1, 0x45000, MIXER_SDM845_MASK,
> + LM_BLK("lm_1", LM_1, 0x45000, MIXER_MSM8998_MASK,
> &msm8998_lm_sblk, PINGPONG_1, LM_5, DSPP_1),
> - LM_BLK("lm_2", LM_2, 0x46000, MIXER_SDM845_MASK,
> + LM_BLK("lm_2", LM_2, 0x46000, MIXER_MSM8998_MASK,
> &msm8998_lm_sblk, PINGPONG_2, LM_0, 0),
> - LM_BLK("lm_3", LM_3, 0x47000, MIXER_SDM845_MASK,
> + LM_BLK("lm_3", LM_3, 0x47000, MIXER_MSM8998_MASK,
> &msm8998_lm_sblk, PINGPONG_MAX, 0, 0),
> - LM_BLK("lm_4", LM_4, 0x48000, MIXER_SDM845_MASK,
> + LM_BLK("lm_4", LM_4, 0x48000, MIXER_MSM8998_MASK,
> &msm8998_lm_sblk, PINGPONG_MAX, 0, 0),
> - LM_BLK("lm_5", LM_5, 0x49000, MIXER_SDM845_MASK,
> + LM_BLK("lm_5", LM_5, 0x49000, MIXER_MSM8998_MASK,
> &msm8998_lm_sblk, PINGPONG_3, LM_1, 0),
> };
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> index 8cb6d1f25bf9..80bc09b1f1b3 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> @@ -145,6 +145,7 @@ enum {
> * @DPU_MIXER_SOURCESPLIT Layer mixer supports source-split configuration
> * @DPU_MIXER_GC Gamma correction block
> * @DPU_DIM_LAYER Layer mixer supports dim layer
> + * @DPU_MIXER_COMBINED_ALPHA Layer mixer has combined alpha register
> * @DPU_MIXER_MAX maximum value
> */
> enum {
> @@ -152,6 +153,7 @@ enum {
> DPU_MIXER_SOURCESPLIT,
> DPU_MIXER_GC,
> DPU_DIM_LAYER,
> + DPU_MIXER_COMBINED_ALPHA,
> DPU_MIXER_MAX
> };
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
> index 462f5082099e..25d2eba28e71 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
> @@ -148,7 +148,7 @@ static int dpu_hw_lm_collect_misr(struct dpu_hw_mixer *ctx, u32 *misr_value)
> return 0;
> }
>
> -static void dpu_hw_lm_setup_blend_config_sdm845(struct dpu_hw_mixer *ctx,
> +static void dpu_hw_lm_setup_blend_config_combined_alpha(struct dpu_hw_mixer *ctx,
> u32 stage, u32 fg_alpha, u32 bg_alpha, u32 blend_op)
> {
> struct dpu_hw_blk_reg_map *c = &ctx->hw;
> @@ -204,8 +204,8 @@ static void _setup_mixer_ops(const struct dpu_mdss_cfg *m,
> unsigned long features)
> {
> ops->setup_mixer_out = dpu_hw_lm_setup_out;
> - if (m->hwversion >= DPU_HW_VER_400)
> - ops->setup_blend_config = dpu_hw_lm_setup_blend_config_sdm845;
> + if (test_bit(DPU_MIXER_COMBINED_ALPHA, &features))
> + ops->setup_blend_config = dpu_hw_lm_setup_blend_config_combined_alpha;
This will not work for all chipsets.
In the catalog you have added BIT(DPU_MIXER_COMBINED_ALPHA) only for
MIXER_SDM845_MASK but MIXER_SC7180_MASK is not updated.
HW version of sc7180 is > DPU_HW_VER_400 so this would break both sc7180
and sc7280.
Please update all the relevant chipset masks.
> else
> ops->setup_blend_config = dpu_hw_lm_setup_blend_config;
> ops->setup_alpha_out = dpu_hw_lm_setup_color3;
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 2/7] drm/msm/dpu: move VBIF_XINL_QOS_LVL_REMAP size to hw_catalog
2022-06-02 13:30 ` [PATCH v2 2/7] drm/msm/dpu: move VBIF_XINL_QOS_LVL_REMAP size to hw_catalog Dmitry Baryshkov
@ 2022-06-02 18:44 ` Abhinav Kumar
0 siblings, 0 replies; 15+ messages in thread
From: Abhinav Kumar @ 2022-06-02 18:44 UTC (permalink / raw)
To: Dmitry Baryshkov, Rob Clark, Sean Paul
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno
On 6/2/2022 6:30 AM, Dmitry Baryshkov wrote:
> Rather than detecting VBIF_XINL_QOS_LVL_REMAP_000 based on the
> hwversion, push the offset to the hw_catalog.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
This one is fine because sc7180 and sc7280 use sdm845_vbif.
All chipsets listed in the catalog are covered.
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 2 ++
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 ++
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c | 4 ++--
> 3 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index 78c7d987c2ca..cff6fe3a85ac 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -1339,6 +1339,7 @@ static const struct dpu_vbif_cfg msm8998_vbif[] = {
> .default_ot_wr_limit = 32,
> .features = BIT(DPU_VBIF_QOS_REMAP) | BIT(DPU_VBIF_QOS_OTLIM),
> .xin_halt_timeout = 0x4000,
> + .qos_rp_remap_size = 0x20,
> .dynamic_ot_rd_tbl = {
> .count = ARRAY_SIZE(msm8998_ot_rdwr_cfg),
> .cfg = msm8998_ot_rdwr_cfg,
> @@ -1366,6 +1367,7 @@ static const struct dpu_vbif_cfg sdm845_vbif[] = {
> .base = 0, .len = 0x1040,
> .features = BIT(DPU_VBIF_QOS_REMAP),
> .xin_halt_timeout = 0x4000,
> + .qos_rp_remap_size = 0x40,
> .qos_rt_tbl = {
> .npriority_lvl = ARRAY_SIZE(sdm845_rt_pri_lvl),
> .priority_lvl = sdm845_rt_pri_lvl,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> index 80bc09b1f1b3..f70de97f492a 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> @@ -709,6 +709,7 @@ struct dpu_vbif_qos_tbl {
> * @ot_rd_limit default OT read limit
> * @ot_wr_limit default OT write limit
> * @xin_halt_timeout maximum time (in usec) for xin to halt
> + * @qos_rp_remap_size size of VBIF_XINL_QOS_RP_REMAP register space
> * @dynamic_ot_rd_tbl dynamic OT read configuration table
> * @dynamic_ot_wr_tbl dynamic OT write configuration table
> * @qos_rt_tbl real-time QoS priority table
> @@ -721,6 +722,7 @@ struct dpu_vbif_cfg {
> u32 default_ot_rd_limit;
> u32 default_ot_wr_limit;
> u32 xin_halt_timeout;
> + u32 qos_rp_remap_size;
> struct dpu_vbif_dynamic_ot_tbl dynamic_ot_rd_tbl;
> struct dpu_vbif_dynamic_ot_tbl dynamic_ot_wr_tbl;
> struct dpu_vbif_qos_tbl qos_rt_tbl;
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
> index b757054e1c23..046854c3fbed 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
> @@ -30,7 +30,7 @@
> #define VBIF_XIN_HALT_CTRL0 0x0200
> #define VBIF_XIN_HALT_CTRL1 0x0204
> #define VBIF_XINL_QOS_RP_REMAP_000 0x0550
> -#define VBIF_XINL_QOS_LVL_REMAP_000(v) (v < DPU_HW_VER_400 ? 0x570 : 0x0590)
> +#define VBIF_XINL_QOS_LVL_REMAP_000(vbif) (VBIF_XINL_QOS_RP_REMAP_000 + (vbif)->cap->qos_rp_remap_size)
>
> static void dpu_hw_clear_errors(struct dpu_hw_vbif *vbif,
> u32 *pnd_errors, u32 *src_errors)
> @@ -163,7 +163,7 @@ static void dpu_hw_set_qos_remap(struct dpu_hw_vbif *vbif,
>
> c = &vbif->hw;
>
> - reg_lvl = VBIF_XINL_QOS_LVL_REMAP_000(c->hwversion);
> + reg_lvl = VBIF_XINL_QOS_LVL_REMAP_000(vbif);
> reg_high = ((xin_id & 0x8) >> 3) * 4 + (level * 8);
> reg_shift = (xin_id & 0x7) * 4;
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 3/7] drm/msm/dpu: remove hwversion field from data structures
2022-06-02 13:30 ` [PATCH v2 3/7] drm/msm/dpu: remove hwversion field from data structures Dmitry Baryshkov
@ 2022-06-02 18:47 ` Abhinav Kumar
0 siblings, 0 replies; 15+ messages in thread
From: Abhinav Kumar @ 2022-06-02 18:47 UTC (permalink / raw)
To: Dmitry Baryshkov, Rob Clark, Sean Paul
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno
On 6/2/2022 6:30 AM, Dmitry Baryshkov wrote:
> The driver should not depend on hw revision for detecting features.
> Instead it should use features from the hw catalog. Drop the hwversion
> field from struct dpu_mdss_cfg and struct dpu_hw_blk_reg_map.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Since the previous two patches remove all the current users of
hwversion, this one should be fine.
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 --
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h | 2 --
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c | 1 -
> 15 files changed, 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index cff6fe3a85ac..367279371e8d 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -2002,7 +2002,6 @@ struct dpu_mdss_cfg *dpu_hw_catalog_init(u32 hw_rev)
> for (i = 0; i < ARRAY_SIZE(cfg_handler); i++) {
> if (cfg_handler[i].hw_rev == hw_rev) {
> cfg_handler[i].cfg_init(dpu_cfg);
> - dpu_cfg->hwversion = hw_rev;
> return dpu_cfg;
> }
> }
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> index f70de97f492a..4225f58d8f97 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> @@ -826,8 +826,6 @@ struct dpu_perf_cfg {
> * @mdss_irqs: Bitmap with the irqs supported by the target
> */
> struct dpu_mdss_cfg {
> - u32 hwversion;
> -
> const struct dpu_caps *caps;
>
> u32 mdp_count;
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
> index c33e7ef611a6..7d416bf4ae91 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
> @@ -61,7 +61,6 @@ static const struct dpu_ctl_cfg *_ctl_offset(enum dpu_ctl ctl,
> b->base_off = addr;
> b->blk_off = m->ctl[i].base;
> b->length = m->ctl[i].len;
> - b->hwversion = m->hwversion;
> b->log_mask = DPU_DBG_MASK_CTL;
> return &m->ctl[i];
> }
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
> index 4ad8991fc7d9..6f20d6b6dddd 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
> @@ -169,7 +169,6 @@ static struct dpu_dsc_cfg *_dsc_offset(enum dpu_dsc dsc,
> b->base_off = addr;
> b->blk_off = m->dsc[i].base;
> b->length = m->dsc[i].len;
> - b->hwversion = m->hwversion;
> b->log_mask = DPU_DBG_MASK_DSC;
> return &m->dsc[i];
> }
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
> index 355894a3b48c..3e63bf4fa64e 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
> @@ -83,7 +83,6 @@ static const struct dpu_dspp_cfg *_dspp_offset(enum dpu_dspp dspp,
> b->base_off = addr;
> b->blk_off = m->dspp[i].base;
> b->length = m->dspp[i].len;
> - b->hwversion = m->hwversion;
> b->log_mask = DPU_DBG_MASK_DSPP;
> return &m->dspp[i];
> }
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
> index 61284e6c313d..01bb2d84c3a0 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
> @@ -403,7 +403,6 @@ static void __intr_offset(struct dpu_mdss_cfg *m,
> {
> hw->base_off = addr;
> hw->blk_off = m->mdp[0].base;
> - hw->hwversion = m->hwversion;
> }
>
> struct dpu_hw_intr *dpu_hw_intr_init(void __iomem *addr,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
> index 3f4d2c6e1b45..b2ca8d19fdd7 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
> @@ -80,7 +80,6 @@ static const struct dpu_intf_cfg *_intf_offset(enum dpu_intf intf,
> b->base_off = addr;
> b->blk_off = m->intf[i].base;
> b->length = m->intf[i].len;
> - b->hwversion = m->hwversion;
> b->log_mask = DPU_DBG_MASK_INTF;
> return &m->intf[i];
> }
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
> index 25d2eba28e71..b41993269d09 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
> @@ -46,7 +46,6 @@ static const struct dpu_lm_cfg *_lm_offset(enum dpu_lm mixer,
> b->base_off = addr;
> b->blk_off = m->mixer[i].base;
> b->length = m->mixer[i].len;
> - b->hwversion = m->hwversion;
> b->log_mask = DPU_DBG_MASK_LM;
> return &m->mixer[i];
> }
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c
> index c06d595d5df0..b053d68d38da 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c
> @@ -26,7 +26,6 @@ static const struct dpu_merge_3d_cfg *_merge_3d_offset(enum dpu_merge_3d idx,
> b->base_off = addr;
> b->blk_off = m->merge_3d[i].base;
> b->length = m->merge_3d[i].len;
> - b->hwversion = m->hwversion;
> b->log_mask = DPU_DBG_MASK_PINGPONG;
> return &m->merge_3d[i];
> }
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
> index 47c6ab6caf95..6538e195cfe9 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
> @@ -54,7 +54,6 @@ static const struct dpu_pingpong_cfg *_pingpong_offset(enum dpu_pingpong pp,
> b->base_off = addr;
> b->blk_off = m->pingpong[i].base;
> b->length = m->pingpong[i].len;
> - b->hwversion = m->hwversion;
> b->log_mask = DPU_DBG_MASK_PINGPONG;
> return &m->pingpong[i];
> }
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> index 0a0864dff783..ab7f1a4cc578 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> @@ -772,7 +772,6 @@ static const struct dpu_sspp_cfg *_sspp_offset(enum dpu_sspp sspp,
> b->base_off = addr;
> b->blk_off = catalog->sspp[i].base;
> b->length = catalog->sspp[i].len;
> - b->hwversion = catalog->hwversion;
> b->log_mask = DPU_DBG_MASK_SSPP;
> return &catalog->sspp[i];
> }
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
> index ab3ef162b666..12d3b0067275 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
> @@ -288,7 +288,6 @@ static const struct dpu_mdp_cfg *_top_offset(enum dpu_mdp mdp,
> b->base_off = addr;
> b->blk_off = m->mdp[i].base;
> b->length = m->mdp[i].len;
> - b->hwversion = m->hwversion;
> b->log_mask = DPU_DBG_MASK_TOP;
> return &m->mdp[i];
> }
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h
> index e4a65eb4f769..550b2e2b3e34 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h
> @@ -21,14 +21,12 @@
> * @blk_off: pipe offset relative to mdss offset
> * @length length of register block offset
> * @xin_id xin id
> - * @hwversion mdss hw version number
> */
> struct dpu_hw_blk_reg_map {
> void __iomem *base_off;
> u32 blk_off;
> u32 length;
> u32 xin_id;
> - u32 hwversion;
> u32 log_mask;
> };
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
> index 046854c3fbed..789ecc531b43 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
> @@ -223,7 +223,6 @@ static const struct dpu_vbif_cfg *_top_offset(enum dpu_vbif vbif,
> b->base_off = addr;
> b->blk_off = m->vbif[i].base;
> b->length = m->vbif[i].len;
> - b->hwversion = m->hwversion;
> b->log_mask = DPU_DBG_MASK_VBIF;
> return &m->vbif[i];
> }
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c
> index bcccce292937..084439fdd3a0 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c
> @@ -63,7 +63,6 @@ static const struct dpu_wb_cfg *_wb_offset(enum dpu_wb wb,
> b->base_off = addr;
> b->blk_off = m->wb[i].base;
> b->length = m->wb[i].len;
> - b->hwversion = m->hwversion;
> return &m->wb[i];
> }
> }
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 4/7] drm/msm/dpu: change catalog->perf to be a const pointer
2022-06-02 13:30 ` [PATCH v2 4/7] drm/msm/dpu: change catalog->perf to be a const pointer Dmitry Baryshkov
@ 2022-06-02 19:20 ` Abhinav Kumar
0 siblings, 0 replies; 15+ messages in thread
From: Abhinav Kumar @ 2022-06-02 19:20 UTC (permalink / raw)
To: Dmitry Baryshkov, Rob Clark, Sean Paul
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno, kernel test robot
On 6/2/2022 6:30 AM, Dmitry Baryshkov wrote:
> Change dpu_mdss_cfg::perf to be a const pointer rather than embedding
> the dpu_perf_cfg struct into the struct dpu_mdss_cfg.
>
> Reported-by: kernel test robot <lkp@intel.com>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 20 +++++++++----------
> .../drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 10 +++++-----
> .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 16 +++++++--------
> .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 18 ++++++++---------
> 5 files changed, 33 insertions(+), 33 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> index a7492dd6ed65..31767d0f7353 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> @@ -53,7 +53,7 @@ static u64 _dpu_core_perf_calc_bw(struct dpu_kms *kms,
> crtc_plane_bw += pstate->plane_fetch_bw;
> }
>
> - bw_factor = kms->catalog->perf.bw_inefficiency_factor;
> + bw_factor = kms->catalog->perf->bw_inefficiency_factor;
> if (bw_factor) {
> crtc_plane_bw *= bw_factor;
> do_div(crtc_plane_bw, 100);
> @@ -90,7 +90,7 @@ static u64 _dpu_core_perf_calc_clk(struct dpu_kms *kms,
> crtc_clk = max(pstate->plane_clk, crtc_clk);
> }
>
> - clk_factor = kms->catalog->perf.clk_inefficiency_factor;
> + clk_factor = kms->catalog->perf->clk_inefficiency_factor;
> if (clk_factor) {
> crtc_clk *= clk_factor;
> do_div(crtc_clk, 100);
> @@ -128,7 +128,7 @@ static void _dpu_core_perf_calc_crtc(struct dpu_kms *kms,
> perf->core_clk_rate = kms->perf.fix_core_clk_rate;
> } else {
> perf->bw_ctl = _dpu_core_perf_calc_bw(kms, crtc);
> - perf->max_per_pipe_ib = kms->catalog->perf.min_dram_ib;
> + perf->max_per_pipe_ib = kms->catalog->perf->min_dram_ib;
> perf->core_clk_rate = _dpu_core_perf_calc_clk(kms, crtc, state);
> }
>
> @@ -189,7 +189,7 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc,
> bw = DIV_ROUND_UP_ULL(bw_sum_of_intfs, 1000);
> DRM_DEBUG_ATOMIC("calculated bandwidth=%uk\n", bw);
>
> - threshold = kms->catalog->perf.max_bw_high;
> + threshold = kms->catalog->perf->max_bw_high;
>
> DRM_DEBUG_ATOMIC("final threshold bw limit = %d\n", threshold);
>
> @@ -413,7 +413,7 @@ static ssize_t _dpu_core_perf_mode_write(struct file *file,
> const char __user *user_buf, size_t count, loff_t *ppos)
> {
> struct dpu_core_perf *perf = file->private_data;
> - struct dpu_perf_cfg *cfg = &perf->catalog->perf;
> + const struct dpu_perf_cfg *cfg = perf->catalog->perf;
> u32 perf_mode = 0;
> int ret;
>
> @@ -480,15 +480,15 @@ int dpu_core_perf_debugfs_init(struct dpu_kms *dpu_kms, struct dentry *parent)
> debugfs_create_u32("enable_bw_release", 0600, entry,
> (u32 *)&perf->enable_bw_release);
> debugfs_create_u32("threshold_low", 0600, entry,
> - (u32 *)&catalog->perf.max_bw_low);
> + (u32 *)&catalog->perf->max_bw_low);
> debugfs_create_u32("threshold_high", 0600, entry,
> - (u32 *)&catalog->perf.max_bw_high);
> + (u32 *)&catalog->perf->max_bw_high);
> debugfs_create_u32("min_core_ib", 0600, entry,
> - (u32 *)&catalog->perf.min_core_ib);
> + (u32 *)&catalog->perf->min_core_ib);
> debugfs_create_u32("min_llcc_ib", 0600, entry,
> - (u32 *)&catalog->perf.min_llcc_ib);
> + (u32 *)&catalog->perf->min_llcc_ib);
> debugfs_create_u32("min_dram_ib", 0600, entry,
> - (u32 *)&catalog->perf.min_dram_ib);
> + (u32 *)&catalog->perf->min_dram_ib);
> debugfs_create_file("perf_mode", 0600, entry,
> (u32 *)perf, &dpu_core_perf_mode_fops);
> debugfs_create_u64("fix_core_clk_rate", 0600, entry,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
> index 4829d1ce0cf8..1e4a4822fbf4 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
> @@ -104,7 +104,7 @@ static void dpu_encoder_phys_wb_set_qos(struct dpu_encoder_phys *phys_enc)
> struct dpu_hw_wb *hw_wb;
> struct dpu_hw_wb_qos_cfg qos_cfg;
> struct dpu_mdss_cfg *catalog;
> - struct dpu_qos_lut_tbl *qos_lut_tb;
> + const struct dpu_qos_lut_tbl *qos_lut_tb;
>
> if (!phys_enc || !phys_enc->dpu_kms || !phys_enc->dpu_kms->catalog) {
> DPU_ERROR("invalid parameter(s)\n");
> @@ -118,11 +118,11 @@ static void dpu_encoder_phys_wb_set_qos(struct dpu_encoder_phys *phys_enc)
> memset(&qos_cfg, 0, sizeof(struct dpu_hw_wb_qos_cfg));
> qos_cfg.danger_safe_en = true;
> qos_cfg.danger_lut =
> - catalog->perf.danger_lut_tbl[DPU_QOS_LUT_USAGE_NRT];
> + catalog->perf->danger_lut_tbl[DPU_QOS_LUT_USAGE_NRT];
>
> - qos_cfg.safe_lut = catalog->perf.safe_lut_tbl[DPU_QOS_LUT_USAGE_NRT];
> + qos_cfg.safe_lut = catalog->perf->safe_lut_tbl[DPU_QOS_LUT_USAGE_NRT];
>
> - qos_lut_tb = &catalog->perf.qos_lut_tbl[DPU_QOS_LUT_USAGE_NRT];
> + qos_lut_tb = &catalog->perf->qos_lut_tbl[DPU_QOS_LUT_USAGE_NRT];
> qos_cfg.creq_lut = _dpu_hw_get_qos_lut(qos_lut_tb, 0);
>
> if (hw_wb->ops.setup_qos_lut)
> @@ -166,7 +166,7 @@ static void dpu_encoder_phys_wb_setup_fb(struct dpu_encoder_phys *phys_enc,
> if (hw_wb->ops.setup_cdp) {
> memset(&cdp_cfg, 0, sizeof(struct dpu_hw_cdp_cfg));
>
> - cdp_cfg.enable = phys_enc->dpu_kms->catalog->perf.cdp_cfg
> + cdp_cfg.enable = phys_enc->dpu_kms->catalog->perf->cdp_cfg
> [DPU_PERF_CDP_USAGE_NRT].wr_enable;
> cdp_cfg.ubwc_meta_enable =
> DPU_FORMAT_IS_UBWC(wb_cfg->dest.format);
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index 367279371e8d..a7040ca5da72 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -1750,7 +1750,7 @@ static void msm8998_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
> .vbif_count = ARRAY_SIZE(msm8998_vbif),
> .vbif = msm8998_vbif,
> .reg_dma_count = 0,
> - .perf = msm8998_perf_data,
> + .perf = &msm8998_perf_data,
> .mdss_irqs = IRQ_SM8250_MASK,
> };
> }
> @@ -1781,7 +1781,7 @@ static void sdm845_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
> .vbif = sdm845_vbif,
> .reg_dma_count = 1,
> .dma_cfg = sdm845_regdma,
> - .perf = sdm845_perf_data,
> + .perf = &sdm845_perf_data,
> .mdss_irqs = IRQ_SDM845_MASK,
> };
> }
> @@ -1812,7 +1812,7 @@ static void sc7180_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
> .vbif = sdm845_vbif,
> .reg_dma_count = 1,
> .dma_cfg = sdm845_regdma,
> - .perf = sc7180_perf_data,
> + .perf = &sc7180_perf_data,
> .mdss_irqs = IRQ_SC7180_MASK,
> };
> }
> @@ -1845,7 +1845,7 @@ static void sm8150_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
> .vbif = sdm845_vbif,
> .reg_dma_count = 1,
> .dma_cfg = sm8150_regdma,
> - .perf = sm8150_perf_data,
> + .perf = &sm8150_perf_data,
> .mdss_irqs = IRQ_SDM845_MASK,
> };
> }
> @@ -1876,7 +1876,7 @@ static void sc8180x_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
> .vbif = sdm845_vbif,
> .reg_dma_count = 1,
> .dma_cfg = sm8150_regdma,
> - .perf = sc8180x_perf_data,
> + .perf = &sc8180x_perf_data,
> .mdss_irqs = IRQ_SC8180X_MASK,
> };
> }
> @@ -1911,7 +1911,7 @@ static void sm8250_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
> .wb = sm8250_wb,
> .reg_dma_count = 1,
> .dma_cfg = sm8250_regdma,
> - .perf = sm8250_perf_data,
> + .perf = &sm8250_perf_data,
> .mdss_irqs = IRQ_SM8250_MASK,
> };
> }
> @@ -1934,7 +1934,7 @@ static void sc7280_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
> .intf = sc7280_intf,
> .vbif_count = ARRAY_SIZE(sdm845_vbif),
> .vbif = sdm845_vbif,
> - .perf = sc7280_perf_data,
> + .perf = &sc7280_perf_data,
> .mdss_irqs = IRQ_SC7280_MASK,
> };
> }
> @@ -1966,7 +1966,7 @@ static void qcm2290_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
> .vbif = sdm845_vbif,
> .reg_dma_count = 1,
> .dma_cfg = sdm845_regdma,
> - .perf = qcm2290_perf_data,
> + .perf = &qcm2290_perf_data,
> .mdss_irqs = IRQ_SC7180_MASK,
> };
> }
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> index 4225f58d8f97..64ed96b2fa3d 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> @@ -868,7 +868,7 @@ struct dpu_mdss_cfg {
>
> /* Add additional block data structures here */
>
> - struct dpu_perf_cfg perf;
> + const struct dpu_perf_cfg *perf;
> const struct dpu_format_extended *dma_formats;
> const struct dpu_format_extended *cursor_formats;
> const struct dpu_format_extended *vig_formats;
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> index 9d2f0364d2c7..d8048b6862f9 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> @@ -160,7 +160,7 @@ static void _dpu_plane_calc_bw(struct drm_plane *plane,
> vbp = mode->vtotal - mode->vsync_end;
> vpw = mode->vsync_end - mode->vsync_start;
> vfp = mode->vsync_start - mode->vdisplay;
> - hw_latency_lines = dpu_kms->catalog->perf.min_prefill_lines;
> + hw_latency_lines = dpu_kms->catalog->perf->min_prefill_lines;
> scale_factor = src_height > dst_height ?
> mult_frac(src_height, 1, dst_height) : 1;
>
> @@ -309,7 +309,7 @@ static void _dpu_plane_set_qos_lut(struct drm_plane *plane,
> }
>
> qos_lut = _dpu_hw_get_qos_lut(
> - &pdpu->catalog->perf.qos_lut_tbl[lut_usage], total_fl);
> + &pdpu->catalog->perf->qos_lut_tbl[lut_usage], total_fl);
>
> trace_dpu_perf_set_qos_luts(pdpu->pipe - SSPP_VIG0,
> (fmt) ? fmt->base.pixel_format : 0,
> @@ -336,9 +336,9 @@ static void _dpu_plane_set_danger_lut(struct drm_plane *plane,
> u32 danger_lut, safe_lut;
>
> if (!pdpu->is_rt_pipe) {
> - danger_lut = pdpu->catalog->perf.danger_lut_tbl
> + danger_lut = pdpu->catalog->perf->danger_lut_tbl
> [DPU_QOS_LUT_USAGE_NRT];
> - safe_lut = pdpu->catalog->perf.safe_lut_tbl
> + safe_lut = pdpu->catalog->perf->safe_lut_tbl
> [DPU_QOS_LUT_USAGE_NRT];
> } else {
> fmt = dpu_get_dpu_format_ext(
> @@ -346,14 +346,14 @@ static void _dpu_plane_set_danger_lut(struct drm_plane *plane,
> fb->modifier);
>
> if (fmt && DPU_FORMAT_IS_LINEAR(fmt)) {
> - danger_lut = pdpu->catalog->perf.danger_lut_tbl
> + danger_lut = pdpu->catalog->perf->danger_lut_tbl
> [DPU_QOS_LUT_USAGE_LINEAR];
> - safe_lut = pdpu->catalog->perf.safe_lut_tbl
> + safe_lut = pdpu->catalog->perf->safe_lut_tbl
> [DPU_QOS_LUT_USAGE_LINEAR];
> } else {
> - danger_lut = pdpu->catalog->perf.danger_lut_tbl
> + danger_lut = pdpu->catalog->perf->danger_lut_tbl
> [DPU_QOS_LUT_USAGE_MACROTILE];
> - safe_lut = pdpu->catalog->perf.safe_lut_tbl
> + safe_lut = pdpu->catalog->perf->safe_lut_tbl
> [DPU_QOS_LUT_USAGE_MACROTILE];
> }
> }
> @@ -1225,7 +1225,7 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane)
>
> memset(&cdp_cfg, 0, sizeof(struct dpu_hw_cdp_cfg));
>
> - cdp_cfg.enable = pdpu->catalog->perf.cdp_cfg
> + cdp_cfg.enable = pdpu->catalog->perf->cdp_cfg
> [DPU_PERF_CDP_USAGE_RT].rd_enable;
> cdp_cfg.ubwc_meta_enable =
> DPU_FORMAT_IS_UBWC(fmt);
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 5/7] drm/msm/dpu: change catalog->dma_cfg to be a const pointer
2022-06-02 13:30 ` [PATCH v2 5/7] drm/msm/dpu: change catalog->dma_cfg " Dmitry Baryshkov
@ 2022-06-02 19:21 ` Abhinav Kumar
0 siblings, 0 replies; 15+ messages in thread
From: Abhinav Kumar @ 2022-06-02 19:21 UTC (permalink / raw)
To: Dmitry Baryshkov, Rob Clark, Sean Paul
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno, kernel test robot
On 6/2/2022 6:30 AM, Dmitry Baryshkov wrote:
> Change dpu_mdss_cfg::dma_cfg to be a const pointer rather than embedding
> the dpu_reg_dma_cfg struct into the struct dpu_mdss_cfg.
>
> Reported-by: kernel test robot <lkp@intel.com>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 12 ++++++------
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 +-
> 2 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index a7040ca5da72..5470b8b14b0a 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -1780,7 +1780,7 @@ static void sdm845_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
> .vbif_count = ARRAY_SIZE(sdm845_vbif),
> .vbif = sdm845_vbif,
> .reg_dma_count = 1,
> - .dma_cfg = sdm845_regdma,
> + .dma_cfg = &sdm845_regdma,
> .perf = &sdm845_perf_data,
> .mdss_irqs = IRQ_SDM845_MASK,
> };
> @@ -1811,7 +1811,7 @@ static void sc7180_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
> .vbif_count = ARRAY_SIZE(sdm845_vbif),
> .vbif = sdm845_vbif,
> .reg_dma_count = 1,
> - .dma_cfg = sdm845_regdma,
> + .dma_cfg = &sdm845_regdma,
> .perf = &sc7180_perf_data,
> .mdss_irqs = IRQ_SC7180_MASK,
> };
> @@ -1844,7 +1844,7 @@ static void sm8150_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
> .vbif_count = ARRAY_SIZE(sdm845_vbif),
> .vbif = sdm845_vbif,
> .reg_dma_count = 1,
> - .dma_cfg = sm8150_regdma,
> + .dma_cfg = &sm8150_regdma,
> .perf = &sm8150_perf_data,
> .mdss_irqs = IRQ_SDM845_MASK,
> };
> @@ -1875,7 +1875,7 @@ static void sc8180x_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
> .vbif_count = ARRAY_SIZE(sdm845_vbif),
> .vbif = sdm845_vbif,
> .reg_dma_count = 1,
> - .dma_cfg = sm8150_regdma,
> + .dma_cfg = &sm8150_regdma,
> .perf = &sc8180x_perf_data,
> .mdss_irqs = IRQ_SC8180X_MASK,
> };
> @@ -1910,7 +1910,7 @@ static void sm8250_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
> .wb_count = ARRAY_SIZE(sm8250_wb),
> .wb = sm8250_wb,
> .reg_dma_count = 1,
> - .dma_cfg = sm8250_regdma,
> + .dma_cfg = &sm8250_regdma,
> .perf = &sm8250_perf_data,
> .mdss_irqs = IRQ_SM8250_MASK,
> };
> @@ -1965,7 +1965,7 @@ static void qcm2290_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
> .vbif_count = ARRAY_SIZE(sdm845_vbif),
> .vbif = sdm845_vbif,
> .reg_dma_count = 1,
> - .dma_cfg = sdm845_regdma,
> + .dma_cfg = &sdm845_regdma,
> .perf = &qcm2290_perf_data,
> .mdss_irqs = IRQ_SC7180_MASK,
> };
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> index 64ed96b2fa3d..60b403ac9f0f 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> @@ -859,7 +859,7 @@ struct dpu_mdss_cfg {
> const struct dpu_wb_cfg *wb;
>
> u32 reg_dma_count;
> - struct dpu_reg_dma_cfg dma_cfg;
> + const struct dpu_reg_dma_cfg *dma_cfg;
>
> u32 ad_count;
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 6/7] drm/msm/dpu: constify struct dpu_mdss_cfg
2022-06-02 13:30 ` [PATCH v2 6/7] drm/msm/dpu: constify struct dpu_mdss_cfg Dmitry Baryshkov
@ 2022-06-02 19:32 ` Abhinav Kumar
0 siblings, 0 replies; 15+ messages in thread
From: Abhinav Kumar @ 2022-06-02 19:32 UTC (permalink / raw)
To: Dmitry Baryshkov, Rob Clark, Sean Paul
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno
On 6/2/2022 6:30 AM, Dmitry Baryshkov wrote:
> Mark struct dpu_mdss_cfg instance as a const pointer. This is mostly a
> preparation for the next patch.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 2 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 11 +++--------
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 9 ++-------
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h | 2 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 2 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 8 +++-----
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 2 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 2 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 2 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 2 +-
> 17 files changed, 29 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> index 31767d0f7353..1d9d83d7b99e 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> @@ -468,7 +468,7 @@ static const struct file_operations dpu_core_perf_mode_fops = {
> int dpu_core_perf_debugfs_init(struct dpu_kms *dpu_kms, struct dentry *parent)
> {
> struct dpu_core_perf *perf = &dpu_kms->perf;
> - struct dpu_mdss_cfg *catalog = perf->catalog;
> + const struct dpu_mdss_cfg *catalog = perf->catalog;
> struct dentry *entry;
>
> entry = debugfs_create_dir("core_perf", parent);
> @@ -517,7 +517,7 @@ void dpu_core_perf_destroy(struct dpu_core_perf *perf)
>
> int dpu_core_perf_init(struct dpu_core_perf *perf,
> struct drm_device *dev,
> - struct dpu_mdss_cfg *catalog,
> + const struct dpu_mdss_cfg *catalog,
> struct clk *core_clk)
> {
> perf->dev = dev;
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
> index 8dfcc6db7176..e3795995e145 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
> @@ -68,7 +68,7 @@ struct dpu_core_perf_tune {
> struct dpu_core_perf {
> struct drm_device *dev;
> struct dentry *debugfs_root;
> - struct dpu_mdss_cfg *catalog;
> + const struct dpu_mdss_cfg *catalog;
> struct clk *core_clk;
> u64 core_clk_rate;
> u64 max_core_clk_rate;
> @@ -119,7 +119,7 @@ void dpu_core_perf_destroy(struct dpu_core_perf *perf);
> */
> int dpu_core_perf_init(struct dpu_core_perf *perf,
> struct drm_device *dev,
> - struct dpu_mdss_cfg *catalog,
> + const struct dpu_mdss_cfg *catalog,
> struct clk *core_clk);
>
> struct dpu_kms;
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index 52516eb20cb8..460df2a4831c 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -1207,7 +1207,7 @@ static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc)
> mutex_unlock(&dpu_enc->enc_lock);
> }
>
> -static enum dpu_intf dpu_encoder_get_intf(struct dpu_mdss_cfg *catalog,
> +static enum dpu_intf dpu_encoder_get_intf(const struct dpu_mdss_cfg *catalog,
> enum dpu_intf_type type, u32 controller_id)
> {
> int i = 0;
> @@ -1224,7 +1224,7 @@ static enum dpu_intf dpu_encoder_get_intf(struct dpu_mdss_cfg *catalog,
> return INTF_MAX;
> }
>
> -static enum dpu_wb dpu_encoder_get_wb(struct dpu_mdss_cfg *catalog,
> +static enum dpu_wb dpu_encoder_get_wb(const struct dpu_mdss_cfg *catalog,
> enum dpu_intf_type type, u32 controller_id)
> {
> int i = 0;
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
> index 1e4a4822fbf4..4088c9e17d50 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
> @@ -103,7 +103,7 @@ static void dpu_encoder_phys_wb_set_qos(struct dpu_encoder_phys *phys_enc)
> {
> struct dpu_hw_wb *hw_wb;
> struct dpu_hw_wb_qos_cfg qos_cfg;
> - struct dpu_mdss_cfg *catalog;
> + const struct dpu_mdss_cfg *catalog;
> const struct dpu_qos_lut_tbl *qos_lut_tb;
>
> if (!phys_enc || !phys_enc->dpu_kms || !phys_enc->dpu_kms->catalog) {
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index 5470b8b14b0a..4fa16fdae17d 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -1985,17 +1985,12 @@ static const struct dpu_mdss_hw_cfg_handler cfg_handler[] = {
> { .hw_rev = DPU_HW_VER_720, .cfg_init = sc7280_cfg_init},
> };
>
> -void dpu_hw_catalog_deinit(struct dpu_mdss_cfg *dpu_cfg)
> -{
> - kfree(dpu_cfg);
> -}
> -
> -struct dpu_mdss_cfg *dpu_hw_catalog_init(u32 hw_rev)
> +const struct dpu_mdss_cfg *dpu_hw_catalog_init(struct device *dev, u32 hw_rev)
> {
> int i;
> struct dpu_mdss_cfg *dpu_cfg;
>
> - dpu_cfg = kzalloc(sizeof(*dpu_cfg), GFP_KERNEL);
> + dpu_cfg = devm_kzalloc(dev, sizeof(*dpu_cfg), GFP_KERNEL);
> if (!dpu_cfg)
> return ERR_PTR(-ENOMEM);
>
> @@ -2007,7 +2002,7 @@ struct dpu_mdss_cfg *dpu_hw_catalog_init(u32 hw_rev)
> }
>
> DPU_ERROR("unsupported chipset id:%X\n", hw_rev);
> - dpu_hw_catalog_deinit(dpu_cfg);
> +
> return ERR_PTR(-ENODEV);
> }
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> index 60b403ac9f0f..c317fa27daa0 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> @@ -884,16 +884,11 @@ struct dpu_mdss_hw_cfg_handler {
> /**
> * dpu_hw_catalog_init - dpu hardware catalog init API retrieves
> * hardcoded target specific catalog information in config structure
> + * @dev: DPU device
> * @hw_rev: caller needs provide the hardware revision.
> *
> * Return: dpu config structure
> */
> -struct dpu_mdss_cfg *dpu_hw_catalog_init(u32 hw_rev);
> -
> -/**
> - * dpu_hw_catalog_deinit - dpu hardware catalog cleanup
> - * @dpu_cfg: pointer returned from init function
> - */
> -void dpu_hw_catalog_deinit(struct dpu_mdss_cfg *dpu_cfg);
> +const struct dpu_mdss_cfg *dpu_hw_catalog_init(struct device *dev, u32 hw_rev);
>
> #endif /* _DPU_HW_CATALOG_H */
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
> index 6f20d6b6dddd..184a1b27b13d 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
> @@ -158,7 +158,7 @@ static void dpu_hw_dsc_config_thresh(struct dpu_hw_dsc *hw_dsc,
> }
>
> static struct dpu_dsc_cfg *_dsc_offset(enum dpu_dsc dsc,
> - struct dpu_mdss_cfg *m,
> + const struct dpu_mdss_cfg *m,
> void __iomem *addr,
> struct dpu_hw_blk_reg_map *b)
> {
> @@ -186,7 +186,7 @@ static void _setup_dsc_ops(struct dpu_hw_dsc_ops *ops,
> };
>
> struct dpu_hw_dsc *dpu_hw_dsc_init(enum dpu_dsc idx, void __iomem *addr,
> - struct dpu_mdss_cfg *m)
> + const struct dpu_mdss_cfg *m)
> {
> struct dpu_hw_dsc *c;
> struct dpu_dsc_cfg *cfg;
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h
> index 164e5f5b1002..5fab8bbba764 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h
> @@ -64,7 +64,7 @@ struct dpu_hw_dsc {
> * Returns: Error code or allocated dpu_hw_dsc context
> */
> struct dpu_hw_dsc *dpu_hw_dsc_init(enum dpu_dsc idx, void __iomem *addr,
> - struct dpu_mdss_cfg *m);
> + const struct dpu_mdss_cfg *m);
>
> /**
> * dpu_hw_dsc_destroy - destroys dsc driver context
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
> index 01bb2d84c3a0..d83503ea2419 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
> @@ -398,7 +398,7 @@ u32 dpu_core_irq_read(struct dpu_kms *dpu_kms, int irq_idx)
> return intr_status;
> }
>
> -static void __intr_offset(struct dpu_mdss_cfg *m,
> +static void __intr_offset(const struct dpu_mdss_cfg *m,
> void __iomem *addr, struct dpu_hw_blk_reg_map *hw)
> {
> hw->base_off = addr;
> @@ -406,7 +406,7 @@ static void __intr_offset(struct dpu_mdss_cfg *m,
> }
>
> struct dpu_hw_intr *dpu_hw_intr_init(void __iomem *addr,
> - struct dpu_mdss_cfg *m)
> + const struct dpu_mdss_cfg *m)
> {
> struct dpu_hw_intr *intr;
> int nirq = MDP_INTR_MAX * 32;
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
> index 4154c5e2b4ae..46443955443c 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
> @@ -67,7 +67,7 @@ struct dpu_hw_intr {
> * @m : pointer to mdss catalog data
> */
> struct dpu_hw_intr *dpu_hw_intr_init(void __iomem *addr,
> - struct dpu_mdss_cfg *m);
> + const struct dpu_mdss_cfg *m);
>
> /**
> * dpu_hw_intr_destroy(): Cleanup interrutps hw object
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> index ab7f1a4cc578..da4c7e4f304b 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> @@ -761,7 +761,7 @@ int _dpu_hw_sspp_init_debugfs(struct dpu_hw_pipe *hw_pipe, struct dpu_kms *kms,
>
> static const struct dpu_sspp_cfg *_sspp_offset(enum dpu_sspp sspp,
> void __iomem *addr,
> - struct dpu_mdss_cfg *catalog,
> + const struct dpu_mdss_cfg *catalog,
> struct dpu_hw_blk_reg_map *b)
> {
> int i;
> @@ -782,7 +782,7 @@ static const struct dpu_sspp_cfg *_sspp_offset(enum dpu_sspp sspp,
> }
>
> struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx,
> - void __iomem *addr, struct dpu_mdss_cfg *catalog,
> + void __iomem *addr, const struct dpu_mdss_cfg *catalog,
> bool is_virtual_pipe)
> {
> struct dpu_hw_pipe *hw_pipe;
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
> index a81e16657d61..7f7338fcddeb 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
> @@ -360,7 +360,7 @@ struct dpu_hw_sspp_ops {
> struct dpu_hw_pipe {
> struct dpu_hw_blk base;
> struct dpu_hw_blk_reg_map hw;
> - struct dpu_mdss_cfg *catalog;
> + const struct dpu_mdss_cfg *catalog;
> const struct dpu_mdp_cfg *mdp;
>
> /* Pipe */
> @@ -381,7 +381,7 @@ struct dpu_kms;
> * @is_virtual_pipe: is this pipe virtual pipe
> */
> struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx,
> - void __iomem *addr, struct dpu_mdss_cfg *catalog,
> + void __iomem *addr, const struct dpu_mdss_cfg *catalog,
> bool is_virtual_pipe);
>
> /**
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> index 2b9d931474e0..bba29c31f843 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> @@ -747,7 +747,7 @@ static int _dpu_kms_drm_obj_init(struct dpu_kms *dpu_kms)
> unsigned int num_encoders;
>
> struct msm_drm_private *priv;
> - struct dpu_mdss_cfg *catalog;
> + const struct dpu_mdss_cfg *catalog;
>
> int primary_planes_idx = 0, cursor_planes_idx = 0, i, ret;
> int max_crtc_count;
> @@ -844,8 +844,6 @@ static void _dpu_kms_hw_destroy(struct dpu_kms *dpu_kms)
> dpu_rm_destroy(&dpu_kms->rm);
> dpu_kms->rm_init = false;
>
> - if (dpu_kms->catalog)
> - dpu_hw_catalog_deinit(dpu_kms->catalog);
> dpu_kms->catalog = NULL;
>
> if (dpu_kms->vbif[VBIF_NRT])
> @@ -907,7 +905,7 @@ static void dpu_kms_mdp_snapshot(struct msm_disp_state *disp_state, struct msm_k
> {
> int i;
> struct dpu_kms *dpu_kms;
> - struct dpu_mdss_cfg *cat;
> + const struct dpu_mdss_cfg *cat;
> struct dpu_hw_mdp *top;
>
> dpu_kms = to_dpu_kms(kms);
> @@ -1095,7 +1093,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
>
> pr_info("dpu hardware revision:0x%x\n", dpu_kms->core_rev);
>
> - dpu_kms->catalog = dpu_hw_catalog_init(dpu_kms->core_rev);
> + dpu_kms->catalog = dpu_hw_catalog_init(dev->dev, dpu_kms->core_rev);
> if (IS_ERR_OR_NULL(dpu_kms->catalog)) {
> rc = PTR_ERR(dpu_kms->catalog);
> if (!dpu_kms->catalog)
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
> index 832a0769f2e7..ed80ed6784ee 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
> @@ -69,7 +69,7 @@ struct dpu_kms {
> struct msm_kms base;
> struct drm_device *dev;
> int core_rev;
> - struct dpu_mdss_cfg *catalog;
> + const struct dpu_mdss_cfg *catalog;
>
> /* io/register spaces: */
> void __iomem *mmio, *vbif[VBIF_MAX], *reg_dma;
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> index d8048b6862f9..71a4bdcf4ad8 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> @@ -106,7 +106,7 @@ struct dpu_plane {
> bool is_rt_pipe;
> bool is_virtual;
> struct list_head mplane_list;
> - struct dpu_mdss_cfg *catalog;
> + const struct dpu_mdss_cfg *catalog;
> };
>
> static const uint64_t supported_format_modifiers[] = {
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> index 06f03e7081bc..73b3442e7467 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> @@ -95,7 +95,7 @@ int dpu_rm_destroy(struct dpu_rm *rm)
> }
>
> int dpu_rm_init(struct dpu_rm *rm,
> - struct dpu_mdss_cfg *cat,
> + const struct dpu_mdss_cfg *cat,
> void __iomem *mmio)
> {
> int rc, i;
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
> index 2f34a31d8d0d..59de72b381f9 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
> @@ -42,7 +42,7 @@ struct dpu_rm {
> * @Return: 0 on Success otherwise -ERROR
> */
> int dpu_rm_init(struct dpu_rm *rm,
> - struct dpu_mdss_cfg *cat,
> + const struct dpu_mdss_cfg *cat,
> void __iomem *mmio);
>
> /**
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 1/7] drm/msm/dpu: use feature bit for LM combined alpha check
2022-06-02 18:37 ` Abhinav Kumar
@ 2022-06-02 20:15 ` Dmitry Baryshkov
0 siblings, 0 replies; 15+ messages in thread
From: Dmitry Baryshkov @ 2022-06-02 20:15 UTC (permalink / raw)
To: Abhinav Kumar
Cc: Rob Clark, Sean Paul, Stephen Boyd, David Airlie, Daniel Vetter,
Bjorn Andersson, linux-arm-msm, dri-devel, freedreno
On Thu, 2 Jun 2022 at 21:37, Abhinav Kumar <quic_abhinavk@quicinc.com> wrote:
>
>
>
> On 6/2/2022 6:30 AM, Dmitry Baryshkov wrote:
> > Rather than checking hwversion, follow the usual patter and add special
> > bit to the lm->features to check whether the LM has combined or separate
> > alpha registers. While we are at it, rename
> > dpu_hw_lm_setup_blend_config_sdm845() to
> > dpu_hw_lm_setup_blend_config_combined_alpha().
> >
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > ---
> > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 17 ++++++++++-------
> > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 ++
> > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 6 +++---
> > 3 files changed, 15 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> > index 400ebceb56bb..78c7d987c2ca 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> > @@ -50,9 +50,12 @@
> > #define DMA_CURSOR_MSM8998_MASK \
> > (DMA_MSM8998_MASK | BIT(DPU_SSPP_CURSOR))
> >
> > -#define MIXER_SDM845_MASK \
> > +#define MIXER_MSM8998_MASK \
> > (BIT(DPU_MIXER_SOURCESPLIT) | BIT(DPU_DIM_LAYER))
> >
> > +#define MIXER_SDM845_MASK \
> > + (BIT(DPU_MIXER_SOURCESPLIT) | BIT(DPU_DIM_LAYER) | BIT(DPU_MIXER_COMBINED_ALPHA))
> > +
> > #define MIXER_SC7180_MASK \
> > (BIT(DPU_DIM_LAYER))
> >
> > @@ -936,17 +939,17 @@ static const struct dpu_lm_sub_blks msm8998_lm_sblk = {
> > };
> >
> > static const struct dpu_lm_cfg msm8998_lm[] = {
> > - LM_BLK("lm_0", LM_0, 0x44000, MIXER_SDM845_MASK,
> > + LM_BLK("lm_0", LM_0, 0x44000, MIXER_MSM8998_MASK,
> > &msm8998_lm_sblk, PINGPONG_0, LM_2, DSPP_0),
> > - LM_BLK("lm_1", LM_1, 0x45000, MIXER_SDM845_MASK,
> > + LM_BLK("lm_1", LM_1, 0x45000, MIXER_MSM8998_MASK,
> > &msm8998_lm_sblk, PINGPONG_1, LM_5, DSPP_1),
> > - LM_BLK("lm_2", LM_2, 0x46000, MIXER_SDM845_MASK,
> > + LM_BLK("lm_2", LM_2, 0x46000, MIXER_MSM8998_MASK,
> > &msm8998_lm_sblk, PINGPONG_2, LM_0, 0),
> > - LM_BLK("lm_3", LM_3, 0x47000, MIXER_SDM845_MASK,
> > + LM_BLK("lm_3", LM_3, 0x47000, MIXER_MSM8998_MASK,
> > &msm8998_lm_sblk, PINGPONG_MAX, 0, 0),
> > - LM_BLK("lm_4", LM_4, 0x48000, MIXER_SDM845_MASK,
> > + LM_BLK("lm_4", LM_4, 0x48000, MIXER_MSM8998_MASK,
> > &msm8998_lm_sblk, PINGPONG_MAX, 0, 0),
> > - LM_BLK("lm_5", LM_5, 0x49000, MIXER_SDM845_MASK,
> > + LM_BLK("lm_5", LM_5, 0x49000, MIXER_MSM8998_MASK,
> > &msm8998_lm_sblk, PINGPONG_3, LM_1, 0),
> > };
> >
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> > index 8cb6d1f25bf9..80bc09b1f1b3 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> > @@ -145,6 +145,7 @@ enum {
> > * @DPU_MIXER_SOURCESPLIT Layer mixer supports source-split configuration
> > * @DPU_MIXER_GC Gamma correction block
> > * @DPU_DIM_LAYER Layer mixer supports dim layer
> > + * @DPU_MIXER_COMBINED_ALPHA Layer mixer has combined alpha register
> > * @DPU_MIXER_MAX maximum value
> > */
> > enum {
> > @@ -152,6 +153,7 @@ enum {
> > DPU_MIXER_SOURCESPLIT,
> > DPU_MIXER_GC,
> > DPU_DIM_LAYER,
> > + DPU_MIXER_COMBINED_ALPHA,
> > DPU_MIXER_MAX
> > };
> >
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
> > index 462f5082099e..25d2eba28e71 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
> > @@ -148,7 +148,7 @@ static int dpu_hw_lm_collect_misr(struct dpu_hw_mixer *ctx, u32 *misr_value)
> > return 0;
> > }
> >
> > -static void dpu_hw_lm_setup_blend_config_sdm845(struct dpu_hw_mixer *ctx,
> > +static void dpu_hw_lm_setup_blend_config_combined_alpha(struct dpu_hw_mixer *ctx,
> > u32 stage, u32 fg_alpha, u32 bg_alpha, u32 blend_op)
> > {
> > struct dpu_hw_blk_reg_map *c = &ctx->hw;
> > @@ -204,8 +204,8 @@ static void _setup_mixer_ops(const struct dpu_mdss_cfg *m,
> > unsigned long features)
> > {
> > ops->setup_mixer_out = dpu_hw_lm_setup_out;
> > - if (m->hwversion >= DPU_HW_VER_400)
> > - ops->setup_blend_config = dpu_hw_lm_setup_blend_config_sdm845;
> > + if (test_bit(DPU_MIXER_COMBINED_ALPHA, &features))
> > + ops->setup_blend_config = dpu_hw_lm_setup_blend_config_combined_alpha;
>
> This will not work for all chipsets.
>
> In the catalog you have added BIT(DPU_MIXER_COMBINED_ALPHA) only for
> MIXER_SDM845_MASK but MIXER_SC7180_MASK is not updated.
>
> HW version of sc7180 is > DPU_HW_VER_400 so this would break both sc7180
> and sc7280.
>
> Please update all the relevant chipset masks.
Argh, I missed the fact that the sc7180 mixer mask doesn't inherit the
sdm845 one.
BTW: I see that atoll-sde declares support for src-split. Is there any
reason why it is omitted from sc7180's mixer mask?
If there is one, could you please send a patch adding a short comment there?
>
> > else
> > ops->setup_blend_config = dpu_hw_lm_setup_blend_config;
> > ops->setup_alpha_out = dpu_hw_lm_setup_color3;
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2022-06-02 20:15 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-06-02 13:30 [PATCH v2 0/7] drm/msm: clean up the hw catalog init Dmitry Baryshkov
2022-06-02 13:30 ` [PATCH v2 1/7] drm/msm/dpu: use feature bit for LM combined alpha check Dmitry Baryshkov
2022-06-02 18:37 ` Abhinav Kumar
2022-06-02 20:15 ` Dmitry Baryshkov
2022-06-02 13:30 ` [PATCH v2 2/7] drm/msm/dpu: move VBIF_XINL_QOS_LVL_REMAP size to hw_catalog Dmitry Baryshkov
2022-06-02 18:44 ` Abhinav Kumar
2022-06-02 13:30 ` [PATCH v2 3/7] drm/msm/dpu: remove hwversion field from data structures Dmitry Baryshkov
2022-06-02 18:47 ` Abhinav Kumar
2022-06-02 13:30 ` [PATCH v2 4/7] drm/msm/dpu: change catalog->perf to be a const pointer Dmitry Baryshkov
2022-06-02 19:20 ` Abhinav Kumar
2022-06-02 13:30 ` [PATCH v2 5/7] drm/msm/dpu: change catalog->dma_cfg " Dmitry Baryshkov
2022-06-02 19:21 ` Abhinav Kumar
2022-06-02 13:30 ` [PATCH v2 6/7] drm/msm/dpu: constify struct dpu_mdss_cfg Dmitry Baryshkov
2022-06-02 19:32 ` Abhinav Kumar
2022-06-02 13:30 ` [PATCH v2 7/7] drm/msm/dpu: make dpu hardware catalog static const Dmitry Baryshkov
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