From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
Abhinav Kumar <quic_abhinavk@quicinc.com>
Cc: Stephen Boyd <swboyd@chromium.org>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org
Subject: [PATCH 3/5] drm/msm/mdss: check for core clk before accessing HW_REV
Date: Wed, 15 Jun 2022 16:59:33 +0300 [thread overview]
Message-ID: <20220615135935.87381-3-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20220615135935.87381-1-dmitry.baryshkov@linaro.org>
Rather than checking whether the platform is an mdp5 or dpu platform,
check if the MDP_CLK is provided or not before trying to access HW_REV
(and skip reading the registers if the clock is not provided by the DT).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/msm_mdss.c | 22 +++++++++++++++++-----
1 file changed, 17 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index f7b4628986b8..d81d8fe3584e 100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -32,7 +32,6 @@ struct msm_mdss {
void __iomem *mmio;
struct clk_bulk_data *clocks;
size_t num_clocks;
- bool is_mdp5;
struct {
unsigned long enabled_mask;
struct irq_domain *domain;
@@ -186,6 +185,19 @@ static void msm_mdss_setup_ubwc_dec_40(struct msm_mdss *msm_mdss,
}
}
+static bool msm_mdss_has_clock(struct msm_mdss *msm_mdss, const char *name)
+{
+ unsigned int i;
+
+ for (i = 0; i < msm_mdss->num_clocks; i++) {
+ if (!strcmp(msm_mdss->clocks[i].id, name) &&
+ msm_mdss->clocks[i].clk)
+ return true;
+ }
+
+ return false;
+}
+
static int msm_mdss_enable(struct msm_mdss *msm_mdss)
{
int ret;
@@ -198,10 +210,11 @@ static int msm_mdss_enable(struct msm_mdss *msm_mdss)
}
/*
- * HW_REV requires MDSS_MDP_CLK, which is not enabled by the mdss on
- * mdp5 hardware. Skip reading it for now.
+ * HW_REV requires MDSS_MDP_CLK, which is not used for MDSS device in
+ * older device trees. Skip accessing registers if the clock is not
+ * present.
*/
- if (msm_mdss->is_mdp5)
+ if (!msm_mdss_has_clock(msm_mdss, "core"))
return 0;
hw_rev = readl_relaxed(msm_mdss->mmio + HW_REV);
@@ -345,7 +358,6 @@ static struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5
return ERR_PTR(ret);
}
msm_mdss->num_clocks = ret;
- msm_mdss->is_mdp5 = is_mdp5;
msm_mdss->dev = &pdev->dev;
--
2.35.1
next prev parent reply other threads:[~2022-06-15 14:00 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-15 13:59 [PATCH 1/5] drm/msm: less magic numbers in msm_mdss_enable Dmitry Baryshkov
2022-06-15 13:59 ` [PATCH 2/5] drm/msm/mdss: enable optional core clock for MDP5 MDSS Dmitry Baryshkov
2022-06-18 14:23 ` Luca Weiss
2022-06-18 15:26 ` Dmitry Baryshkov
2022-06-15 13:59 ` Dmitry Baryshkov [this message]
2022-06-15 13:59 ` [PATCH 4/5] drm/msm/mdss: move is_mdp5 condition to msm_mdss_init Dmitry Baryshkov
2022-06-15 13:59 ` [PATCH 5/5] arm64: dts: qcom: add mdp_clk clock to the MDSS device Dmitry Baryshkov
2022-07-03 3:56 ` (subset) " Bjorn Andersson
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