[PATCH v3 31/34] dt-bindings: pinctrl: qcom,sdx65: fix matching pin config

Krzysztof Kozlowski
2022-09-27T17:42:15Z

The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'. Otherwise the subnodes
(level one and two) are not properly matched. This method also unifies
the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
---
.../devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml
index cdfcf29dffee..0f796f1f0104 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml
@@ -49,8 +49,10 @@ patternProperties:
oneOf:
- $ref: "#/$defs/qcom-sdx65-tlmm-state"
- patternProperties:
- ".*":
+ "-pins$":
$ref: "#/$defs/qcom-sdx65-tlmm-state"
+ additionalProperties: false
+
'$defs':
qcom-sdx65-tlmm-state:
type: object
@@ -175,13 +177,13 @@ examples:
};

uart-w-subnodes-state {
- rx {
+ rx-pins {
pins = "gpio4";
function = "blsp_uart1";
bias-pull-up;
};

- tx {
+ tx-pins {
pins = "gpio5";
function = "blsp_uart1";
bias-disable;
--
2.34.1