From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@somainline.org>,
Rob Clark <robdclark@gmail.com>
Cc: Vinod Koul <vkoul@kernel.org>,
Sai Prakash Ranjan <quic_saipraka@quicinc.com>,
linux-arm-kernel@lists.infradead.org,
linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev,
devicetree@vger.kernel.org, freedreno@lists.freedesktop.org
Subject: [RFC PATCH v2 10/11] iommu/arm-smmu-qcom: Stop using mmu500 reset for v2 MMUs
Date: Wed, 2 Nov 2022 21:44:19 +0300 [thread overview]
Message-ID: <20221102184420.534094-11-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20221102184420.534094-1-dmitry.baryshkov@linaro.org>
The arm_mmu500_reset() writes into registers specific for MMU500. For
the generic ARM SMMU v2 these registers (sACR) are defined as
'implementation defined'. Downstream Qualcomm driver for SMMUv2 doesn't
touch them.
Reviewed-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Tested-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 41 ++++++++++++++++------
1 file changed, 31 insertions(+), 10 deletions(-)
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
index 20cbb39cb670..9abc40c00f3e 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
@@ -376,7 +376,15 @@ static int qcom_sdm845_smmu500_reset(struct arm_smmu_device *smmu)
return ret;
}
-static const struct arm_smmu_impl qcom_smmu_impl = {
+static const struct arm_smmu_impl qcom_smmu_v2_impl = {
+ .init_context = qcom_smmu_init_context,
+ .cfg_probe = qcom_smmu_cfg_probe,
+ .def_domain_type = qcom_smmu_def_domain_type,
+ .write_s2cr = qcom_smmu_write_s2cr,
+ .tlb_sync = qcom_smmu_tlb_sync,
+};
+
+static const struct arm_smmu_impl qcom_smmu_500_impl = {
.init_context = qcom_smmu_init_context,
.cfg_probe = qcom_smmu_cfg_probe,
.def_domain_type = qcom_smmu_def_domain_type,
@@ -394,7 +402,15 @@ static const struct arm_smmu_impl sdm845_smmu_500_impl = {
.tlb_sync = qcom_smmu_tlb_sync,
};
-static const struct arm_smmu_impl qcom_adreno_smmu_impl = {
+static const struct arm_smmu_impl qcom_adreno_smmu_v2_impl = {
+ .init_context = qcom_adreno_smmu_init_context,
+ .def_domain_type = qcom_smmu_def_domain_type,
+ .alloc_context_bank = qcom_adreno_smmu_alloc_context_bank,
+ .write_sctlr = qcom_adreno_smmu_write_sctlr,
+ .tlb_sync = qcom_smmu_tlb_sync,
+};
+
+static const struct arm_smmu_impl qcom_adreno_smmu_500_impl = {
.init_context = qcom_adreno_smmu_init_context,
.def_domain_type = qcom_smmu_def_domain_type,
.reset = arm_mmu500_reset,
@@ -452,12 +468,17 @@ static const struct qcom_smmu_config qcom_smmu_impl0_cfg = {
*/
static const struct qcom_smmu_match_data msm8996_smmu_data = {
.impl = NULL,
- .adreno_impl = &qcom_adreno_smmu_impl,
+ .adreno_impl = &qcom_adreno_smmu_v2_impl,
+};
+
+static const struct qcom_smmu_match_data qcom_smmu_v2_data = {
+ .impl = &qcom_smmu_v2_impl,
+ .adreno_impl = &qcom_adreno_smmu_v2_impl,
};
static const struct qcom_smmu_match_data qcom_smmu_data = {
- .impl = &qcom_smmu_impl,
- .adreno_impl = &qcom_adreno_smmu_impl,
+ .impl = &qcom_smmu_500_impl,
+ .adreno_impl = &qcom_adreno_smmu_500_impl,
};
static const struct qcom_smmu_match_data sdm845_smmu_500_data = {
@@ -467,21 +488,21 @@ static const struct qcom_smmu_match_data sdm845_smmu_500_data = {
};
static const struct qcom_smmu_match_data qcom_smmu_500_impl0_data = {
- .impl = &qcom_smmu_impl,
- .adreno_impl = &qcom_adreno_smmu_impl,
+ .impl = &qcom_smmu_500_impl,
+ .adreno_impl = &qcom_adreno_smmu_500_impl,
.cfg = &qcom_smmu_impl0_cfg,
};
static const struct of_device_id __maybe_unused qcom_smmu_impl_of_match[] = {
{ .compatible = "qcom,msm8996-smmu-v2", .data = &msm8996_smmu_data },
- { .compatible = "qcom,msm8998-smmu-v2", .data = &qcom_smmu_data },
+ { .compatible = "qcom,msm8998-smmu-v2", .data = &qcom_smmu_v2_data },
{ .compatible = "qcom,qcm2290-smmu-500", .data = &qcom_smmu_500_impl0_data },
{ .compatible = "qcom,sc7180-smmu-500", .data = &qcom_smmu_500_impl0_data },
{ .compatible = "qcom,sc7280-smmu-500", .data = &qcom_smmu_500_impl0_data },
{ .compatible = "qcom,sc8180x-smmu-500", .data = &qcom_smmu_500_impl0_data },
{ .compatible = "qcom,sc8280xp-smmu-500", .data = &qcom_smmu_500_impl0_data },
- { .compatible = "qcom,sdm630-smmu-v2", .data = &qcom_smmu_data },
- { .compatible = "qcom,sdm845-smmu-v2", .data = &qcom_smmu_data },
+ { .compatible = "qcom,sdm630-smmu-v2", .data = &qcom_smmu_v2_data },
+ { .compatible = "qcom,sdm845-smmu-v2", .data = &qcom_smmu_v2_data },
{ .compatible = "qcom,sdm845-smmu-500", .data = &sdm845_smmu_500_data },
{ .compatible = "qcom,sm6125-smmu-500", .data = &qcom_smmu_500_impl0_data },
{ .compatible = "qcom,sm6350-smmu-500", .data = &qcom_smmu_500_impl0_data },
--
2.35.1
next prev parent reply other threads:[~2022-11-02 18:44 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-02 18:44 [RFC PATCH v2 00/11] iommu/arm-smmu-qcom: Rework Qualcomm SMMU bindings and implementation Dmitry Baryshkov
2022-11-02 18:44 ` [RFC PATCH v2 01/11] arm64: dts: qcom: msm8996: change order of SMMU clocks on this platform Dmitry Baryshkov
2022-11-02 20:55 ` Krzysztof Kozlowski
2022-11-08 4:36 ` (subset) " Bjorn Andersson
2022-11-02 18:44 ` [RFC PATCH v2 02/11] dt-bindings: arm-smmu: Add missing Qualcomm SMMU compatibles Dmitry Baryshkov
2022-11-02 18:44 ` [RFC PATCH v2 03/11] dt-bindings: arm-smmu: fix clocks/clock-names schema Dmitry Baryshkov
2022-11-02 20:56 ` Krzysztof Kozlowski
2022-11-02 20:56 ` Krzysztof Kozlowski
2022-11-02 18:44 ` [RFC PATCH v2 04/11] dt-bindings: arm-smmu: add special case for Google Cheza platform Dmitry Baryshkov
2022-11-02 20:59 ` Krzysztof Kozlowski
2022-11-02 18:44 ` [RFC PATCH v2 05/11] dt-bindings: arm-smmu: Add generic qcom,smmu-500 bindings Dmitry Baryshkov
2022-11-02 18:44 ` [RFC PATCH v2 06/11] iommu/arm-smmu-qcom: Move implementation data into match data Dmitry Baryshkov
2022-11-02 18:44 ` [RFC PATCH v2 07/11] iommu/arm-smmu-qcom: Move the qcom,adreno-smmu check into qcom_smmu_create Dmitry Baryshkov
2022-11-02 18:44 ` [RFC PATCH v2 08/11] iommu/arm-smmu-qcom: provide separate implementation for SDM845-smmu-500 Dmitry Baryshkov
2022-11-04 22:16 ` Richard Acayan
2022-11-05 0:02 ` Dmitry Baryshkov
2022-11-05 1:42 ` Richard Acayan
2022-11-02 18:44 ` [RFC PATCH v2 09/11] iommu/arm-smmu-qcom: Merge table from arm-smmu-qcom-debug into match data Dmitry Baryshkov
2022-11-02 18:44 ` Dmitry Baryshkov [this message]
2022-11-02 18:44 ` [RFC PATCH v2 11/11] iommu/arm-smmu-qcom: Add generic qcom,smmu-500 match entry Dmitry Baryshkov
2022-11-14 14:23 ` [RFC PATCH v2 00/11] iommu/arm-smmu-qcom: Rework Qualcomm SMMU bindings and implementation Will Deacon
2022-11-14 17:07 ` Dmitry Baryshkov
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