Re: [PATCH] arm64: dts: qcom: sdm845: correct dynamic power coefficients

[Bjorn Andersson <andersson@kernel.org>]

On Fri, Jan 06, 2023 at 05:46:18PM +0100, Vincent Guittot wrote:

Seems like using get_maintainer.pl would have saved you some trouble ;)

> While stressing EAS on my dragonboard RB3, I have noticed that LITTLE cores
> where never selected as the most energy efficient CPU whatever the
> utilization level of waking task.
> 
> energy model framework uses its cost field to estimate the energy with
> the formula:
> 
>   nrg = cost of the selected OPP * utilization / CPU's max capacity
> 
> which ends up selecting the CPU with lowest cost / max capacity ration
> as long as the utilization fits in the OPP's capacity.
> 
> If we compare the cost of a little OPP with similar capacity of a big OPP
> like :
>        OPP(kHz)   OPP capacity    cost     max capacity   cost/max capacity
> LITTLE 1766400    407             351114   407            863
> big    1056000    408             520267   1024           508
> 
> This can be interpreted as the LITTLE core consumes 70% more than big core
> for the same compute capacity.
> 
> According to [1], LITTLE consumes 10% less than big core for Coremark
> benchmark at those OPPs. If we consider that everything else stays
> unchanged, the dynamic-power-coefficient of LITTLE core should be
> only 53% of the current value: 290 * 53% = 154
> 
> Set the dynamic-power-coefficient of CPU0-3 to 154 to fix the energy model.
> 

This is sounds reasonable.

But if the math was wrong for SDM845, I would assume that sm8150 and
sm8250 are wrong as well, as that's what 0e0a8e35d725 is based on. And
should I assume that patches for other platforms are off by 53% as well?

Can you help me understand how to arrive at this number? (Without
considering everything else stays unchanged, if needed).

Regards,
Bjorn

> [1] https://github.com/kdrag0n/freqbench/tree/master/results/sdm845/main
> 
> Fixes: 0e0a8e35d725 ("arm64: dts: qcom: sdm845: correct dynamic power coefficients")
> Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 65032b94b46d..869bdb9bce6e 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -198,7 +198,7 @@ CPU0: cpu@0 {
>  			reg = <0x0 0x0>;
>  			enable-method = "psci";
>  			capacity-dmips-mhz = <611>;
> -			dynamic-power-coefficient = <290>;
> +			dynamic-power-coefficient = <154>;
>  			qcom,freq-domain = <&cpufreq_hw 0>;
>  			operating-points-v2 = <&cpu0_opp_table>;
>  			interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
> @@ -222,7 +222,7 @@ CPU1: cpu@100 {
>  			reg = <0x0 0x100>;
>  			enable-method = "psci";
>  			capacity-dmips-mhz = <611>;
> -			dynamic-power-coefficient = <290>;
> +			dynamic-power-coefficient = <154>;
>  			qcom,freq-domain = <&cpufreq_hw 0>;
>  			operating-points-v2 = <&cpu0_opp_table>;
>  			interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
> @@ -243,7 +243,7 @@ CPU2: cpu@200 {
>  			reg = <0x0 0x200>;
>  			enable-method = "psci";
>  			capacity-dmips-mhz = <611>;
> -			dynamic-power-coefficient = <290>;
> +			dynamic-power-coefficient = <154>;
>  			qcom,freq-domain = <&cpufreq_hw 0>;
>  			operating-points-v2 = <&cpu0_opp_table>;
>  			interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
> @@ -264,7 +264,7 @@ CPU3: cpu@300 {
>  			reg = <0x0 0x300>;
>  			enable-method = "psci";
>  			capacity-dmips-mhz = <611>;
> -			dynamic-power-coefficient = <290>;
> +			dynamic-power-coefficient = <154>;
>  			qcom,freq-domain = <&cpufreq_hw 0>;
>  			operating-points-v2 = <&cpu0_opp_table>;
>  			interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
> -- 
> 2.34.1
>