* [PATCH] drm/msm/dpu: fix sm8450 CTL configuration
@ 2023-01-23 8:08 Dmitry Baryshkov
2023-01-24 1:02 ` Abhinav Kumar
2023-01-26 19:00 ` Dmitry Baryshkov
0 siblings, 2 replies; 3+ messages in thread
From: Dmitry Baryshkov @ 2023-01-23 8:08 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Abhinav Kumar
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno
Correct the CTL size on sm8450 platform. This fixes the incorrect merge
of sm8350 support, which unfortunately also touched the SM8450 setup.
Fixes: 0e91bcbb0016 ("drm/msm/dpu: Add SM8350 to hw catalog")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 63a0fa3b0a17..9060dce51e2e 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -1017,31 +1017,31 @@ static const struct dpu_ctl_cfg sm8450_ctl[] = {
},
{
.name = "ctl_1", .id = CTL_1,
- .base = 0x16000, .len = 0x1e8,
+ .base = 0x16000, .len = 0x204,
.features = BIT(DPU_CTL_SPLIT_DISPLAY) | CTL_SC7280_MASK,
.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10),
},
{
.name = "ctl_2", .id = CTL_2,
- .base = 0x17000, .len = 0x1e8,
+ .base = 0x17000, .len = 0x204,
.features = CTL_SC7280_MASK,
.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 11),
},
{
.name = "ctl_3", .id = CTL_3,
- .base = 0x18000, .len = 0x1e8,
+ .base = 0x18000, .len = 0x204,
.features = CTL_SC7280_MASK,
.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 12),
},
{
.name = "ctl_4", .id = CTL_4,
- .base = 0x19000, .len = 0x1e8,
+ .base = 0x19000, .len = 0x204,
.features = CTL_SC7280_MASK,
.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 13),
},
{
.name = "ctl_5", .id = CTL_5,
- .base = 0x1a000, .len = 0x1e8,
+ .base = 0x1a000, .len = 0x204,
.features = CTL_SC7280_MASK,
.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 23),
},
--
2.39.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] drm/msm/dpu: fix sm8450 CTL configuration
2023-01-23 8:08 [PATCH] drm/msm/dpu: fix sm8450 CTL configuration Dmitry Baryshkov
@ 2023-01-24 1:02 ` Abhinav Kumar
2023-01-26 19:00 ` Dmitry Baryshkov
1 sibling, 0 replies; 3+ messages in thread
From: Abhinav Kumar @ 2023-01-24 1:02 UTC (permalink / raw)
To: Dmitry Baryshkov, Rob Clark, Sean Paul
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno
On 1/23/2023 12:08 AM, Dmitry Baryshkov wrote:
> Correct the CTL size on sm8450 platform. This fixes the incorrect merge
> of sm8350 support, which unfortunately also touched the SM8450 setup.
>
> Fixes: 0e91bcbb0016 ("drm/msm/dpu: Add SM8350 to hw catalog")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Matches the vendor DT size for sm8450, hence
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index 63a0fa3b0a17..9060dce51e2e 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -1017,31 +1017,31 @@ static const struct dpu_ctl_cfg sm8450_ctl[] = {
> },
> {
> .name = "ctl_1", .id = CTL_1,
> - .base = 0x16000, .len = 0x1e8,
> + .base = 0x16000, .len = 0x204,
> .features = BIT(DPU_CTL_SPLIT_DISPLAY) | CTL_SC7280_MASK,
> .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10),
> },
> {
> .name = "ctl_2", .id = CTL_2,
> - .base = 0x17000, .len = 0x1e8,
> + .base = 0x17000, .len = 0x204,
> .features = CTL_SC7280_MASK,
> .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 11),
> },
> {
> .name = "ctl_3", .id = CTL_3,
> - .base = 0x18000, .len = 0x1e8,
> + .base = 0x18000, .len = 0x204,
> .features = CTL_SC7280_MASK,
> .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 12),
> },
> {
> .name = "ctl_4", .id = CTL_4,
> - .base = 0x19000, .len = 0x1e8,
> + .base = 0x19000, .len = 0x204,
> .features = CTL_SC7280_MASK,
> .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 13),
> },
> {
> .name = "ctl_5", .id = CTL_5,
> - .base = 0x1a000, .len = 0x1e8,
> + .base = 0x1a000, .len = 0x204,
> .features = CTL_SC7280_MASK,
> .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 23),
> },
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] drm/msm/dpu: fix sm8450 CTL configuration
2023-01-23 8:08 [PATCH] drm/msm/dpu: fix sm8450 CTL configuration Dmitry Baryshkov
2023-01-24 1:02 ` Abhinav Kumar
@ 2023-01-26 19:00 ` Dmitry Baryshkov
1 sibling, 0 replies; 3+ messages in thread
From: Dmitry Baryshkov @ 2023-01-26 19:00 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Abhinav Kumar, Dmitry Baryshkov
Cc: Stephen Boyd, David Airlie, Daniel Vetter, Bjorn Andersson,
linux-arm-msm, dri-devel, freedreno
On Mon, 23 Jan 2023 10:08:18 +0200, Dmitry Baryshkov wrote:
> Correct the CTL size on sm8450 platform. This fixes the incorrect merge
> of sm8350 support, which unfortunately also touched the SM8450 setup.
>
>
Applied, thanks!
[1/1] drm/msm/dpu: fix sm8450 CTL configuration
https://gitlab.freedesktop.org/lumag/msm/-/commit/6c021d77e788
Best regards,
--
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
^ permalink raw reply [flat|nested] 3+ messages in thread
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2023-01-23 8:08 [PATCH] drm/msm/dpu: fix sm8450 CTL configuration Dmitry Baryshkov
2023-01-24 1:02 ` Abhinav Kumar
2023-01-26 19:00 ` Dmitry Baryshkov
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