From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
Abhinav Kumar <quic_abhinavk@quicinc.com>,
Marijn Suijten <marijn.suijten@somainline.org>
Cc: Stephen Boyd <swboyd@chromium.org>,
David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
Bjorn Andersson <andersson@kernel.org>,
linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org
Subject: [PATCH v3 16/19] drm/msm/dpu: inline WB_BLK macros
Date: Fri, 16 Jun 2023 13:03:14 +0300 [thread overview]
Message-ID: <20230616100317.500687-17-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20230616100317.500687-1-dmitry.baryshkov@linaro.org>
To simplify making changes to the hardware block definitions, expand
corresponding macros. This way making all the changes are more obvious
and visible in the source files.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 14 ++++++++++++--
.../drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h | 14 ++++++++++++--
.../drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 14 ++++++++++++--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 18 ------------------
4 files changed, 36 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
index 787af2b2f957..60e71cbc5e27 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
@@ -323,8 +323,18 @@ static const struct dpu_intf_cfg sm8250_intf[] = {
};
static const struct dpu_wb_cfg sm8250_wb[] = {
- WB_BLK("wb_2", WB_2, 0x65000, WB_SM8250_MASK, DPU_CLK_CTRL_WB2, 6,
- VBIF_RT, MDP_SSPP_TOP0_INTR, 4096, 4),
+ {
+ .name = "wb_2", .id = WB_2,
+ .base = 0x65000, .len = 0x2c8,
+ .features = WB_SM8250_MASK,
+ .format_list = wb2_formats,
+ .num_formats = ARRAY_SIZE(wb2_formats),
+ .clk_ctrl = DPU_CLK_CTRL_WB2,
+ .xin_id = 6,
+ .vbif_idx = VBIF_RT,
+ .maxlinewidth = 4096,
+ .intr_wb_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 4),
+ },
};
static const struct dpu_perf_cfg sm8250_perf_data = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
index d7d117e3af36..904c758a60df 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
@@ -148,8 +148,18 @@ static const struct dpu_intf_cfg sc7180_intf[] = {
};
static const struct dpu_wb_cfg sc7180_wb[] = {
- WB_BLK("wb_2", WB_2, 0x65000, WB_SM8250_MASK, DPU_CLK_CTRL_WB2, 6,
- VBIF_RT, MDP_SSPP_TOP0_INTR, 4096, 4),
+ {
+ .name = "wb_2", .id = WB_2,
+ .base = 0x65000, .len = 0x2c8,
+ .features = WB_SM8250_MASK,
+ .format_list = wb2_formats,
+ .num_formats = ARRAY_SIZE(wb2_formats),
+ .clk_ctrl = DPU_CLK_CTRL_WB2,
+ .xin_id = 6,
+ .vbif_idx = VBIF_RT,
+ .maxlinewidth = 4096,
+ .intr_wb_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 4),
+ },
};
static const struct dpu_perf_cfg sc7180_perf_data = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
index 3b67010f336b..7b5c9a77b102 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
@@ -176,8 +176,18 @@ static const struct dpu_dsc_cfg sc7280_dsc[] = {
};
static const struct dpu_wb_cfg sc7280_wb[] = {
- WB_BLK("wb_2", WB_2, 0x65000, WB_SM8250_MASK, DPU_CLK_CTRL_WB2, 6,
- VBIF_RT, MDP_SSPP_TOP0_INTR, 4096, 4),
+ {
+ .name = "wb_2", .id = WB_2,
+ .base = 0x65000, .len = 0x2c8,
+ .features = WB_SM8250_MASK,
+ .format_list = wb2_formats,
+ .num_formats = ARRAY_SIZE(wb2_formats),
+ .clk_ctrl = DPU_CLK_CTRL_WB2,
+ .xin_id = 6,
+ .vbif_idx = VBIF_RT,
+ .maxlinewidth = 4096,
+ .intr_wb_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 4),
+ },
};
static const struct dpu_intf_cfg sc7280_intf[] = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 3ea63ca358a4..d2bca1ec0e63 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -493,24 +493,6 @@ static const struct dpu_dsc_sub_blks dsc_sblk_1 = {
.intr_tear_rd_ptr = _tear_rd_ptr, \
}
-/*************************************************************
- * Writeback blocks config
- *************************************************************/
-#define WB_BLK(_name, _id, _base, _features, _clk_ctrl, \
- __xin_id, vbif_id, _reg, _max_linewidth, _wb_done_bit) \
- { \
- .name = _name, .id = _id, \
- .base = _base, .len = 0x2c8, \
- .features = _features, \
- .format_list = wb2_formats, \
- .num_formats = ARRAY_SIZE(wb2_formats), \
- .clk_ctrl = _clk_ctrl, \
- .xin_id = __xin_id, \
- .vbif_idx = vbif_id, \
- .maxlinewidth = _max_linewidth, \
- .intr_wb_done = DPU_IRQ_IDX(_reg, _wb_done_bit) \
- }
-
/*************************************************************
* VBIF sub blocks config
*************************************************************/
--
2.39.2
next prev parent reply other threads:[~2023-06-16 10:04 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-16 10:02 [PATCH v3 00/19] drm/msm/dpu: another catalog rework Dmitry Baryshkov
2023-06-16 10:02 ` [PATCH v3 01/19] drm/msm: enumerate DSI interfaces Dmitry Baryshkov
2023-06-16 10:03 ` [PATCH v3 02/19] drm/msm/dpu: always use MSM_DP/DSI_CONTROLLER_n Dmitry Baryshkov
2023-06-16 22:03 ` Marijn Suijten
2023-06-17 0:39 ` Dmitry Baryshkov
2023-06-16 10:03 ` [PATCH v3 03/19] drm/msm/dpu: simplify peer LM handling Dmitry Baryshkov
2023-06-16 10:03 ` [PATCH v3 04/19] drm/msm/dpu: drop dpu_mdss_cfg::mdp_count field Dmitry Baryshkov
2023-06-16 22:41 ` Marijn Suijten
2023-06-16 22:44 ` Marijn Suijten
2023-06-17 0:38 ` Dmitry Baryshkov
2023-06-16 10:03 ` [PATCH v3 05/19] drm/msm/dpu: drop enum dpu_mdp and MDP_TOP value Dmitry Baryshkov
2023-06-16 22:53 ` Marijn Suijten
2023-06-16 10:03 ` [PATCH v3 06/19] drm/msm/dpu: expand .clk_ctrls definitions Dmitry Baryshkov
2023-06-16 22:54 ` Marijn Suijten
2023-06-16 10:03 ` [PATCH v3 07/19] drm/msm/dpu: drop zero features from dpu_mdp_cfg data Dmitry Baryshkov
2023-06-16 22:54 ` Marijn Suijten
2023-06-16 10:03 ` [PATCH v3 08/19] drm/msm/dpu: drop zero features from dpu_ctl_cfg data Dmitry Baryshkov
2023-06-16 23:00 ` Marijn Suijten
2023-06-16 10:03 ` [PATCH v3 09/19] drm/msm/dpu: correct indentation for CTL definitions Dmitry Baryshkov
2023-06-16 22:31 ` Marijn Suijten
2023-06-16 10:03 ` [PATCH v3 10/19] drm/msm/dpu: inline SSPP_BLK macros Dmitry Baryshkov
2023-06-16 10:03 ` [PATCH v3 11/19] drm/msm/dpu: inline DSPP_BLK macros Dmitry Baryshkov
2023-06-16 10:03 ` [PATCH v3 12/19] drm/msm/dpu: inline LM_BLK macros Dmitry Baryshkov
2023-06-16 10:03 ` [PATCH v3 13/19] drm/msm/dpu: inline DSC_BLK and DSC_BLK_1_2 macros Dmitry Baryshkov
2023-06-16 22:59 ` Marijn Suijten
2023-06-17 0:46 ` Dmitry Baryshkov
2023-06-16 10:03 ` [PATCH v3 14/19] drm/msm/dpu: inline MERGE_3D_BLK macros Dmitry Baryshkov
2023-06-16 10:03 ` [PATCH v3 15/19] drm/msm/dpu: inline various PP_BLK_* macros Dmitry Baryshkov
2023-06-16 10:03 ` Dmitry Baryshkov [this message]
2023-06-16 10:03 ` [PATCH v3 17/19] drm/msm/dpu: inline INTF_BLK and INTF_BLK_DSI_TE macros Dmitry Baryshkov
2023-06-16 22:12 ` Marijn Suijten
2023-06-17 0:47 ` Dmitry Baryshkov
2023-06-17 0:48 ` Dmitry Baryshkov
2023-06-23 20:32 ` Marijn Suijten
2023-06-16 10:03 ` [PATCH v3 18/19] drm/msm/dpu: drop empty features mask MERGE_3D_SM8150_MASK Dmitry Baryshkov
2023-06-16 23:03 ` Marijn Suijten
2023-06-16 10:03 ` [PATCH v3 19/19] drm/msm/dpu: drop empty features mask INTF_SDM845_MASK Dmitry Baryshkov
2023-06-16 23:03 ` Marijn Suijten
2023-06-16 23:05 ` [PATCH v3 00/19] drm/msm/dpu: another catalog rework Marijn Suijten
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