* [PATCH v4 01/11] dt-bindings: phy: migrate QMP UFS PHY bindings to qcom,sc8280xp-qmp-ufs-phy.yaml
2023-07-11 14:51 [PATCH v4 00/11] phy: qcom-qmp-ufs: convert to newer style of bindings Dmitry Baryshkov
@ 2023-07-11 14:51 ` Dmitry Baryshkov
2023-07-11 14:51 ` [PATCH v4 02/11] phy: qcom-qmp-ufs: populate offsets configuration Dmitry Baryshkov
` (10 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: Dmitry Baryshkov @ 2023-07-11 14:51 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree,
Krzysztof Kozlowski
Migrate legacy bindings (described in qcom,msm8996-qmp-ufs-phy.yaml)
to qcom,sc8280xp-qmp-ufs-phy.yaml. This removes a need to declare
the child PHY node or split resource regions.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../phy/qcom,msm8996-qmp-ufs-phy.yaml | 228 ------------------
.../phy/qcom,sc8280xp-qmp-ufs-phy.yaml | 48 +++-
2 files changed, 45 insertions(+), 231 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml
diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml
deleted file mode 100644
index 881ba543fd46..000000000000
--- a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml
+++ /dev/null
@@ -1,228 +0,0 @@
-# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/phy/qcom,msm8996-qmp-ufs-phy.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Qualcomm QMP PHY controller (UFS, MSM8996)
-
-maintainers:
- - Vinod Koul <vkoul@kernel.org>
-
-description:
- QMP PHY controller supports physical layer functionality for a number of
- controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
-
- Note that these bindings are for SoCs up to SC8180X. For newer SoCs, see
- qcom,sc8280xp-qmp-ufs-phy.yaml.
-
-properties:
- compatible:
- enum:
- - qcom,msm8996-qmp-ufs-phy
- - qcom,msm8998-qmp-ufs-phy
- - qcom,sc8180x-qmp-ufs-phy
- - qcom,sdm845-qmp-ufs-phy
- - qcom,sm6115-qmp-ufs-phy
- - qcom,sm6350-qmp-ufs-phy
- - qcom,sm8150-qmp-ufs-phy
- - qcom,sm8250-qmp-ufs-phy
- - qcom,sm8350-qmp-ufs-phy
- - qcom,sm8450-qmp-ufs-phy
-
- reg:
- items:
- - description: serdes
-
- "#address-cells":
- enum: [ 1, 2 ]
-
- "#size-cells":
- enum: [ 1, 2 ]
-
- ranges: true
-
- clocks:
- minItems: 1
- maxItems: 3
-
- clock-names:
- minItems: 1
- maxItems: 3
-
- power-domains:
- maxItems: 1
-
- resets:
- maxItems: 1
-
- reset-names:
- items:
- - const: ufsphy
-
- vdda-phy-supply: true
-
- vdda-pll-supply: true
-
- vddp-ref-clk-supply: true
-
-patternProperties:
- "^phy@[0-9a-f]+$":
- type: object
- description: single PHY-provider child node
- properties:
- reg:
- minItems: 3
- maxItems: 6
-
- "#clock-cells":
- const: 1
-
- "#phy-cells":
- const: 0
-
- required:
- - reg
- - "#phy-cells"
-
- additionalProperties: false
-
-required:
- - compatible
- - reg
- - "#address-cells"
- - "#size-cells"
- - ranges
- - clocks
- - clock-names
- - resets
- - reset-names
- - vdda-phy-supply
- - vdda-pll-supply
-
-additionalProperties: false
-
-allOf:
- - if:
- properties:
- compatible:
- contains:
- enum:
- - qcom,msm8996-qmp-ufs-phy
- then:
- properties:
- clocks:
- maxItems: 1
- clock-names:
- items:
- - const: ref
-
- - if:
- properties:
- compatible:
- contains:
- enum:
- - qcom,msm8998-qmp-ufs-phy
- - qcom,sc8180x-qmp-ufs-phy
- - qcom,sdm845-qmp-ufs-phy
- - qcom,sm6115-qmp-ufs-phy
- - qcom,sm6350-qmp-ufs-phy
- - qcom,sm8150-qmp-ufs-phy
- - qcom,sm8250-qmp-ufs-phy
- then:
- properties:
- clocks:
- maxItems: 2
- clock-names:
- items:
- - const: ref
- - const: ref_aux
-
- - if:
- properties:
- compatible:
- contains:
- enum:
- - qcom,sm8450-qmp-ufs-phy
- then:
- properties:
- clocks:
- maxItems: 3
- clock-names:
- items:
- - const: ref
- - const: ref_aux
- - const: qref
-
- - if:
- properties:
- compatible:
- contains:
- enum:
- - qcom,msm8998-qmp-ufs-phy
- - qcom,sc8180x-qmp-ufs-phy
- - qcom,sdm845-qmp-ufs-phy
- - qcom,sm6350-qmp-ufs-phy
- - qcom,sm8150-qmp-ufs-phy
- - qcom,sm8250-qmp-ufs-phy
- - qcom,sm8350-qmp-ufs-phy
- - qcom,sm8450-qmp-ufs-phy
- then:
- patternProperties:
- "^phy@[0-9a-f]+$":
- properties:
- reg:
- items:
- - description: TX lane 1
- - description: RX lane 1
- - description: PCS
- - description: TX lane 2
- - description: RX lane 2
-
- - if:
- properties:
- compatible:
- contains:
- enum:
- - qcom,msm8996-qmp-ufs-phy
- - qcom,sm6115-qmp-ufs-phy
- then:
- patternProperties:
- "^phy@[0-9a-f]+$":
- properties:
- reg:
- items:
- - description: TX
- - description: RX
- - description: PCS
-
-examples:
- - |
- #include <dt-bindings/clock/qcom,gcc-sm8250.h>
- #include <dt-bindings/clock/qcom,rpmh.h>
-
- phy-wrapper@1d87000 {
- compatible = "qcom,sm8250-qmp-ufs-phy";
- reg = <0x01d87000 0x1c0>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x01d87000 0x1000>;
-
- clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
- clock-names = "ref", "ref_aux";
-
- resets = <&ufs_mem_hc 0>;
- reset-names = "ufsphy";
-
- vdda-phy-supply = <&vreg_l6b>;
- vdda-pll-supply = <&vreg_l3b>;
-
- phy@400 {
- reg = <0x400 0x108>,
- <0x600 0x1e0>,
- <0xc00 0x1dc>,
- <0x800 0x108>,
- <0xa00 0x1e0>;
- #phy-cells = <0>;
- };
- };
diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml
index a1897a7606df..d981d77e82e4 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml
@@ -16,21 +16,31 @@ description:
properties:
compatible:
enum:
+ - qcom,msm8996-qmp-ufs-phy
+ - qcom,msm8998-qmp-ufs-phy
- qcom,sa8775p-qmp-ufs-phy
+ - qcom,sc8180x-qmp-ufs-phy
- qcom,sc8280xp-qmp-ufs-phy
+ - qcom,sdm845-qmp-ufs-phy
+ - qcom,sm6115-qmp-ufs-phy
- qcom,sm6125-qmp-ufs-phy
+ - qcom,sm6350-qmp-ufs-phy
- qcom,sm7150-qmp-ufs-phy
+ - qcom,sm8150-qmp-ufs-phy
+ - qcom,sm8250-qmp-ufs-phy
+ - qcom,sm8350-qmp-ufs-phy
+ - qcom,sm8450-qmp-ufs-phy
- qcom,sm8550-qmp-ufs-phy
reg:
maxItems: 1
clocks:
- minItems: 2
+ minItems: 1
maxItems: 3
clock-names:
- minItems: 2
+ minItems: 1
items:
- const: ref
- const: ref_aux
@@ -75,19 +85,51 @@ allOf:
contains:
enum:
- qcom,sa8775p-qmp-ufs-phy
+ - qcom,sm8450-qmp-ufs-phy
then:
properties:
clocks:
minItems: 3
clock-names:
minItems: 3
- else:
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,msm8998-qmp-ufs-phy
+ - qcom,sc8180x-qmp-ufs-phy
+ - qcom,sc8280xp-qmp-ufs-phy
+ - qcom,sdm845-qmp-ufs-phy
+ - qcom,sm6115-qmp-ufs-phy
+ - qcom,sm6125-qmp-ufs-phy
+ - qcom,sm6350-qmp-ufs-phy
+ - qcom,sm7150-qmp-ufs-phy
+ - qcom,sm8150-qmp-ufs-phy
+ - qcom,sm8250-qmp-ufs-phy
+ - qcom,sm8350-qmp-ufs-phy
+ - qcom,sm8550-qmp-ufs-phy
+ then:
properties:
clocks:
maxItems: 2
clock-names:
maxItems: 2
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,msm8996-qmp-ufs-phy
+ then:
+ properties:
+ clocks:
+ maxItems: 1
+ clock-names:
+ maxItems: 1
+
additionalProperties: false
examples:
--
2.39.2
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v4 02/11] phy: qcom-qmp-ufs: populate offsets configuration
2023-07-11 14:51 [PATCH v4 00/11] phy: qcom-qmp-ufs: convert to newer style of bindings Dmitry Baryshkov
2023-07-11 14:51 ` [PATCH v4 01/11] dt-bindings: phy: migrate QMP UFS PHY bindings to qcom,sc8280xp-qmp-ufs-phy.yaml Dmitry Baryshkov
@ 2023-07-11 14:51 ` Dmitry Baryshkov
2023-07-11 14:51 ` [PATCH v4 03/11] arm64: dts: qcom: msm8996: switch UFS QMP PHY to new style of bindings Dmitry Baryshkov
` (9 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: Dmitry Baryshkov @ 2023-07-11 14:51 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
Populate offsets configuration for the rest of UFS PHYs to make it
possible to switch them to the new (single-node) bindings style.
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
index 8c877b668bb9..d99dc1043f74 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
@@ -833,6 +833,8 @@ static const struct qmp_ufs_offsets qmp_ufs_offsets_v6 = {
static const struct qmp_phy_cfg msm8996_ufsphy_cfg = {
.lanes = 1,
+ .offsets = &qmp_ufs_offsets,
+
.tbls = {
.serdes = msm8996_ufsphy_serdes,
.serdes_num = ARRAY_SIZE(msm8996_ufsphy_serdes),
@@ -924,6 +926,8 @@ static const struct qmp_phy_cfg sc8280xp_ufsphy_cfg = {
static const struct qmp_phy_cfg sdm845_ufsphy_cfg = {
.lanes = 2,
+ .offsets = &qmp_ufs_offsets,
+
.tbls = {
.serdes = sdm845_ufsphy_serdes,
.serdes_num = ARRAY_SIZE(sdm845_ufsphy_serdes),
@@ -1038,6 +1042,8 @@ static const struct qmp_phy_cfg sm8150_ufsphy_cfg = {
static const struct qmp_phy_cfg sm8250_ufsphy_cfg = {
.lanes = 2,
+ .offsets = &qmp_ufs_offsets,
+
.tbls = {
.serdes = sm8150_ufsphy_serdes,
.serdes_num = ARRAY_SIZE(sm8150_ufsphy_serdes),
@@ -1070,6 +1076,8 @@ static const struct qmp_phy_cfg sm8250_ufsphy_cfg = {
static const struct qmp_phy_cfg sm8350_ufsphy_cfg = {
.lanes = 2,
+ .offsets = &qmp_ufs_offsets,
+
.tbls = {
.serdes = sm8350_ufsphy_serdes,
.serdes_num = ARRAY_SIZE(sm8350_ufsphy_serdes),
@@ -1102,6 +1110,8 @@ static const struct qmp_phy_cfg sm8350_ufsphy_cfg = {
static const struct qmp_phy_cfg sm8450_ufsphy_cfg = {
.lanes = 2,
+ .offsets = &qmp_ufs_offsets,
+
.tbls = {
.serdes = sm8350_ufsphy_serdes,
.serdes_num = ARRAY_SIZE(sm8350_ufsphy_serdes),
--
2.39.2
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v4 03/11] arm64: dts: qcom: msm8996: switch UFS QMP PHY to new style of bindings
2023-07-11 14:51 [PATCH v4 00/11] phy: qcom-qmp-ufs: convert to newer style of bindings Dmitry Baryshkov
2023-07-11 14:51 ` [PATCH v4 01/11] dt-bindings: phy: migrate QMP UFS PHY bindings to qcom,sc8280xp-qmp-ufs-phy.yaml Dmitry Baryshkov
2023-07-11 14:51 ` [PATCH v4 02/11] phy: qcom-qmp-ufs: populate offsets configuration Dmitry Baryshkov
@ 2023-07-11 14:51 ` Dmitry Baryshkov
2023-07-11 14:51 ` [PATCH v4 04/11] arm64: dts: qcom: msm8998: " Dmitry Baryshkov
` (8 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: Dmitry Baryshkov @ 2023-07-11 14:51 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 25 +++++++++----------------
1 file changed, 9 insertions(+), 16 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index de20e62284cc..a2822d7dcd44 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -728,9 +728,9 @@ gcc: clock-controller@300000 {
<&pciephy_1>,
<&pciephy_2>,
<&ssusb_phy_0>,
- <&ufsphy_lane 0>,
- <&ufsphy_lane 1>,
- <&ufsphy_lane 2>;
+ <&ufsphy 0>,
+ <&ufsphy 1>,
+ <&ufsphy 2>;
clock-names = "cxo",
"cxo2",
"sleep_clk",
@@ -1995,7 +1995,7 @@ ufshc: ufshc@624000 {
reg = <0x00624000 0x2500>;
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&ufsphy_lane>;
+ phys = <&ufsphy>;
phy-names = "ufsphy";
power-domains = <&gcc UFS_GDSC>;
@@ -2048,25 +2048,18 @@ ufshc: ufshc@624000 {
ufsphy: phy@627000 {
compatible = "qcom,msm8996-qmp-ufs-phy";
- reg = <0x00627000 0x1c4>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
+ reg = <0x00627000 0x1000>;
clocks = <&gcc GCC_UFS_CLKREF_CLK>;
clock-names = "ref";
resets = <&ufshc 0>;
reset-names = "ufsphy";
- status = "disabled";
- ufsphy_lane: phy@627400 {
- reg = <0x627400 0x12c>,
- <0x627600 0x200>,
- <0x627c00 0x1b4>;
- #clock-cells = <1>;
- #phy-cells = <0>;
- };
+ #clock-cells = <1>;
+ #phy-cells = <0>;
+
+ status = "disabled";
};
camss: camss@a34000 {
--
2.39.2
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v4 04/11] arm64: dts: qcom: msm8998: switch UFS QMP PHY to new style of bindings
2023-07-11 14:51 [PATCH v4 00/11] phy: qcom-qmp-ufs: convert to newer style of bindings Dmitry Baryshkov
` (2 preceding siblings ...)
2023-07-11 14:51 ` [PATCH v4 03/11] arm64: dts: qcom: msm8996: switch UFS QMP PHY to new style of bindings Dmitry Baryshkov
@ 2023-07-11 14:51 ` Dmitry Baryshkov
2023-07-11 14:51 ` [PATCH v4 05/11] arm64: dts: qcom: sdm845: " Dmitry Baryshkov
` (7 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: Dmitry Baryshkov @ 2023-07-11 14:51 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 18 ++++--------------
1 file changed, 4 insertions(+), 14 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index 78867cb00875..31ea64abe4d1 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -984,7 +984,7 @@ ufshc: ufshc@1da4000 {
compatible = "qcom,msm8998-ufshc", "qcom,ufshc", "jedec,ufs-2.0";
reg = <0x01da4000 0x2500>;
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&ufsphy_lanes>;
+ phys = <&ufsphy>;
phy-names = "ufsphy";
lanes-per-direction = <2>;
power-domains = <&gcc UFS_GDSC>;
@@ -1025,11 +1025,7 @@ ufshc: ufshc@1da4000 {
ufsphy: phy@1da7000 {
compatible = "qcom,msm8998-qmp-ufs-phy";
- reg = <0x01da7000 0x18c>;
- #address-cells = <1>;
- #size-cells = <1>;
- status = "disabled";
- ranges;
+ reg = <0x01da7000 0x1000>;
clock-names =
"ref",
@@ -1041,14 +1037,8 @@ ufsphy: phy@1da7000 {
reset-names = "ufsphy";
resets = <&ufshc 0>;
- ufsphy_lanes: phy@1da7400 {
- reg = <0x01da7400 0x128>,
- <0x01da7600 0x1fc>,
- <0x01da7c00 0x1dc>,
- <0x01da7800 0x128>,
- <0x01da7a00 0x1fc>;
- #phy-cells = <0>;
- };
+ #phy-cells = <0>;
+ status = "disabled";
};
tcsr_mutex: hwlock@1f40000 {
--
2.39.2
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v4 05/11] arm64: dts: qcom: sdm845: switch UFS QMP PHY to new style of bindings
2023-07-11 14:51 [PATCH v4 00/11] phy: qcom-qmp-ufs: convert to newer style of bindings Dmitry Baryshkov
` (3 preceding siblings ...)
2023-07-11 14:51 ` [PATCH v4 04/11] arm64: dts: qcom: msm8998: " Dmitry Baryshkov
@ 2023-07-11 14:51 ` Dmitry Baryshkov
2023-07-11 14:51 ` [PATCH v4 06/11] arm64: dts: qcom: sm6115: " Dmitry Baryshkov
` (6 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: Dmitry Baryshkov @ 2023-07-11 14:51 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 19 +++++--------------
1 file changed, 5 insertions(+), 14 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 7cb9ee2765f7..30a63f4b19c4 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -2575,7 +2575,7 @@ ufs_mem_hc: ufshc@1d84000 {
<0 0x01d90000 0 0x8000>;
reg-names = "std", "ice";
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&ufs_mem_phy_lanes>;
+ phys = <&ufs_mem_phy>;
phy-names = "ufsphy";
lanes-per-direction = <2>;
power-domains = <&gcc UFS_PHY_GDSC>;
@@ -2621,10 +2621,8 @@ ufs_mem_hc: ufshc@1d84000 {
ufs_mem_phy: phy@1d87000 {
compatible = "qcom,sdm845-qmp-ufs-phy";
- reg = <0 0x01d87000 0 0x18c>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ reg = <0 0x01d87000 0 0x1000>;
+
clock-names = "ref",
"ref_aux";
clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
@@ -2632,16 +2630,9 @@ ufs_mem_phy: phy@1d87000 {
resets = <&ufs_mem_hc 0>;
reset-names = "ufsphy";
- status = "disabled";
- ufs_mem_phy_lanes: phy@1d87400 {
- reg = <0 0x01d87400 0 0x108>,
- <0 0x01d87600 0 0x1e0>,
- <0 0x01d87c00 0 0x1dc>,
- <0 0x01d87800 0 0x108>,
- <0 0x01d87a00 0 0x1e0>;
- #phy-cells = <0>;
- };
+ #phy-cells = <0>;
+ status = "disabled";
};
cryptobam: dma-controller@1dc4000 {
--
2.39.2
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v4 06/11] arm64: dts: qcom: sm6115: switch UFS QMP PHY to new style of bindings
2023-07-11 14:51 [PATCH v4 00/11] phy: qcom-qmp-ufs: convert to newer style of bindings Dmitry Baryshkov
` (4 preceding siblings ...)
2023-07-11 14:51 ` [PATCH v4 05/11] arm64: dts: qcom: sdm845: " Dmitry Baryshkov
@ 2023-07-11 14:51 ` Dmitry Baryshkov
2023-07-11 14:51 ` [PATCH v4 07/11] arm64: dts: qcom: sm6350: " Dmitry Baryshkov
` (5 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: Dmitry Baryshkov @ 2023-07-11 14:51 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sm6115.dtsi | 17 +++++------------
1 file changed, 5 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index 9f2c968e3ad7..0adbc827ee1b 100644
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -983,7 +983,7 @@ ufs_mem_hc: ufs@4804000 {
reg = <0x0 0x04804000 0x0 0x3000>, <0x0 0x04810000 0x0 0x8000>;
reg-names = "std", "ice";
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&ufs_mem_phy_lanes>;
+ phys = <&ufs_mem_phy>;
phy-names = "ufsphy";
lanes-per-direction = <1>;
#reset-cells = <1>;
@@ -1024,24 +1024,17 @@ ufs_mem_hc: ufs@4804000 {
ufs_mem_phy: phy@4807000 {
compatible = "qcom,sm6115-qmp-ufs-phy";
- reg = <0x0 0x04807000 0x0 0x1c4>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ reg = <0x0 0x04807000 0x0 0x1000>;
clocks = <&gcc GCC_UFS_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
clock-names = "ref", "ref_aux";
resets = <&ufs_mem_hc 0>;
reset-names = "ufsphy";
- status = "disabled";
- ufs_mem_phy_lanes: phy@4807400 {
- reg = <0x0 0x04807400 0x0 0x098>,
- <0x0 0x04807600 0x0 0x130>,
- <0x0 0x04807c00 0x0 0x16c>;
- #phy-cells = <0>;
- };
+ #phy-cells = <0>;
+
+ status = "disabled";
};
gpi_dma0: dma-controller@4a00000 {
--
2.39.2
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v4 07/11] arm64: dts: qcom: sm6350: switch UFS QMP PHY to new style of bindings
2023-07-11 14:51 [PATCH v4 00/11] phy: qcom-qmp-ufs: convert to newer style of bindings Dmitry Baryshkov
` (5 preceding siblings ...)
2023-07-11 14:51 ` [PATCH v4 06/11] arm64: dts: qcom: sm6115: " Dmitry Baryshkov
@ 2023-07-11 14:51 ` Dmitry Baryshkov
2023-07-11 14:51 ` [PATCH v4 08/11] arm64: dts: qcom: sm8150: " Dmitry Baryshkov
` (4 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: Dmitry Baryshkov @ 2023-07-11 14:51 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 18 ++++--------------
1 file changed, 4 insertions(+), 14 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index c2b5d56ba242..cf12426daf67 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -1142,7 +1142,7 @@ ufs_mem_hc: ufs@1d84000 {
<0 0x01d90000 0 0x8000>;
reg-names = "std", "ice";
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&ufs_mem_phy_lanes>;
+ phys = <&ufs_mem_phy>;
phy-names = "ufsphy";
lanes-per-direction = <2>;
#reset-cells = <1>;
@@ -1187,10 +1187,7 @@ ufs_mem_hc: ufs@1d84000 {
ufs_mem_phy: phy@1d87000 {
compatible = "qcom,sm6350-qmp-ufs-phy";
- reg = <0 0x01d87000 0 0x18c>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ reg = <0 0x01d87000 0 0x1000>;
clock-names = "ref",
"ref_aux";
@@ -1200,16 +1197,9 @@ ufs_mem_phy: phy@1d87000 {
resets = <&ufs_mem_hc 0>;
reset-names = "ufsphy";
- status = "disabled";
+ #phy-cells = <0>;
- ufs_mem_phy_lanes: phy@1d87400 {
- reg = <0 0x01d87400 0 0x128>,
- <0 0x01d87600 0 0x1fc>,
- <0 0x01d87c00 0 0x1dc>,
- <0 0x01d87800 0 0x128>,
- <0 0x01d87a00 0 0x1fc>;
- #phy-cells = <0>;
- };
+ status = "disabled";
};
ipa: ipa@1e40000 {
--
2.39.2
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v4 08/11] arm64: dts: qcom: sm8150: switch UFS QMP PHY to new style of bindings
2023-07-11 14:51 [PATCH v4 00/11] phy: qcom-qmp-ufs: convert to newer style of bindings Dmitry Baryshkov
` (6 preceding siblings ...)
2023-07-11 14:51 ` [PATCH v4 07/11] arm64: dts: qcom: sm6350: " Dmitry Baryshkov
@ 2023-07-11 14:51 ` Dmitry Baryshkov
2023-07-11 14:51 ` [PATCH v4 09/11] arm64: dts: qcom: sm8250: " Dmitry Baryshkov
` (3 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: Dmitry Baryshkov @ 2023-07-11 14:51 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 20 ++++++--------------
1 file changed, 6 insertions(+), 14 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 6ff7cdacd44d..4381527da3fb 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -2025,7 +2025,7 @@ ufs_mem_hc: ufshc@1d84000 {
<0 0x01d90000 0 0x8000>;
reg-names = "std", "ice";
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&ufs_mem_phy_lanes>;
+ phys = <&ufs_mem_phy>;
phy-names = "ufsphy";
lanes-per-direction = <2>;
#reset-cells = <1>;
@@ -2070,10 +2070,8 @@ ufs_mem_hc: ufshc@1d84000 {
ufs_mem_phy: phy@1d87000 {
compatible = "qcom,sm8150-qmp-ufs-phy";
- reg = <0 0x01d87000 0 0x1c0>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ reg = <0 0x01d87000 0 0x1000>;
+
clock-names = "ref",
"ref_aux";
clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
@@ -2083,16 +2081,10 @@ ufs_mem_phy: phy@1d87000 {
resets = <&ufs_mem_hc 0>;
reset-names = "ufsphy";
- status = "disabled";
- ufs_mem_phy_lanes: phy@1d87400 {
- reg = <0 0x01d87400 0 0x16c>,
- <0 0x01d87600 0 0x200>,
- <0 0x01d87c00 0 0x200>,
- <0 0x01d87800 0 0x16c>,
- <0 0x01d87a00 0 0x200>;
- #phy-cells = <0>;
- };
+ #phy-cells = <0>;
+
+ status = "disabled";
};
cryptobam: dma-controller@1dc4000 {
--
2.39.2
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v4 09/11] arm64: dts: qcom: sm8250: switch UFS QMP PHY to new style of bindings
2023-07-11 14:51 [PATCH v4 00/11] phy: qcom-qmp-ufs: convert to newer style of bindings Dmitry Baryshkov
` (7 preceding siblings ...)
2023-07-11 14:51 ` [PATCH v4 08/11] arm64: dts: qcom: sm8150: " Dmitry Baryshkov
@ 2023-07-11 14:51 ` Dmitry Baryshkov
2023-07-11 14:51 ` [PATCH v4 10/11] arm64: dts: qcom: sm8350: " Dmitry Baryshkov
` (2 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: Dmitry Baryshkov @ 2023-07-11 14:51 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 20 ++++++--------------
1 file changed, 6 insertions(+), 14 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index d522dea65ba7..ee6a16ed0a91 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2169,7 +2169,7 @@ ufs_mem_hc: ufshc@1d84000 {
"jedec,ufs-2.0";
reg = <0 0x01d84000 0 0x3000>;
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&ufs_mem_phy_lanes>;
+ phys = <&ufs_mem_phy>;
phy-names = "ufsphy";
lanes-per-direction = <2>;
#reset-cells = <1>;
@@ -2213,10 +2213,8 @@ ufs_mem_hc: ufshc@1d84000 {
ufs_mem_phy: phy@1d87000 {
compatible = "qcom,sm8250-qmp-ufs-phy";
- reg = <0 0x01d87000 0 0x1c0>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ reg = <0 0x01d87000 0 0x1000>;
+
clock-names = "ref",
"ref_aux";
clocks = <&rpmhcc RPMH_CXO_CLK>,
@@ -2224,16 +2222,10 @@ ufs_mem_phy: phy@1d87000 {
resets = <&ufs_mem_hc 0>;
reset-names = "ufsphy";
- status = "disabled";
- ufs_mem_phy_lanes: phy@1d87400 {
- reg = <0 0x01d87400 0 0x16c>,
- <0 0x01d87600 0 0x200>,
- <0 0x01d87c00 0 0x200>,
- <0 0x01d87800 0 0x16c>,
- <0 0x01d87a00 0 0x200>;
- #phy-cells = <0>;
- };
+ #phy-cells = <0>;
+
+ status = "disabled";
};
cryptobam: dma-controller@1dc4000 {
--
2.39.2
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v4 10/11] arm64: dts: qcom: sm8350: switch UFS QMP PHY to new style of bindings
2023-07-11 14:51 [PATCH v4 00/11] phy: qcom-qmp-ufs: convert to newer style of bindings Dmitry Baryshkov
` (8 preceding siblings ...)
2023-07-11 14:51 ` [PATCH v4 09/11] arm64: dts: qcom: sm8250: " Dmitry Baryshkov
@ 2023-07-11 14:51 ` Dmitry Baryshkov
2023-07-11 14:51 ` [PATCH v4 11/11] arm64: dts: qcom: sm8450: " Dmitry Baryshkov
2023-07-12 5:01 ` (subset) [PATCH v4 00/11] phy: qcom-qmp-ufs: convert to newer " Vinod Koul
11 siblings, 0 replies; 13+ messages in thread
From: Dmitry Baryshkov @ 2023-07-11 14:51 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 28 ++++++++++------------------
1 file changed, 10 insertions(+), 18 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index 557a3d8e889b..45111e20e265 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -673,9 +673,9 @@ gcc: clock-controller@100000 {
<0>,
<0>,
<0>,
- <&ufs_mem_phy_lanes 0>,
- <&ufs_mem_phy_lanes 1>,
- <&ufs_mem_phy_lanes 2>,
+ <&ufs_mem_phy 0>,
+ <&ufs_mem_phy 1>,
+ <&ufs_mem_phy 2>,
<&usb_1_qmpphy QMP_USB43DP_USB3_PIPE_CLK>,
<0>;
};
@@ -1675,7 +1675,7 @@ ufs_mem_hc: ufshc@1d84000 {
"jedec,ufs-2.0";
reg = <0 0x01d84000 0 0x3000>;
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&ufs_mem_phy_lanes>;
+ phys = <&ufs_mem_phy>;
phy-names = "ufsphy";
lanes-per-direction = <2>;
#reset-cells = <1>;
@@ -1719,10 +1719,8 @@ ufs_mem_hc: ufshc@1d84000 {
ufs_mem_phy: phy@1d87000 {
compatible = "qcom,sm8350-qmp-ufs-phy";
- reg = <0 0x01d87000 0 0x1c4>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ reg = <0 0x01d87000 0 0x1000>;
+
clock-names = "ref",
"ref_aux";
clocks = <&rpmhcc RPMH_CXO_CLK>,
@@ -1730,17 +1728,11 @@ ufs_mem_phy: phy@1d87000 {
resets = <&ufs_mem_hc 0>;
reset-names = "ufsphy";
- status = "disabled";
- ufs_mem_phy_lanes: phy@1d87400 {
- reg = <0 0x01d87400 0 0x188>,
- <0 0x01d87600 0 0x200>,
- <0 0x01d87c00 0 0x200>,
- <0 0x01d87800 0 0x188>,
- <0 0x01d87a00 0 0x200>;
- #clock-cells = <1>;
- #phy-cells = <0>;
- };
+ #clock-cells = <1>;
+ #phy-cells = <0>;
+
+ status = "disabled";
};
cryptobam: dma-controller@1dc4000 {
--
2.39.2
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v4 11/11] arm64: dts: qcom: sm8450: switch UFS QMP PHY to new style of bindings
2023-07-11 14:51 [PATCH v4 00/11] phy: qcom-qmp-ufs: convert to newer style of bindings Dmitry Baryshkov
` (9 preceding siblings ...)
2023-07-11 14:51 ` [PATCH v4 10/11] arm64: dts: qcom: sm8350: " Dmitry Baryshkov
@ 2023-07-11 14:51 ` Dmitry Baryshkov
2023-07-12 5:01 ` (subset) [PATCH v4 00/11] phy: qcom-qmp-ufs: convert to newer " Vinod Koul
11 siblings, 0 replies; 13+ messages in thread
From: Dmitry Baryshkov @ 2023-07-11 14:51 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 28 ++++++++++------------------
1 file changed, 10 insertions(+), 18 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 1668d97ce459..e130e66e8a53 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -751,9 +751,9 @@ gcc: clock-controller@100000 {
<&pcie0_lane>,
<&pcie1_lane>,
<0>,
- <&ufs_mem_phy_lanes 0>,
- <&ufs_mem_phy_lanes 1>,
- <&ufs_mem_phy_lanes 2>,
+ <&ufs_mem_phy 0>,
+ <&ufs_mem_phy 1>,
+ <&ufs_mem_phy 2>,
<&usb_1_qmpphy QMP_USB43DP_USB3_PIPE_CLK>;
clock-names = "bi_tcxo",
"sleep_clk",
@@ -4122,7 +4122,7 @@ ufs_mem_hc: ufshc@1d84000 {
"jedec,ufs-2.0";
reg = <0 0x01d84000 0 0x3000>;
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&ufs_mem_phy_lanes>;
+ phys = <&ufs_mem_phy>;
phy-names = "ufsphy";
lanes-per-direction = <2>;
#reset-cells = <1>;
@@ -4171,10 +4171,8 @@ ufs_mem_hc: ufshc@1d84000 {
ufs_mem_phy: phy@1d87000 {
compatible = "qcom,sm8450-qmp-ufs-phy";
- reg = <0 0x01d87000 0 0x1c4>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ reg = <0 0x01d87000 0 0x1000>;
+
clock-names = "ref", "ref_aux", "qref";
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
@@ -4182,17 +4180,11 @@ ufs_mem_phy: phy@1d87000 {
resets = <&ufs_mem_hc 0>;
reset-names = "ufsphy";
- status = "disabled";
- ufs_mem_phy_lanes: phy@1d87400 {
- reg = <0 0x01d87400 0 0x188>,
- <0 0x01d87600 0 0x200>,
- <0 0x01d87c00 0 0x200>,
- <0 0x01d87800 0 0x188>,
- <0 0x01d87a00 0 0x200>;
- #clock-cells = <1>;
- #phy-cells = <0>;
- };
+ #clock-cells = <1>;
+ #phy-cells = <0>;
+
+ status = "disabled";
};
ice: crypto@1d88000 {
--
2.39.2
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: (subset) [PATCH v4 00/11] phy: qcom-qmp-ufs: convert to newer style of bindings
2023-07-11 14:51 [PATCH v4 00/11] phy: qcom-qmp-ufs: convert to newer style of bindings Dmitry Baryshkov
` (10 preceding siblings ...)
2023-07-11 14:51 ` [PATCH v4 11/11] arm64: dts: qcom: sm8450: " Dmitry Baryshkov
@ 2023-07-12 5:01 ` Vinod Koul
11 siblings, 0 replies; 13+ messages in thread
From: Vinod Koul @ 2023-07-12 5:01 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Dmitry Baryshkov
Cc: Philipp Zabel, Johan Hovold, linux-arm-msm, linux-phy, devicetree
On Tue, 11 Jul 2023 17:51:42 +0300, Dmitry Baryshkov wrote:
> Reviewing several patchsets for newer platforms made me understand that
> having two styles of QMP PHY bindings causes confusion. Despite binding
> documents having notes telling that old bindings should be used for
> older platforms, it is too easy to attempt adding new platform with
> older QMP PHY binding. Thus let's have just a single documented style of
> bindings.
>
> [...]
Applied, thanks!
[01/11] dt-bindings: phy: migrate QMP UFS PHY bindings to qcom,sc8280xp-qmp-ufs-phy.yaml
commit: cd296e74242918f91bb86da0c67d8456338cbb16
[02/11] phy: qcom-qmp-ufs: populate offsets configuration
commit: e2d9dbc01cb305af625c6db83c451645eef64470
Best regards,
--
~Vinod
^ permalink raw reply [flat|nested] 13+ messages in thread