[PATCH v3 0/7] MSM8976 PLL,RPMPD and DTS changes

[PATCH v3 0/7] MSM8976 PLL,RPMPD and DTS changes

[Adam Skladowski]

This patch series fixes introduce support for msm8976 pll,
also brings some adjustments and fixes domains setup and few dts nitpicks.

Changes since v1
================
1. Fixed few styling issues
2. Changed compatibles for plls
3. Added fixes: tag to first patch

Changes since v2
================
1. Fixed lacking .data in pll match_data
2. Increased freq supported by A72PLL to include bin2
3. Fixed remaining IPC bits
4. Added R-b tags
5. Changed commit msg for lpass dts patch
6. Rebased patches on next-20230728

Adam Skladowski (7):
  drivers: genpd: qcom: rpmpd: Fix MSM8976 power domains setup
  clk: qcom: clk-hfpll: Configure l_val in init when required
  clk: qcom: hfpll: Allow matching pdata
  dt-bindings: clock: qcom,hfpll: Document MSM8976 compatibles
  clk: qcom: hfpll: Add MSM8976 PLL data
  arm64: dts: qcom: msm8976: Split lpass region
  arm64: dts: qcom: msm8976: Fix ipc bit shifts

 .../devicetree/bindings/clock/qcom,hfpll.txt  |  3 +
 arch/arm64/boot/dts/qcom/msm8976.dtsi         | 15 +++--
 drivers/clk/qcom/clk-hfpll.c                  |  4 ++
 drivers/clk/qcom/clk-hfpll.h                  |  1 +
 drivers/clk/qcom/hfpll.c                      | 59 ++++++++++++++++++-
 drivers/genpd/qcom/rpmpd.c                    | 27 ++++-----
 6 files changed, 85 insertions(+), 24 deletions(-)

-- 
2.41.0

[PATCH v3 1/7] drivers: genpd: qcom: rpmpd: Fix MSM8976 power domains setup

[Adam Skladowski]

Downstream kernel parses resource names based on pm8950-rpm-regulator.dtsi
in such file qcom,resource-name takes three values: smpa,ldoa and clk0.
First appearance of RWSC/RWSM point to msm-4.4 kernel
which is way newer than what this platform was shipped with (msm-3.10).
For the max_state downstream code limit value to TURBO inside dts
with only one turbo_high being placed in msm-thermal bindings.
One of effects of requesting TURBO_HIGH vote is rebooting of device
which happens during voting inside WCNSS/IRIS,
this behavior was observed on LeEco S2 smartphone.
Fix regulator setup and drop unused resources.

Fixes: b1d522443b4b ("soc: qcom: rpmpd: Add rpm power domains for msm8976")
Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/genpd/qcom/rpmpd.c | 27 ++++++++++-----------------
 1 file changed, 10 insertions(+), 17 deletions(-)

diff --git a/drivers/genpd/qcom/rpmpd.c b/drivers/genpd/qcom/rpmpd.c
index 3135dd1dafe0..59caa4e7b99a 100644
--- a/drivers/genpd/qcom/rpmpd.c
+++ b/drivers/genpd/qcom/rpmpd.c
@@ -166,13 +166,6 @@ static struct rpmpd cx_rwcx0_vfl = {
 	.key = KEY_FLOOR_LEVEL,
 };
 
-static struct rpmpd cx_rwsc2_vfl = {
-	.pd = { .name = "cx_vfl", },
-	.res_type = RPMPD_RWSC,
-	.res_id = 2,
-	.key = KEY_FLOOR_LEVEL,
-};
-
 static struct rpmpd cx_s1a_vfc = {
 	.pd = { .name = "cx_vfc", },
 	.res_type = RPMPD_SMPA,
@@ -329,6 +322,13 @@ static struct rpmpd mx_s6a_lvl_ao = {
 	.key = KEY_LEVEL,
 };
 
+static struct rpmpd mx_s6a_vfl = {
+	.pd = { .name = "mx_vfl", },
+	.res_type = RPMPD_SMPA,
+	.res_id = 6,
+	.key = KEY_FLOOR_LEVEL,
+};
+
 static struct rpmpd mx_s7a_lvl_ao;
 static struct rpmpd mx_s7a_lvl = {
 	.pd = { .name = "mx", },
@@ -361,13 +361,6 @@ static struct rpmpd mx_rwmx0_vfl = {
 	.key = KEY_FLOOR_LEVEL,
 };
 
-static struct rpmpd mx_rwsm6_vfl = {
-	.pd = { .name = "mx_vfl", },
-	.res_type = RPMPD_RWSM,
-	.res_id = 6,
-	.key = KEY_FLOOR_LEVEL,
-};
-
 /* MD */
 static struct rpmpd md_s1a_corner_ao;
 static struct rpmpd md_s1a_corner = {
@@ -591,16 +584,16 @@ static const struct rpmpd_desc msm8953_desc = {
 static struct rpmpd *msm8976_rpmpds[] = {
 	[MSM8976_VDDCX] =	&cx_s2a_lvl,
 	[MSM8976_VDDCX_AO] =	&cx_s2a_lvl_ao,
-	[MSM8976_VDDCX_VFL] =	&cx_rwsc2_vfl,
+	[MSM8976_VDDCX_VFL] =	&cx_s2a_vfl,
 	[MSM8976_VDDMX] =	&mx_s6a_lvl,
 	[MSM8976_VDDMX_AO] =	&mx_s6a_lvl_ao,
-	[MSM8976_VDDMX_VFL] =	&mx_rwsm6_vfl,
+	[MSM8976_VDDMX_VFL] =	&mx_s6a_vfl,
 };
 
 static const struct rpmpd_desc msm8976_desc = {
 	.rpmpds = msm8976_rpmpds,
 	.num_pds = ARRAY_SIZE(msm8976_rpmpds),
-	.max_state = RPM_SMD_LEVEL_TURBO_HIGH,
+	.max_state = RPM_SMD_LEVEL_TURBO,
 };
 
 static struct rpmpd *msm8994_rpmpds[] = {
-- 
2.41.0

Re: [PATCH v3 1/7] drivers: genpd: qcom: rpmpd: Fix MSM8976 power domains setup

[Bjorn Andersson]

On Sat, Aug 12, 2023 at 01:24:44PM +0200, Adam Skladowski wrote:

Please drop the "drivers:" prefix in $subject, and resubmit this with
patch (alone should be fine) with the new maintainer, and appropriate
mailing list, included.

Thanks,
Bjorn

> Downstream kernel parses resource names based on pm8950-rpm-regulator.dtsi
> in such file qcom,resource-name takes three values: smpa,ldoa and clk0.
> First appearance of RWSC/RWSM point to msm-4.4 kernel
> which is way newer than what this platform was shipped with (msm-3.10).
> For the max_state downstream code limit value to TURBO inside dts
> with only one turbo_high being placed in msm-thermal bindings.
> One of effects of requesting TURBO_HIGH vote is rebooting of device
> which happens during voting inside WCNSS/IRIS,
> this behavior was observed on LeEco S2 smartphone.
> Fix regulator setup and drop unused resources.
> 
> Fixes: b1d522443b4b ("soc: qcom: rpmpd: Add rpm power domains for msm8976")
> Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>  drivers/genpd/qcom/rpmpd.c | 27 ++++++++++-----------------
>  1 file changed, 10 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/genpd/qcom/rpmpd.c b/drivers/genpd/qcom/rpmpd.c
> index 3135dd1dafe0..59caa4e7b99a 100644
> --- a/drivers/genpd/qcom/rpmpd.c
> +++ b/drivers/genpd/qcom/rpmpd.c
> @@ -166,13 +166,6 @@ static struct rpmpd cx_rwcx0_vfl = {
>  	.key = KEY_FLOOR_LEVEL,
>  };
>  
> -static struct rpmpd cx_rwsc2_vfl = {
> -	.pd = { .name = "cx_vfl", },
> -	.res_type = RPMPD_RWSC,
> -	.res_id = 2,
> -	.key = KEY_FLOOR_LEVEL,
> -};
> -
>  static struct rpmpd cx_s1a_vfc = {
>  	.pd = { .name = "cx_vfc", },
>  	.res_type = RPMPD_SMPA,
> @@ -329,6 +322,13 @@ static struct rpmpd mx_s6a_lvl_ao = {
>  	.key = KEY_LEVEL,
>  };
>  
> +static struct rpmpd mx_s6a_vfl = {
> +	.pd = { .name = "mx_vfl", },
> +	.res_type = RPMPD_SMPA,
> +	.res_id = 6,
> +	.key = KEY_FLOOR_LEVEL,
> +};
> +
>  static struct rpmpd mx_s7a_lvl_ao;
>  static struct rpmpd mx_s7a_lvl = {
>  	.pd = { .name = "mx", },
> @@ -361,13 +361,6 @@ static struct rpmpd mx_rwmx0_vfl = {
>  	.key = KEY_FLOOR_LEVEL,
>  };
>  
> -static struct rpmpd mx_rwsm6_vfl = {
> -	.pd = { .name = "mx_vfl", },
> -	.res_type = RPMPD_RWSM,
> -	.res_id = 6,
> -	.key = KEY_FLOOR_LEVEL,
> -};
> -
>  /* MD */
>  static struct rpmpd md_s1a_corner_ao;
>  static struct rpmpd md_s1a_corner = {
> @@ -591,16 +584,16 @@ static const struct rpmpd_desc msm8953_desc = {
>  static struct rpmpd *msm8976_rpmpds[] = {
>  	[MSM8976_VDDCX] =	&cx_s2a_lvl,
>  	[MSM8976_VDDCX_AO] =	&cx_s2a_lvl_ao,
> -	[MSM8976_VDDCX_VFL] =	&cx_rwsc2_vfl,
> +	[MSM8976_VDDCX_VFL] =	&cx_s2a_vfl,
>  	[MSM8976_VDDMX] =	&mx_s6a_lvl,
>  	[MSM8976_VDDMX_AO] =	&mx_s6a_lvl_ao,
> -	[MSM8976_VDDMX_VFL] =	&mx_rwsm6_vfl,
> +	[MSM8976_VDDMX_VFL] =	&mx_s6a_vfl,
>  };
>  
>  static const struct rpmpd_desc msm8976_desc = {
>  	.rpmpds = msm8976_rpmpds,
>  	.num_pds = ARRAY_SIZE(msm8976_rpmpds),
> -	.max_state = RPM_SMD_LEVEL_TURBO_HIGH,
> +	.max_state = RPM_SMD_LEVEL_TURBO,
>  };
>  
>  static struct rpmpd *msm8994_rpmpds[] = {
> -- 
> 2.41.0
> 

[PATCH v3 2/7] clk: qcom: clk-hfpll: Configure l_val in init when required

[Adam Skladowski]

Add support for pre-configuring default frequency multiplier,
this appears to be required on some platforms like MSM8976.
Without configuring L_VAL device reboots when trying to bring PLL up.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
 drivers/clk/qcom/clk-hfpll.c | 4 ++++
 drivers/clk/qcom/clk-hfpll.h | 1 +
 2 files changed, 5 insertions(+)

diff --git a/drivers/clk/qcom/clk-hfpll.c b/drivers/clk/qcom/clk-hfpll.c
index 86f728dc69e5..705352aff067 100644
--- a/drivers/clk/qcom/clk-hfpll.c
+++ b/drivers/clk/qcom/clk-hfpll.c
@@ -44,6 +44,10 @@ static void __clk_hfpll_init_once(struct clk_hw *hw)
 		regmap_write(regmap, hd->user_reg, regval);
 	}
 
+	/* Write L_VAL from conf if it exist */
+	if (hd->l_val)
+		regmap_write(regmap, hd->l_reg, hd->l_val);
+
 	if (hd->droop_reg)
 		regmap_write(regmap, hd->droop_reg, hd->droop_val);
 
diff --git a/drivers/clk/qcom/clk-hfpll.h b/drivers/clk/qcom/clk-hfpll.h
index 2a57b2fb2f2f..27b9effcb3fd 100644
--- a/drivers/clk/qcom/clk-hfpll.h
+++ b/drivers/clk/qcom/clk-hfpll.h
@@ -18,6 +18,7 @@ struct hfpll_data {
 	u32 status_reg;
 	u8  lock_bit;
 
+	u32 l_val;
 	u32 droop_val;
 	u32 config_val;
 	u32 user_val;
-- 
2.41.0

[PATCH v3 3/7] clk: qcom: hfpll: Allow matching pdata

[Adam Skladowski]

HFPLL driver can be used to drive PLLs also on different SoCs like MSM8976
On MSM8976 each PLL gets it own different configuration,
add matching pdata to driver to support multiple configurations.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
---
 drivers/clk/qcom/hfpll.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c
index f4d78003d189..47325eb17f07 100644
--- a/drivers/clk/qcom/hfpll.c
+++ b/drivers/clk/qcom/hfpll.c
@@ -6,6 +6,7 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/of.h>
+#include <linux/of_device.h>
 #include <linux/clk.h>
 #include <linux/clk-provider.h>
 #include <linux/regmap.h>
@@ -32,7 +33,7 @@ static const struct hfpll_data hdata = {
 };
 
 static const struct of_device_id qcom_hfpll_match_table[] = {
-	{ .compatible = "qcom,hfpll" },
+	{ .compatible = "qcom,hfpll", .data = &hdata },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, qcom_hfpll_match_table);
@@ -83,7 +84,7 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
 
 	init.parent_data = &pdata;
 
-	h->d = &hdata;
+	h->d = of_device_get_match_data(&pdev->dev);
 	h->clkr.hw.init = &init;
 	spin_lock_init(&h->lock);
 
-- 
2.41.0

Re: [PATCH v3 3/7] clk: qcom: hfpll: Allow matching pdata

[Konrad Dybcio]

On 12.08.2023 13:24, Adam Skladowski wrote:
> HFPLL driver can be used to drive PLLs also on different SoCs like MSM8976
> On MSM8976 each PLL gets it own different configuration,
> add matching pdata to driver to support multiple configurations.
> 
> Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad

[PATCH v3 4/7] dt-bindings: clock: qcom,hfpll: Document MSM8976 compatibles

[Adam Skladowski]

Document MSM8976 HFPLL compatibles.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 Documentation/devicetree/bindings/clock/qcom,hfpll.txt | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/qcom,hfpll.txt b/Documentation/devicetree/bindings/clock/qcom,hfpll.txt
index ec02a024424c..5769cbbe76be 100644
--- a/Documentation/devicetree/bindings/clock/qcom,hfpll.txt
+++ b/Documentation/devicetree/bindings/clock/qcom,hfpll.txt
@@ -12,6 +12,9 @@ PROPERTIES
                         "qcom,hfpll-apq8064", "qcom,hfpll"
                         "qcom,hfpll-msm8974", "qcom,hfpll"
                         "qcom,hfpll-msm8960", "qcom,hfpll"
+                        "qcom,msm8976-hfpll-a53", "qcom,hfpll"
+                        "qcom,msm8976-hfpll-a72", "qcom,hfpll"
+                        "qcom,msm8976-hfpll-cci", "qcom,hfpll"
 
 - reg:
 	Usage: required
-- 
2.41.0

[PATCH v3 5/7] clk: qcom: hfpll: Add MSM8976 PLL data

[Adam Skladowski]

Add PLL configuration for MSM8976 SoC, this SoC offers 3 HFPLL.
Small cluster offers two presets for 652-902Mhz range and 902Mhz-1.47Ghz.
For simplicity only add second range as smaller frequencies can be obtained
via apcs divider or safe parent this also saves us
a hassle of reconfiguring VCO bit and config_val.
A72 and CCI cluster only use single frequency range with their
outputs/post_dividers/vco_bits being static.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
---
 drivers/clk/qcom/hfpll.c | 54 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 54 insertions(+)

diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c
index 47325eb17f07..dac27e31ef60 100644
--- a/drivers/clk/qcom/hfpll.c
+++ b/drivers/clk/qcom/hfpll.c
@@ -32,8 +32,62 @@ static const struct hfpll_data hdata = {
 	.max_rate = 2900000000UL,
 };
 
+static const struct hfpll_data msm8976_a53 = {
+	.mode_reg = 0x00,
+	.l_reg = 0x04,
+	.m_reg = 0x08,
+	.n_reg = 0x0c,
+	.user_reg = 0x10,
+	.config_reg = 0x14,
+	.config_val = 0x341600,
+	.status_reg = 0x1c,
+	.lock_bit = 16,
+
+	.l_val = 0x35,
+	.user_val = 0x109,
+	.min_rate = 902400000UL,
+	.max_rate = 1478400000UL,
+};
+
+static const struct hfpll_data msm8976_a72 = {
+	.mode_reg = 0x00,
+	.l_reg = 0x04,
+	.m_reg = 0x08,
+	.n_reg = 0x0c,
+	.user_reg = 0x10,
+	.config_reg = 0x14,
+	.config_val = 0x4e0405d,
+	.status_reg = 0x1c,
+	.lock_bit = 16,
+
+	.l_val = 0x3e,
+	.user_val = 0x100109,
+	.min_rate = 940800000UL,
+	.max_rate = 2016000000UL,
+};
+
+static const struct hfpll_data msm8976_cci = {
+	.mode_reg = 0x00,
+	.l_reg = 0x04,
+	.m_reg = 0x08,
+	.n_reg = 0x0c,
+	.user_reg = 0x10,
+	.config_reg = 0x14,
+	.config_val = 0x141400,
+	.status_reg = 0x1c,
+	.lock_bit = 16,
+
+	.l_val = 0x20,
+	.user_val = 0x100109,
+	.min_rate = 556800000UL,
+	.max_rate = 902400000UL,
+};
+
 static const struct of_device_id qcom_hfpll_match_table[] = {
 	{ .compatible = "qcom,hfpll", .data = &hdata },
+	{ .compatible = "qcom,msm8976-hfpll-a53", .data = &msm8976_a53 },
+	{ .compatible = "qcom,msm8976-hfpll-a72", .data = &msm8976_a72 },
+	{ .compatible = "qcom,msm8976-hfpll-cci", .data = &msm8976_cci },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, qcom_hfpll_match_table);
-- 
2.41.0

Re: [PATCH v3 5/7] clk: qcom: hfpll: Add MSM8976 PLL data

[Konrad Dybcio]

On 12.08.2023 13:24, Adam Skladowski wrote:
> Add PLL configuration for MSM8976 SoC, this SoC offers 3 HFPLL.
> Small cluster offers two presets for 652-902Mhz range and 902Mhz-1.47Ghz.
> For simplicity only add second range as smaller frequencies can be obtained
> via apcs divider or safe parent this also saves us
> a hassle of reconfiguring VCO bit and config_val.
> A72 and CCI cluster only use single frequency range with their
> outputs/post_dividers/vco_bits being static.
> 
> Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad

[PATCH v3 6/7] arm64: dts: qcom: msm8976: Split lpass region

[Adam Skladowski]

MSM8976 downstream dts define reloc region which is used by pil-tz
to load both wcnss and lpass, on mainline however we might not be
able to do it and we need separate regions(also validating dts might get
problematic if we had to put memory-region(rproc node) per device).
Luckily it seems size and entry points in firmware headers appears
to be static across multiple devices including Sony Loire platform
and Xiaomi Redmi Note 3 Pro this should let us fit in first ~17MB
Split lpass region(reloc on downstream) into two separate regions.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
---
 arch/arm64/boot/dts/qcom/msm8976.dtsi | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/msm8976.dtsi b/arch/arm64/boot/dts/qcom/msm8976.dtsi
index ab76806317a7..7385d5edec04 100644
--- a/arch/arm64/boot/dts/qcom/msm8976.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8976.dtsi
@@ -338,7 +338,12 @@ mpss_mem: mpss@86c00000 {
 		};
 
 		lpass_mem: lpass@8c200000 {
-			reg = <0x0 0x8c200000 0x0 0x1800000>;
+			reg = <0x0 0x8c200000 0x0 0x1000000>;
+			no-map;
+		};
+
+		wcnss_fw_mem: wcnss@8d200000 {
+			reg = <0x0 0x8d200000 0x0 0x800000>;
 			no-map;
 		};
 
-- 
2.41.0

[PATCH v3 7/7] arm64: dts: qcom: msm8976: Fix ipc bit shifts

[Adam Skladowski]

Update bits to match downstream irq-bitmask values.

Fixes: 0484d3ce0902 ("arm64: dts: qcom: Add DTS for MSM8976 and MSM8956 SoCs")
Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
---
 arch/arm64/boot/dts/qcom/msm8976.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/msm8976.dtsi b/arch/arm64/boot/dts/qcom/msm8976.dtsi
index 7385d5edec04..ab6d3834e436 100644
--- a/arch/arm64/boot/dts/qcom/msm8976.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8976.dtsi
@@ -384,7 +384,7 @@ adsp_smp2p_in: slave-kernel {
 	smp2p-modem {
 		compatible = "qcom,smp2p";
 		interrupts = <GIC_SPI 27 IRQ_TYPE_EDGE_RISING>;
-		qcom,ipc = <&apcs 8 13>;
+		qcom,ipc = <&apcs 8 14>;
 
 		qcom,local-pid = <0>;
 		qcom,remote-pid = <1>;
@@ -407,7 +407,7 @@ modem_smp2p_in: slave-kernel {
 	smp2p-wcnss {
 		compatible = "qcom,smp2p";
 		interrupts = <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>;
-		qcom,ipc = <&apcs 8 17>;
+		qcom,ipc = <&apcs 8 18>;
 
 		qcom,local-pid = <0>;
 		qcom,remote-pid = <4>;
@@ -433,9 +433,9 @@ smsm {
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		qcom,ipc-1 = <&apcs 8 12>;
+		qcom,ipc-1 = <&apcs 8 13>;
 		qcom,ipc-2 = <&apcs 8 9>;
-		qcom,ipc-3 = <&apcs 8 18>;
+		qcom,ipc-3 = <&apcs 8 19>;
 
 		apps_smsm: apps@0 {
 			reg = <0>;
-- 
2.41.0

Re: (subset) [PATCH v3 0/7] MSM8976 PLL,RPMPD and DTS changes

[Bjorn Andersson]

On Sat, 12 Aug 2023 13:24:43 +0200, Adam Skladowski wrote:
> This patch series fixes introduce support for msm8976 pll,
> also brings some adjustments and fixes domains setup and few dts nitpicks.
> 
> Changes since v1
> ================
> 1. Fixed few styling issues
> 2. Changed compatibles for plls
> 3. Added fixes: tag to first patch
> 
> [...]

Applied, thanks!

[2/7] clk: qcom: clk-hfpll: Configure l_val in init when required
      commit: 500a4609eef46d49a260173b66cabb20bd5159ad
[3/7] clk: qcom: hfpll: Allow matching pdata
      commit: 34e000c0963e55f24be2254fa645f8dd8257a9e0
[4/7] dt-bindings: clock: qcom,hfpll: Document MSM8976 compatibles
      commit: de37ca2dc98607e74522d8f243aa7feac74577c5
[5/7] clk: qcom: hfpll: Add MSM8976 PLL data
      commit: 1fa2d1a887c763246662a88e203d69b36052770c

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>

Re: (subset) [PATCH v3 0/7] MSM8976 PLL,RPMPD and DTS changes

[Bjorn Andersson]

On Sat, 12 Aug 2023 13:24:43 +0200, Adam Skladowski wrote:
> This patch series fixes introduce support for msm8976 pll,
> also brings some adjustments and fixes domains setup and few dts nitpicks.
> 
> Changes since v1
> ================
> 1. Fixed few styling issues
> 2. Changed compatibles for plls
> 3. Added fixes: tag to first patch
> 
> [...]

Applied, thanks!

[6/7] arm64: dts: qcom: msm8976: Split lpass region
      commit: 31c133b4a07e3db456a7e661c96653cd65a25bc6
[7/7] arm64: dts: qcom: msm8976: Fix ipc bit shifts
      commit: 684277525c70f329300cc687e27248e405a4ff9e

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>