Linux ARM-MSM sub-architecture
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From: Nitheesh Sekar <quic_nsekar@quicinc.com>
To: <agross@kernel.org>, <andersson@kernel.org>,
	<konrad.dybcio@linaro.org>, <vkoul@kernel.org>,
	<kishon@kernel.org>, <robh+dt@kernel.org>,
	<krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
	<gregkh@linuxfoundation.org>, <quic_srichara@quicinc.com>,
	<quic_varada@quicinc.com>, <quic_wcheng@quicinc.com>,
	<linux-arm-msm@vger.kernel.org>, <linux-phy@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-usb@vger.kernel.org>
Cc: Nitheesh Sekar <quic_nsekar@quicinc.com>
Subject: [PATCH V3 2/4] phy: qcom-m31: Add compatible, phy init sequence for IPQ5018
Date: Fri, 1 Sep 2023 14:56:43 +0530	[thread overview]
Message-ID: <20230901092645.20522-3-quic_nsekar@quicinc.com> (raw)
In-Reply-To: <20230901092645.20522-1-quic_nsekar@quicinc.com>

Add phy init sequence and compatible string for IPQ5018
chipset.

Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com>
---
V3:
	Dropped 0 delay inits.
	Added static const type for m31_ipq5018_regs.
V2:
	Updated the commit message.
---
 drivers/phy/qualcomm/phy-qcom-m31.c | 49 +++++++++++++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/drivers/phy/qualcomm/phy-qcom-m31.c b/drivers/phy/qualcomm/phy-qcom-m31.c
index ed08072ca032..ceee38695d7d 100644
--- a/drivers/phy/qualcomm/phy-qcom-m31.c
+++ b/drivers/phy/qualcomm/phy-qcom-m31.c
@@ -82,6 +82,48 @@ struct m31_priv_data {
 	unsigned int			nregs;
 };
 
+static const struct m31_phy_regs m31_ipq5018_regs[] = {
+	{
+		USB_PHY_CFG0,
+		UTMI_PHY_OVERRIDE_EN
+	},
+	{
+		USB_PHY_UTMI_CTRL5,
+		POR_EN,
+		15
+	},
+	{
+		USB_PHY_FSEL_SEL,
+		FREQ_SEL
+	},
+	{
+		USB_PHY_HS_PHY_CTRL_COMMON0,
+		COMMONONN | FSEL | RETENABLEN
+	},
+	{
+		USB_PHY_REFCLK_CTRL,
+		CLKCORE
+	},
+	{
+		USB_PHY_UTMI_CTRL5,
+		POR_EN
+	},
+	{
+		USB_PHY_HS_PHY_CTRL2,
+		USB2_SUSPEND_N_SEL | USB2_SUSPEND_N | USB2_UTMI_CLK_EN
+	},
+	{
+		USB_PHY_UTMI_CTRL5
+	},
+	{
+		USB_PHY_HS_PHY_CTRL2,
+		USB2_SUSPEND_N | USB2_UTMI_CLK_EN
+	},
+	{
+		USB_PHY_CFG0
+	},
+};
+
 struct m31_phy_regs m31_ipq5332_regs[] = {
 	{
 		USB_PHY_CFG0,
@@ -268,6 +310,12 @@ static int m31usb_phy_probe(struct platform_device *pdev)
 	return PTR_ERR_OR_ZERO(phy_provider);
 }
 
+static const struct m31_priv_data m31_ipq5018_data = {
+	.ulpi_mode = false,
+	.regs = m31_ipq5018_regs,
+	.nregs = ARRAY_SIZE(m31_ipq5018_regs),
+};
+
 static const struct m31_priv_data m31_ipq5332_data = {
 	.ulpi_mode = false,
 	.regs = m31_ipq5332_regs,
@@ -275,6 +323,7 @@ static const struct m31_priv_data m31_ipq5332_data = {
 };
 
 static const struct of_device_id m31usb_phy_id_table[] = {
+	{ .compatible = "qcom,ipq5018-usb-hsphy", .data = &m31_ipq5018_data },
 	{ .compatible = "qcom,ipq5332-usb-hsphy", .data = &m31_ipq5332_data },
 	{ },
 };
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


  parent reply	other threads:[~2023-09-01  9:27 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-01  9:26 [PATCH V3 0/4] Enable IPQ5018 USB2 support Nitheesh Sekar
2023-09-01  9:26 ` [PATCH V3 1/4] dt-bindings: phy: qcom,m31: Add IPQ5018 compatible Nitheesh Sekar
2023-09-01  9:26 ` Nitheesh Sekar [this message]
2023-09-01 21:50   ` [PATCH V3 2/4] phy: qcom-m31: Add compatible, phy init sequence for IPQ5018 Dmitry Baryshkov
2023-09-04  5:12     ` Nitheesh Sekar
2023-09-01  9:26 ` [PATCH V3 3/4] arm64: dts: qcom: ipq5018: Add USB related nodes Nitheesh Sekar
2023-09-01  9:26 ` [PATCH V3 4/4] arm64: dts: qcom: ipq5018: Enable USB Nitheesh Sekar
2023-09-01 21:50   ` Dmitry Baryshkov

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