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From: Bjorn Helgaas <helgaas@kernel.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: lpieralisi@kernel.org, kw@linux.com, bhelgaas@google.com,
	robh@kernel.org, gustavo.pimentel@synopsys.com,
	jingoohan1@gmail.com, andersson@kernel.org,
	konrad.dybcio@linaro.org, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org
Subject: Re: [PATCH v2 1/2] PCI: dwc: Add host_post_init() callback
Date: Mon, 16 Oct 2023 15:58:49 -0500	[thread overview]
Message-ID: <20231016205849.GA1225381@bhelgaas> (raw)
In-Reply-To: <20231010155914.9516-2-manivannan.sadhasivam@linaro.org>

On Tue, Oct 10, 2023 at 09:29:13PM +0530, Manivannan Sadhasivam wrote:
> This callback can be used by the platform drivers to do configuration once
> all the devices are scanned. Like changing LNKCTL of all downstream devices
> to enable ASPM etc...
> 
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
>  drivers/pci/controller/dwc/pcie-designware-host.c | 3 +++
>  drivers/pci/controller/dwc/pcie-designware.h      | 1 +
>  2 files changed, 4 insertions(+)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index a7170fd0e847..7991f0e179b2 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -502,6 +502,9 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
>  	if (ret)
>  		goto err_stop_link;
>  
> +	if (pp->ops->host_post_init)
> +		pp->ops->host_post_init(pp);

I know we talked about this a little bit in the context of enabling
ASPM for devices below qcom 1.9.0 controllers at
https://lore.kernel.org/r/20231011050058.GC3508@thinkpad

But I didn't realize at the time that this callback adds a fundamental
difference between devices present at boot-time (these devices can be
affected by this callback) and any devices hot-added later (we never
run this callback again, so anything done by .host_post_init() never
applies to them).

We merged this for now, and it helps enable ASPM for builtin devices
on qcom, but I don't feel good about this from a larger DWC
perspective.  If other drivers use this and they support hot-add, I
think we're going to have problems.

>  	return 0;
>  
>  err_stop_link:
> diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> index ef0b2efa9f93..efb4d4754fc8 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.h
> +++ b/drivers/pci/controller/dwc/pcie-designware.h
> @@ -301,6 +301,7 @@ enum dw_pcie_ltssm {
>  struct dw_pcie_host_ops {
>  	int (*host_init)(struct dw_pcie_rp *pp);
>  	void (*host_deinit)(struct dw_pcie_rp *pp);
> +	void (*host_post_init)(struct dw_pcie_rp *pp);
>  	int (*msi_host_init)(struct dw_pcie_rp *pp);
>  	void (*pme_turn_off)(struct dw_pcie_rp *pp);
>  };
> -- 
> 2.25.1
> 

  reply	other threads:[~2023-10-16 20:58 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-10 15:59 [PATCH v2 0/2] PCI: qcom: Enable ASPM on host bridge and devices Manivannan Sadhasivam
2023-10-10 15:59 ` [PATCH v2 1/2] PCI: dwc: Add host_post_init() callback Manivannan Sadhasivam
2023-10-16 20:58   ` Bjorn Helgaas [this message]
2023-10-17  7:59     ` Manivannan Sadhasivam
2023-10-18 16:47       ` Bjorn Helgaas
2023-10-10 15:59 ` [PATCH v2 2/2] PCI: qcom: Enable ASPM for platforms supporting 1.9.0 ops Manivannan Sadhasivam
2023-10-10 16:29   ` Bjorn Helgaas
2023-10-11  5:00     ` Manivannan Sadhasivam
2023-10-10 16:33   ` Konrad Dybcio
2023-10-11  5:03     ` Manivannan Sadhasivam
2023-10-10 16:25 ` [PATCH v2 0/2] PCI: qcom: Enable ASPM on host bridge and devices Konrad Dybcio
2023-10-14 20:32 ` Krzysztof Wilczyński

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