From: Abel Vesa <abel.vesa@linaro.org>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Neil Armstrong <neil.armstrong@linaro.org>,
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
Abel Vesa <abel.vesa@linaro.org>,
Rajendra Nayak <quic_rjendra@quicinc.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Subject: [PATCH v2 03/10] dt-bindings: clock: qcom: Document the X1E80100 GPU Clock Controller
Date: Thu, 14 Dec 2023 18:49:32 +0200 [thread overview]
Message-ID: <20231214-x1e80100-clock-controllers-v2-3-2b0739bebd27@linaro.org> (raw)
In-Reply-To: <20231214-x1e80100-clock-controllers-v2-0-2b0739bebd27@linaro.org>
From: Rajendra Nayak <quic_rjendra@quicinc.com>
Add bindings documentation for the X1E80100 Graphics Clock Controller.
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
---
.../bindings/clock/qcom,sm8450-gpucc.yaml | 2 ++
include/dt-bindings/clock/qcom,x1e80100-gpucc.h | 41 ++++++++++++++++++++++
include/dt-bindings/reset/qcom,x1e80100-gpucc.h | 19 ++++++++++
3 files changed, 62 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml
index 1a384e8532a5..36974309cf69 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml
@@ -18,6 +18,7 @@ description: |
include/dt-bindings/clock/qcom,sm8550-gpucc.h
include/dt-bindings/reset/qcom,sm8450-gpucc.h
include/dt-bindings/reset/qcom,sm8650-gpucc.h
+ include/dt-bindings/reset/qcom,x1e80100-gpucc.h
properties:
compatible:
@@ -25,6 +26,7 @@ properties:
- qcom,sm8450-gpucc
- qcom,sm8550-gpucc
- qcom,sm8650-gpucc
+ - qcom,x1e80100-gpucc
clocks:
items:
diff --git a/include/dt-bindings/clock/qcom,x1e80100-gpucc.h b/include/dt-bindings/clock/qcom,x1e80100-gpucc.h
new file mode 100644
index 000000000000..6240df8b5a3b
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,x1e80100-gpucc.h
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#ifndef _DT_BINDINGS_CLK_QCOM_X1E80100_GPU_CC_H
+#define _DT_BINDINGS_CLK_QCOM_X1E80100_GPU_CC_H
+
+/* GPU_CC clocks */
+#define GPU_CC_AHB_CLK 0
+#define GPU_CC_CB_CLK 1
+#define GPU_CC_CRC_AHB_CLK 2
+#define GPU_CC_CX_FF_CLK 3
+#define GPU_CC_CX_GMU_CLK 4
+#define GPU_CC_CXO_AON_CLK 5
+#define GPU_CC_CXO_CLK 6
+#define GPU_CC_DEMET_CLK 7
+#define GPU_CC_DEMET_DIV_CLK_SRC 8
+#define GPU_CC_FF_CLK_SRC 9
+#define GPU_CC_FREQ_MEASURE_CLK 10
+#define GPU_CC_GMU_CLK_SRC 11
+#define GPU_CC_GX_GMU_CLK 12
+#define GPU_CC_GX_VSENSE_CLK 13
+#define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 14
+#define GPU_CC_HUB_AON_CLK 15
+#define GPU_CC_HUB_CLK_SRC 16
+#define GPU_CC_HUB_CX_INT_CLK 17
+#define GPU_CC_MEMNOC_GFX_CLK 18
+#define GPU_CC_MND1X_0_GFX3D_CLK 19
+#define GPU_CC_MND1X_1_GFX3D_CLK 20
+#define GPU_CC_PLL0 21
+#define GPU_CC_PLL1 22
+#define GPU_CC_SLEEP_CLK 23
+#define GPU_CC_XO_CLK_SRC 24
+#define GPU_CC_XO_DIV_CLK_SRC 25
+
+/* GDSCs */
+#define GPU_CC_CX_GDSC 0
+#define GPU_CC_GX_GDSC 1
+
+#endif
diff --git a/include/dt-bindings/reset/qcom,x1e80100-gpucc.h b/include/dt-bindings/reset/qcom,x1e80100-gpucc.h
new file mode 100644
index 000000000000..32b43e71a16f
--- /dev/null
+++ b/include/dt-bindings/reset/qcom,x1e80100-gpucc.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#ifndef _DT_BINDINGS_RESET_QCOM_X1E80100_GPU_CC_H
+#define _DT_BINDINGS_RESET_QCOM_X1E80100_GPU_CC_H
+
+#define GPUCC_GPU_CC_ACD_BCR 0
+#define GPUCC_GPU_CC_CB_BCR 1
+#define GPUCC_GPU_CC_CX_BCR 2
+#define GPUCC_GPU_CC_FAST_HUB_BCR 3
+#define GPUCC_GPU_CC_FF_BCR 4
+#define GPUCC_GPU_CC_GFX3D_AON_BCR 5
+#define GPUCC_GPU_CC_GMU_BCR 6
+#define GPUCC_GPU_CC_GX_BCR 7
+#define GPUCC_GPU_CC_XO_BCR 8
+
+#endif
--
2.34.1
next prev parent reply other threads:[~2023-12-14 16:50 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-14 16:49 [PATCH v2 00/10] clk: qcom: Add TCSR, GPU, CAM and DISP clock controllers for X1E80100 Abel Vesa
2023-12-14 16:49 ` [PATCH v2 01/10] dt-bindings: clock: Drop the SM8650 DISPCC dedicated schema Abel Vesa
2023-12-14 16:49 ` [PATCH v2 02/10] dt-bindings: clock: qcom: Document the X1E80100 Display Clock Controller Abel Vesa
2023-12-15 9:07 ` Krzysztof Kozlowski
2023-12-14 16:49 ` Abel Vesa [this message]
2023-12-14 16:49 ` [PATCH v2 04/10] dt-bindings: clock: qcom: Document the X1E80100 TCSR " Abel Vesa
2023-12-14 16:49 ` [PATCH v2 05/10] dt-bindings: clock: qcom: Document the X1E80100 Camera " Abel Vesa
2023-12-14 16:49 ` [PATCH v2 06/10] clk: qcom: clk-alpha-pll: Add support for zonda ole pll configure Abel Vesa
2023-12-14 16:49 ` [PATCH v2 07/10] clk: qcom: Add dispcc clock driver for x1e80100 Abel Vesa
2023-12-15 12:45 ` Bryan O'Donoghue
2024-01-23 11:30 ` Abel Vesa
2023-12-16 13:32 ` Konrad Dybcio
2023-12-14 16:49 ` [PATCH v2 08/10] clk: qcom: Add GPU " Abel Vesa
2023-12-15 12:40 ` Bryan O'Donoghue
2024-01-23 11:43 ` Abel Vesa
2023-12-16 13:35 ` Konrad Dybcio
2023-12-14 16:49 ` [PATCH v2 09/10] clk: qcom: Add TCSR " Abel Vesa
2023-12-16 13:36 ` Konrad Dybcio
2023-12-14 16:49 ` [PATCH v2 10/10] clk: qcom: Add camcc " Abel Vesa
2023-12-15 12:38 ` Bryan O'Donoghue
2023-12-16 13:39 ` Konrad Dybcio
2024-01-23 11:49 ` Abel Vesa
2024-01-23 17:56 ` Konrad Dybcio
2024-01-24 9:22 ` Abel Vesa
2024-01-28 21:54 ` Abel Vesa
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