From: Abel Vesa <abel.vesa@linaro.org>
To: "Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konrad.dybcio@linaro.org>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>
Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, Abel Vesa <abel.vesa@linaro.org>
Subject: [PATCH v2 1/2] dt-bindings: PCI: qcom: Document the X1E80100 PCIe Controller
Date: Mon, 29 Jan 2024 13:10:26 +0200 [thread overview]
Message-ID: <20240129-x1e80100-pci-v2-1-a466d10685b6@linaro.org> (raw)
In-Reply-To: <20240129-x1e80100-pci-v2-0-a466d10685b6@linaro.org>
Document the PCIe Controllers on the X1E80100 platform. They are similar
to the ones found on SM8550, but they don't have SF QTB clock.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
---
.../devicetree/bindings/pci/qcom,pcie.yaml | 29 ++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
index a93ab3b54066..7381e38b7398 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
@@ -41,6 +41,7 @@ properties:
- qcom,pcie-sm8450-pcie0
- qcom,pcie-sm8450-pcie1
- qcom,pcie-sm8550
+ - qcom,pcie-x1e80100
- items:
- enum:
- qcom,pcie-sm8650
@@ -227,6 +228,7 @@ allOf:
- qcom,pcie-sm8450-pcie0
- qcom,pcie-sm8450-pcie1
- qcom,pcie-sm8550
+ - qcom,pcie-x1e80100
then:
properties:
reg:
@@ -826,6 +828,32 @@ allOf:
items:
- const: pci # PCIe core reset
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,pcie-x1e80100
+ then:
+ properties:
+ clocks:
+ maxItems: 7
+ clock-names:
+ items:
+ - const: aux # Auxiliary clock
+ - const: cfg # Configuration clock
+ - const: bus_master # Master AXI clock
+ - const: bus_slave # Slave AXI clock
+ - const: slave_q2a # Slave Q2A clock
+ - const: noc_aggr # Aggre NoC PCIe AXI clock
+ - const: cnoc_sf_axi # Config NoC PCIe1 AXI clock
+ resets:
+ maxItems: 2
+ reset-names:
+ items:
+ - const: pci # PCIe core reset
+ - const: link_down # PCIe link down reset
+
- if:
properties:
compatible:
@@ -884,6 +912,7 @@ allOf:
- qcom,pcie-sm8450-pcie0
- qcom,pcie-sm8450-pcie1
- qcom,pcie-sm8550
+ - qcom,pcie-x1e80100
then:
oneOf:
- properties:
--
2.34.1
next prev parent reply other threads:[~2024-01-29 11:10 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-29 11:10 [PATCH v2 0/2] PCI: qcom: Add PCIe support for X1E80100 Abel Vesa
2024-01-29 11:10 ` Abel Vesa [this message]
2024-01-29 14:19 ` [PATCH v2 1/2] dt-bindings: PCI: qcom: Document the X1E80100 PCIe Controller Krzysztof Kozlowski
2024-01-29 14:36 ` Abel Vesa
2024-02-02 12:44 ` Manivannan Sadhasivam
2024-01-29 11:10 ` [PATCH v2 2/2] PCI: qcom: Add X1E80100 PCIe support Abel Vesa
2024-02-01 19:20 ` Konrad Dybcio
2024-02-02 8:13 ` neil.armstrong
2024-02-02 8:41 ` Manivannan Sadhasivam
2024-02-02 10:31 ` Abel Vesa
2024-02-02 12:43 ` Manivannan Sadhasivam
2024-02-02 8:41 ` Abel Vesa
2024-02-02 8:44 ` neil.armstrong
2024-02-02 8:51 ` Abel Vesa
2024-02-02 8:48 ` Manivannan Sadhasivam
2024-02-02 8:55 ` Abel Vesa
2024-02-02 9:31 ` Abel Vesa
2024-02-02 9:48 ` Manivannan Sadhasivam
2024-02-02 12:44 ` Manivannan Sadhasivam
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