Re: [PATCH 0/6] drm/msm: Support a750 "software fuse" for raytracing

Dmitry Baryshkov
2024-04-25T15:03:33Z

On Thu, 25 Apr 2024 at 16:44, Connor Abbott <cwabbott0@gmail.com> wrote:
>
> On a750, Qualcomm decided to gate support for certain features behind a
> "software fuse." This consists of a register in the cx_mem zone, which
> is normally only writeable by the TrustZone firmware. On bootup it is
> 0, and we must call an SCM method to initialize it. Then we communicate
> its value to userspace. This implements all of this, copying the SCM
> call from the downstream kernel and kgsl.
>
> So far the only optional feature we use is ray tracing (i.e. the
> "ray_intersection" instruction) in a pending Mesa MR [1], so that's what
> we expose to userspace. There's one extra patch to write some missing
> registers, which depends on the register XML bump but is otherwise
> unrelated, I just included it to make things easier on myself.
>
> The drm/msm part of this series depends on [2] to avoid conflicts.
>
> [1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28447
> [2] https://lore.kernel.org/all/20240324095222.ldnwumjkxk6uymmc@hu-akhilpo-hyd.qualcomm.com/T/
>
> Connor Abbott (6):
> arm64: dts: qcom: sm8650: Fix GPU cx_mem size
> firmware: qcom_scm: Add gpu_init_regs call

I don't see patch 2 at all. Granted that patches 1 and 3-6 have
different cc lists, might it be that it went to some blackhole?

> drm/msm: Update a6xx registers
> drm/msm/a7xx: Initialize a750 "software fuse"
> drm/msm: Add MSM_PARAM_RAYTRACING uapi
> drm/msm/a7xx: Add missing register writes from downstream

--
With best wishes
Dmitry