Re: [PATCH v4 6/8] media: qcom: camss: Split testgen, RDI and RX for CSID 170

[kernel test robot <lkp@intel.com>]

Hi Gjorgji,

kernel test robot noticed the following build warnings:

[auto build test WARNING on media-tree/master]
[also build test WARNING on linus/master next-20240523]
[cannot apply to v6.9]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Gjorgji-Rosikopulos/media-qcom-camss-Add-per-sub-device-type-resources/20240522-235220
base:   git://linuxtv.org/media_tree.git master
patch link:    https://lore.kernel.org/r/20240522154659.510-7-quic_grosikop%40quicinc.com
patch subject: [PATCH v4 6/8] media: qcom: camss: Split testgen, RDI and RX for CSID 170
config: arm64-defconfig (https://download.01.org/0day-ci/archive/20240523/202405232059.8lLokYw2-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240523/202405232059.8lLokYw2-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202405232059.8lLokYw2-lkp@intel.com/

All warnings (new ones prefixed by >>):

   drivers/media/platform/qcom/camss/camss-csid-gen2.c: In function '__csid_configure_rdi_stream':
>> drivers/media/platform/qcom/camss/camss-csid-gen2.c:265:13: warning: variable 'phy_sel' set but not used [-Wunused-but-set-variable]
     265 |         u32 phy_sel = 0;
         |             ^~~~~~~


vim +/phy_sel +265 drivers/media/platform/qcom/camss/camss-csid-gen2.c

   260	
   261	static void __csid_configure_rdi_stream(struct csid_device *csid, u8 enable, u8 vc)
   262	{
   263		struct csid_testgen_config *tg = &csid->testgen;
   264		u32 val;
 > 265		u32 phy_sel = 0;
   266		/* Source pads matching RDI channels on hardware. Pad 1 -> RDI0, Pad 2 -> RDI1, etc. */
   267		struct v4l2_mbus_framefmt *input_format = &csid->fmt[MSM_CSID_PAD_FIRST_SRC + vc];
   268		const struct csid_format_info *format = csid_get_fmt_entry(csid->res->formats->formats,
   269									   csid->res->formats->nformats,
   270									   input_format->code);
   271	
   272		if (!tg->enabled)
   273			phy_sel = csid->phy.csiphy_id;
   274	
   275		/*
   276		 * DT_ID is a two bit bitfield that is concatenated with
   277		 * the four least significant bits of the five bit VC
   278		 * bitfield to generate an internal CID value.
   279		 *
   280		 * CSID_RDI_CFG0(vc)
   281		 * DT_ID : 28:27
   282		 * VC    : 26:22
   283		 * DT    : 21:16
   284		 *
   285		 * CID   : VC 3:0 << 2 | DT_ID 1:0
   286		 */
   287		u8 dt_id = vc & 0x03;
   288	
   289		val = 1 << RDI_CFG0_BYTE_CNTR_EN;
   290		val |= 1 << RDI_CFG0_FORMAT_MEASURE_EN;
   291		val |= 1 << RDI_CFG0_TIMESTAMP_EN;
   292		/* note: for non-RDI path, this should be format->decode_format */
   293		val |= DECODE_FORMAT_PAYLOAD_ONLY << RDI_CFG0_DECODE_FORMAT;
   294		val |= format->data_type << RDI_CFG0_DATA_TYPE;
   295		val |= vc << RDI_CFG0_VIRTUAL_CHANNEL;
   296		val |= dt_id << RDI_CFG0_DT_ID;
   297		writel_relaxed(val, csid->base + CSID_RDI_CFG0(vc));
   298	
   299		/* CSID_TIMESTAMP_STB_POST_IRQ */
   300		val = 2 << RDI_CFG1_TIMESTAMP_STB_SEL;
   301		writel_relaxed(val, csid->base + CSID_RDI_CFG1(vc));
   302	
   303		val = 1;
   304		writel_relaxed(val, csid->base + CSID_RDI_FRM_DROP_PERIOD(vc));
   305	
   306		val = 0;
   307		writel_relaxed(val, csid->base + CSID_RDI_FRM_DROP_PATTERN(vc));
   308	
   309		val = 1;
   310		writel_relaxed(val, csid->base + CSID_RDI_IRQ_SUBSAMPLE_PERIOD(vc));
   311	
   312		val = 0;
   313		writel_relaxed(val, csid->base + CSID_RDI_IRQ_SUBSAMPLE_PATTERN(vc));
   314	
   315		val = 1;
   316		writel_relaxed(val, csid->base + CSID_RDI_RPP_PIX_DROP_PERIOD(vc));
   317	
   318		val = 0;
   319		writel_relaxed(val, csid->base + CSID_RDI_RPP_PIX_DROP_PATTERN(vc));
   320	
   321		val = 1;
   322		writel_relaxed(val, csid->base + CSID_RDI_RPP_LINE_DROP_PERIOD(vc));
   323	
   324		val = 0;
   325		writel_relaxed(val, csid->base + CSID_RDI_RPP_LINE_DROP_PATTERN(vc));
   326	
   327		val = 0;
   328		writel_relaxed(val, csid->base + CSID_RDI_CTRL(vc));
   329	
   330		val = readl_relaxed(csid->base + CSID_RDI_CFG0(vc));
   331		val |=  enable << RDI_CFG0_ENABLE;
   332		writel_relaxed(val, csid->base + CSID_RDI_CFG0(vc));
   333	}
   334	

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