Re: [PATCH v8 15/17] PCI/pwrctl: add PCI power control core code

Bjorn Helgaas
2024-06-11T22:56:39Z

On Wed, Jun 05, 2024 at 08:05:06PM +0200, Bartosz Golaszewski wrote:
> On Wed, Jun 5, 2024 at 7:58 PM Bjorn Helgaas <helgaas@kernel.org> wrote:
> >
> > On Tue, May 28, 2024 at 09:03:23PM +0200, Bartosz Golaszewski wrote:
> > > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
> > >
> > > Some PCI devices must be powered-on before they can be detected on the
> > > bus. Introduce a simple framework reusing the existing PCI OF
> > > infrastructure.
> > >
> > > The way this works is: a DT node representing a PCI device connected to
> > > the port can be matched against its power control platform driver. If
> > > the match succeeds, the driver is responsible for powering-up the device
> > > and calling pcie_pwrctl_device_set_ready() which will trigger a PCI bus
> >
> > s/pcie_pwrctl_device_set_ready/pci_pwrctl_device_set_ready/
> >
>
> Ah that's a leftover from when it was PCIe specific. Thanks.

With that typo fixed and s/add PCI/Add/ in subject,

Acked-by: Bjorn Helgaas <bhelgaas@google.com>

> > > rescan as well as subscribe to PCI bus notifications.
> > >
> > > When the device is detected and created, we'll make it consume the same
> > > DT node that the platform device did. When the device is bound, we'll
> > > create a device link between it and the parent power control device.