From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3A3282139D3; Wed, 25 Sep 2024 12:06:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727265989; cv=none; b=ULHcQ3N8M9rc+DLFhWwQimJ6QvgF1JqYRvzlzvVUgJIqG4tYr1Ge4zkJHIMQDHFoHbzk7ZLPTrKwFrdjYGL6+3rCfGIFhiMCv7x1Y+biJXX5BsZ8JASCb6GFHao2qDvwZGVA07mwi5SKHuyBZ0sEVSeb3XQ89IuiHQbsYeFBeYU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727265989; c=relaxed/simple; bh=KNAOp0Up6Dc5BvPNr5AT2IVCyHij4LrdqYNtSm1p7Og=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=udzAonqvpOMCittSvk9tSGW+4r0afHkCQu7CRWOQaKQQNQwxouT19y4+H8nm4KbAkYDjD5xGq0F7wsyceBvCLFZG7LZDFcDCWhnqmkH6Ra34PH9N7Fx+w29XlfetkVqUVl5M4yLQJ7X0hRnjtJWBq5EXHrdUfxMOBoJNxMfA3FY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=YfKhmw8O; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="YfKhmw8O" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 377C3C4CEC3; Wed, 25 Sep 2024 12:06:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1727265988; bh=KNAOp0Up6Dc5BvPNr5AT2IVCyHij4LrdqYNtSm1p7Og=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YfKhmw8OomGlEydkl4uKMahHrpg1N+eKXOxkIdnKBsoBeHUOVLkkA2WD3pepbnGvQ Pt87WySYnu6EpiJ8HtepInZGNYqy0XjYIVvNxmOq1GN/T6Khrm2yAnP9Qa3RGs/lez FXaTzs1BCh3ZvohaGtc66oaxS/G9Nb6M+OxLpWwEP9hs7IEtGmH7I+Mieuq/h5RXzG zBtc8o7b1+MBzKOVkLn0tZLBrErUOhodSxln9kmEBSmY9y1SNXldVS9q5uL4ws1kEm lhZobge08E+ZqOiOU86igD03J0bDnidn/80xss6kjlLrwaD031I0lb6P8VF59jXRJl PlxfO2q8vO18A== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Konrad Dybcio , Rob Clark , Sasha Levin , robdclark@gmail.com, quic_abhinavk@quicinc.com, dmitry.baryshkov@linaro.org, airlied@gmail.com, daniel@ffwll.ch, linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH AUTOSEL 6.10 140/197] drm/msm/adreno: Assign msm_gpu->pdev earlier to avoid nullptrs Date: Wed, 25 Sep 2024 07:52:39 -0400 Message-ID: <20240925115823.1303019-140-sashal@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240925115823.1303019-1-sashal@kernel.org> References: <20240925115823.1303019-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore X-stable-base: Linux 6.10.11 Content-Transfer-Encoding: 8bit From: Konrad Dybcio [ Upstream commit 16007768551d5bfe53426645401435ca8d2ef54f ] There are some cases, such as the one uncovered by Commit 46d4efcccc68 ("drm/msm/a6xx: Avoid a nullptr dereference when speedbin setting fails") where msm_gpu_cleanup() : platform_set_drvdata(gpu->pdev, NULL); is called on gpu->pdev == NULL, as the GPU device has not been fully initialized yet. Turns out that there's more than just the aforementioned path that causes this to happen (e.g. the case when there's speedbin data in the catalog, but opp-supported-hw is missing in DT). Assigning msm_gpu->pdev earlier seems like the least painful solution to this, therefore do so. Signed-off-by: Konrad Dybcio Patchwork: https://patchwork.freedesktop.org/patch/602742/ Signed-off-by: Rob Clark Signed-off-by: Sasha Levin --- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 1 + drivers/gpu/drm/msm/msm_gpu.c | 1 - 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index 074fb498706f2..036f024ea2595 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -1079,6 +1079,7 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev, adreno_gpu->chip_id = config->chip_id; gpu->allow_relocs = config->info->family < ADRENO_6XX_GEN1; + gpu->pdev = pdev; /* Only handle the core clock when GMU is not in use (or is absent). */ if (adreno_has_gmu_wrapper(adreno_gpu) || diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index cd185b9636d26..56b6de049bd7b 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -929,7 +929,6 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev, if (IS_ERR(gpu->gpu_cx)) gpu->gpu_cx = NULL; - gpu->pdev = pdev; platform_set_drvdata(pdev, &gpu->adreno_smmu); msm_devfreq_init(gpu); -- 2.43.0