From: Sasha Levin <sashal@kernel.org>
To: linux-kernel@vger.kernel.org, stable@vger.kernel.org
Cc: Marc Gonzalez <mgonzalez@freebox.fr>,
Caleb Connolly <caleb.connolly@linaro.org>,
Bjorn Andersson <andersson@kernel.org>,
Will Deacon <will@kernel.org>, Sasha Levin <sashal@kernel.org>,
robdclark@gmail.com, joro@8bytes.org, iommu@lists.linux.dev,
linux-arm-msm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH AUTOSEL 6.6 078/139] iommu/arm-smmu-qcom: hide last LPASS SMMU context bank from linux
Date: Wed, 25 Sep 2024 08:08:18 -0400 [thread overview]
Message-ID: <20240925121137.1307574-78-sashal@kernel.org> (raw)
In-Reply-To: <20240925121137.1307574-1-sashal@kernel.org>
From: Marc Gonzalez <mgonzalez@freebox.fr>
[ Upstream commit 3a8990b8a778219327c5f8ecf10b5d81377b925a ]
On qcom msm8998, writing to the last context bank of lpass_q6_smmu
(base address 0x05100000) produces a system freeze & reboot.
The hardware/hypervisor reports 13 context banks for the LPASS SMMU
on msm8998, but only the first 12 are accessible...
Override the number of context banks
[ 2.546101] arm-smmu 5100000.iommu: probing hardware configuration...
[ 2.552439] arm-smmu 5100000.iommu: SMMUv2 with:
[ 2.558945] arm-smmu 5100000.iommu: stage 1 translation
[ 2.563627] arm-smmu 5100000.iommu: address translation ops
[ 2.568923] arm-smmu 5100000.iommu: non-coherent table walk
[ 2.574566] arm-smmu 5100000.iommu: (IDR0.CTTW overridden by FW configuration)
[ 2.580220] arm-smmu 5100000.iommu: stream matching with 12 register groups
[ 2.587263] arm-smmu 5100000.iommu: 13 context banks (0 stage-2 only)
[ 2.614447] arm-smmu 5100000.iommu: Supported page sizes: 0x63315000
[ 2.621358] arm-smmu 5100000.iommu: Stage-1: 36-bit VA -> 36-bit IPA
[ 2.627772] arm-smmu 5100000.iommu: preserved 0 boot mappings
Specifically, the crashes occur here:
qsmmu->bypass_cbndx = smmu->num_context_banks - 1;
arm_smmu_cb_write(smmu, qsmmu->bypass_cbndx, ARM_SMMU_CB_SCTLR, 0);
and here:
arm_smmu_write_context_bank(smmu, i);
arm_smmu_cb_write(smmu, i, ARM_SMMU_CB_FSR, ARM_SMMU_CB_FSR_FAULT);
It is likely that FW reserves the last context bank for its own use,
thus a simple work-around is: DON'T USE IT in Linux.
If we decrease the number of context banks, last one will be "hidden".
Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20240820-smmu-v3-1-2f71483b00ec@freebox.fr
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
index 6e6cb19c81f59..b899a7b7fa935 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
@@ -278,6 +278,13 @@ static int qcom_smmu_cfg_probe(struct arm_smmu_device *smmu)
u32 smr;
int i;
+ /*
+ * MSM8998 LPASS SMMU reports 13 context banks, but accessing
+ * the last context bank crashes the system.
+ */
+ if (of_device_is_compatible(smmu->dev->of_node, "qcom,msm8998-smmu-v2") && smmu->num_context_banks == 13)
+ smmu->num_context_banks = 12;
+
/*
* Some platforms support more than the Arm SMMU architected maximum of
* 128 stream matching groups. For unknown reasons, the additional
--
2.43.0
next prev parent reply other threads:[~2024-09-25 12:15 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20240925121137.1307574-1-sashal@kernel.org>
2024-09-25 12:08 ` [PATCH AUTOSEL 6.6 063/139] ASoC: codecs: wsa883x: Handle reading version failure Sasha Levin
2024-09-25 12:08 ` Sasha Levin [this message]
2024-09-25 12:08 ` [PATCH AUTOSEL 6.6 079/139] iommu/arm-smmu-qcom: Work around SDM845 Adreno SMMU w/ 16K pages Sasha Levin
2024-09-25 12:08 ` [PATCH AUTOSEL 6.6 099/139] drm/msm/adreno: Assign msm_gpu->pdev earlier to avoid nullptrs Sasha Levin
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