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From: Rob Herring <robh@kernel.org>
To: Ram Kumar Dwivedi <quic_rdwivedi@quicinc.com>
Cc: manivannan.sadhasivam@linaro.org, alim.akhtar@samsung.com,
	avri.altman@wdc.com, bvanassche@acm.org, krzk+dt@kernel.org,
	conor+dt@kernel.org, andersson@kernel.org,
	konrad.dybcio@linaro.org, James.Bottomley@hansenpartnership.com,
	martin.petersen@oracle.com, agross@kernel.org,
	linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	quic_narepall@quicinc.com, quic_nitirawa@quicinc.com
Subject: Re: [PATCH V1 1/3] dt-bindings: ufs: qcom: Document ice configuration table
Date: Sat, 5 Oct 2024 09:37:13 -0500	[thread overview]
Message-ID: <20241005143713.GA148600-robh@kernel.org> (raw)
In-Reply-To: <20241005064307.18972-2-quic_rdwivedi@quicinc.com>

On Sat, Oct 05, 2024 at 12:13:05PM +0530, Ram Kumar Dwivedi wrote:
> There are three algorithms supported for inline crypto engine:
> Floor based, Static and Instantaneous algorithm.
> 
> Document the compatible used for the algorithm configurations
> for inline crypto engine found.
> 
> Co-developed-by: Naveen Kumar Goud Arepalli <quic_narepall@quicinc.com>
> Signed-off-by: Naveen Kumar Goud Arepalli <quic_narepall@quicinc.com>
> Co-developed-by: Nitin Rawat <quic_nitirawa@quicinc.com>
> Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com>
> Signed-off-by: Ram Kumar Dwivedi <quic_rdwivedi@quicinc.com>
> ---
>  .../devicetree/bindings/ufs/qcom,ufs.yaml     | 24 +++++++++++++++++++
>  1 file changed, 24 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
> index 25a5edeea164..5ac56e164643 100644
> --- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
> +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
> @@ -108,6 +108,11 @@ properties:
>      description:
>        GPIO connected to the RESET pin of the UFS memory device.
>  
> +  ice-config:
> +    type: object
> +    description:
> +      ICE configuration table for Qualcom SOC

What goes in this node?

> +
>  required:
>    - compatible
>    - reg
> @@ -350,5 +355,24 @@ examples:
>                              <0 0>,
>                              <0 0>;
>              qcom,ice = <&ice>;
> +
> +            ice_cfg: ice-config {
> +                alg1 {
> +                     alg-name = "alg1";
> +                     rx-alloc-percent = <60>;
> +                     status = "disabled";

Examples should be enabled.

> +                };
> +
> +                alg2 {
> +                     alg-name = "alg2";
> +                     status = "disabled";
> +                };
> +
> +                alg3 {
> +                     alg-name = "alg3";
> +                     num-core = <28 28 15 13>;
> +                     status = "ok";
> +                };
> +            };
>          };
>      };
> -- 
> 2.46.0
> 

  parent reply	other threads:[~2024-10-05 14:37 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-05  6:43 [PATCH V1 0/3] Add support for multiple ICE algorithms Ram Kumar Dwivedi
2024-10-05  6:43 ` [PATCH V1 1/3] dt-bindings: ufs: qcom: Document ice configuration table Ram Kumar Dwivedi
2024-10-05 14:24   ` Rob Herring (Arm)
2024-10-29 10:55     ` Ram Kumar Dwivedi
2024-10-05 14:37   ` Rob Herring [this message]
2024-10-05 19:15   ` Eric Biggers
2024-10-29 11:08     ` Ram Kumar Dwivedi
2024-10-06  8:31   ` Krzysztof Kozlowski
2024-10-05  6:43 ` [PATCH V1 2/3] arm64: dts: qcom: sm8650: Add ICE algorithm entries Ram Kumar Dwivedi
2024-10-06  8:32   ` Krzysztof Kozlowski
2024-10-29 11:06     ` Ram Kumar Dwivedi
2024-10-29 11:23       ` Krzysztof Kozlowski
2024-10-05  6:43 ` [PATCH V1 3/3] scsi: ufs: qcom: Add support for multiple ICE algorithms Ram Kumar Dwivedi
2024-10-05 19:33   ` Christophe JAILLET
2024-10-29 11:10     ` Ram Kumar Dwivedi
2024-10-06  7:14   ` kernel test robot

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