Re: [PATCH] arm64: dts: qcom: sc8280xp: correct usb phy power supply

[Pengyu Luo <mitltlatltl@gmail.com>]

On Fri, Jan 10, 2025 at 8:28 PM Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> wrote:
> On 10.01.2025 10:23 AM, Pengyu Luo wrote:
> > On this platform, according to dsdt tables, usb{0,1} phy consume the
> > following regulators. usb2 phy should be corrected also, usb2 in dsdt
> > is a little complicated, so correct usb{0,1} only for now.
> >
> >       usb0    usb1    voltage consumer
> > hsphy:
> >       l1c     l1c     1.8v    vdda18-supply
> >       l9d     l4b     0.912v  vdda-pll-supply
> >       l7d     l13c    3.072v  vdda33-supply
> > qmpphy:
> >       l4d     l3b     1.2v    vdda-phy-supply
> >       l6d     l6b     0.88v   vdda-pll-supply
>
> Looking at the CRD schematics, it should instead be:
>
> USB0    USB1    VOLT            NAME
> L1B     L8D     0.9ish          PHY
> L4D     L4D     1.2             PLL
>
> I'm hoping I'm reading those right, it's not super obvious
>

Yes, right.

Yours is correspond to usb2 qmpphy(internal usb)

this is from sc8280xp-crd:

&usb_2_qmpphy0 {
        vdda-phy-supply = <&vreg_l1b>;
        vdda-pll-supply = <&vreg_l4d>;

        status = "okay";
};

&usb_2_qmpphy1 {
        vdda-phy-supply = <&vreg_l8d>;
        vdda-pll-supply = <&vreg_l4d>;

        status = "okay";
};

I had checked many dsdt tables of sc8280xp-based devices, they are

Name (LPCC, Package (0x07)
{
...
Package (0x08)
{
	"\\_SB.URS0.USB0",
	...
	"PPP_RESOURCE_ID_LDO1_C" // 1.8v
	...
	"PPP_RESOURCE_ID_LDO9_D" // 0.912v
	...
	"PPP_RESOURCE_ID_LDO7_D" // 3.072v
	...
	"PPP_RESOURCE_ID_LDO4_D" // 1.2v
	...
	"PPP_RESOURCE_ID_LDO6_D" // 0.88v
	...
}
...
Package (0x08)
{
	"\\_SB.URS1.USB1",
	...
	"PPP_RESOURCE_ID_LDO1_C" // 1.8v
	...
	"PPP_RESOURCE_ID_LDO4_B" // 0.912v
	...
	"PPP_RESOURCE_ID_LDO13_C" // 3.072v
	...
	"PPP_RESOURCE_ID_LDO3_B" // 1.2v
	...
	"PPP_RESOURCE_ID_LDO6_B" // 0.88v
	...
}
...
}

On many platforms, such as sm8350-hdk, sc8180x-primus, x1e80100-crd, which
also support qmp phy, their PHY consumes a 1.2v vreg, their PLL consumes a
0.88v(approx) vreg. So I wirite this patch.

> Konrad
>

Best wishes,
Pengyu