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Bottomley" , "Martin K. Petersen" , linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, quic_nitirawa@quicinc.com, quic_cang@quicinc.com, quic_nguyenb@quicinc.com Subject: Re: [PATCH V3 3/3] scsi: ufs-qcom: Add support for testbus registers Message-ID: <20250318070513.rhl5lfwdu7mo7xv6@thinkpad> References: <20250313051635.22073-1-quic_mapa@quicinc.com> <20250313051635.22073-4-quic_mapa@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20250313051635.22073-4-quic_mapa@quicinc.com> On Thu, Mar 13, 2025 at 10:46:35AM +0530, Manish Pandey wrote: > This patch introduces support for dumping testbus registers, > enhancing the debugging capabilities for UFS-QCOM drivers. > Same comment as patch 1. > Signed-off-by: Manish Pandey > --- > Changes in v3: > - Annotated the 'testbus' declaration with __free. > - Converted the switch-statements into an array lookup. > - Introduced struct testbus_info{} for handling testbus switch-statements to an array lookup. > Changes in v2: > - Rebased patchsets. > - Link to v1: https://lore.kernel.org/linux-arm-msm/20241025055054.23170-1-quic_mapa@quicinc.com/ > > --- > drivers/ufs/host/ufs-qcom.c | 53 ++++++++++++++++++++++++++++++++++++- > 1 file changed, 52 insertions(+), 1 deletion(-) > > diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c > index fb9da04c0d35..c32b1268d299 100644 > --- a/drivers/ufs/host/ufs-qcom.c > +++ b/drivers/ufs/host/ufs-qcom.c > @@ -17,6 +17,7 @@ > #include > #include > #include > +#include Sort includes alphabetically. > > #include > > @@ -98,6 +99,24 @@ static const struct __ufs_qcom_bw_table { > [MODE_MAX][0][0] = { 7643136, 819200 }, > }; > > +static const struct { > + int nminor; > + char *prefix; > +} testbus_info[TSTBUS_MAX] = { > + [TSTBUS_UAWM] = {32, "TSTBUS_UAWM "}, > + [TSTBUS_UARM] = {32, "TSTBUS_UARM "}, > + [TSTBUS_TXUC] = {32, "TSTBUS_TXUC "}, > + [TSTBUS_RXUC] = {32, "TSTBUS_RXUC "}, > + [TSTBUS_DFC] = {32, "TSTBUS_DFC "}, > + [TSTBUS_TRLUT] = {32, "TSTBUS_TRLUT "}, > + [TSTBUS_TMRLUT] = {32, "TSTBUS_TMRLUT "}, > + [TSTBUS_OCSC] = {32, "TSTBUS_OCSC "}, > + [TSTBUS_UTP_HCI] = {32, "TSTBUS_UTP_HCI "}, > + [TSTBUS_COMBINED] = {32, "TSTBUS_COMBINED "}, > + [TSTBUS_WRAPPER] = {32, "TSTBUS_WRAPPER "}, > + [TSTBUS_UNIPRO] = {256, "TSTBUS_UNIPRO "} > +}; > + > static void ufs_qcom_get_default_testbus_cfg(struct ufs_qcom_host *host); > static int ufs_qcom_set_core_clk_ctrl(struct ufs_hba *hba, unsigned long freq); > > @@ -1566,6 +1585,33 @@ int ufs_qcom_testbus_config(struct ufs_qcom_host *host) > return 0; > } > > +static void ufs_qcom_dump_testbus(struct ufs_hba *hba) > +{ > + struct ufs_qcom_host *host = ufshcd_get_variant(hba); > + int i, j, nminor = 0, testbus_len = 0; > + u32 *testbus __free(kfree) = NULL; > + char *prefix; > + > + testbus = kmalloc(256 * sizeof(u32), GFP_KERNEL); Use kmalloc_array(). > + if (!testbus) > + return; > + > + for (j = 0; j < TSTBUS_MAX; j++) { > + nminor = testbus_info[j].nminor; > + prefix = testbus_info[j].prefix; > + host->testbus.select_major = j; > + testbus_len = nminor * sizeof(u32); > + for (i = 0; i < nminor; i++) { > + host->testbus.select_minor = i; > + ufs_qcom_testbus_config(host); > + testbus[i] = ufshcd_readl(hba, UFS_TEST_BUS); > + usleep_range(100, 200); Why this delay is required? > + } > + print_hex_dump(KERN_ERR, prefix, DUMP_PREFIX_OFFSET, > + 16, 4, testbus, testbus_len, false); > + } > +} > + > static void ufs_qcom_dump_mcq_hci_regs(struct ufs_hba *hba) > { > /* sleep intermittently to prevent CPU hog during data dumps. */ > @@ -1680,9 +1726,14 @@ static void ufs_qcom_dump_dbg_regs(struct ufs_hba *hba) > > /* ensure below dumps occur only in task context due to blocking calls. */ > if (in_task()) { > - /* Dump MCQ Host Vendor Specific Registers */ > + /* dump MCQ Host Vendor Specific Registers */ Spurious change. > if (hba->mcq_enabled) > ufs_qcom_dump_mcq_hci_regs(hba); > + > + /* sleep a bit intermittently as we are dumping too much data */ > + ufshcd_dump_regs(hba, UFS_TEST_BUS, 4, "UFS_TEST_BUS "); > + usleep_range(1000, 1100); Same comment as previous patch. Use cond_resched(). - Mani -- மணிவண்ணன் சதாசிவம்