From: Songwei Chai <quic_songchai@quicinc.com>
To: <quic_songchai@quicinc.com>
Cc: <linux-arm-msm@vger.kernel.org>
Subject: [PATCH v4 4/7] coresight-tgu: Add TGU decode support
Date: Wed, 23 Apr 2025 14:26:48 +0800 [thread overview]
Message-ID: <20250423-tgu_patch-v4-4-92bbca66c766@quicinc.com> (raw)
In-Reply-To: <20250423-tgu_patch-v4-0-92bbca66c766@quicinc.com>
Decoding is when all the potential pieces for creating a trigger
are brought together for a given step. Example - there may be a
counter keeping track of some occurrences and a priority-group that
is being used to detect a pattern on the sense inputs. These 2
inputs to condition_decode must be programmed, for a given step,
to establish the condition for the trigger, or movement to another
steps.
Signed-off-by: Songwei Chai <quic_songchai@quicinc.com>
---
.../ABI/testing/sysfs-bus-coresight-devices-tgu | 7 +
drivers/hwtracing/coresight/coresight-tgu.c | 186 ++++++++++++++++++---
drivers/hwtracing/coresight/coresight-tgu.h | 29 +++-
3 files changed, 196 insertions(+), 26 deletions(-)
diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tgu b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tgu
index 58434097688388ab5d755030c52acca75f04cfb6..50967ca039d88d7aa16e3d9c92aec32fef2b3498 100644
--- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tgu
+++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tgu
@@ -14,3 +14,10 @@ KernelVersion 6.15
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Sam Chai (QUIC) <quic_songchai@quicinc.com>
Description:
(RW) Set/Get the sensed signal with specific step and priority for TGU.
+
+What: /sys/bus/coresight/devices/<tgu-name>/step[0:7]_condition_decode/reg[0:3]
+Date: February 2025
+KernelVersion 6.15
+Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Sam Chai (QUIC) <quic_songchai@quicinc.com>
+Description:
+ (RW) Set/Get the decode mode with specific step for TGU.
\ No newline at end of file
diff --git a/drivers/hwtracing/coresight/coresight-tgu.c b/drivers/hwtracing/coresight/coresight-tgu.c
index 6dbfd4c604b1fe6335e0cdff69521a08325c1f4d..8dbe8ab30174d97d754dcac23e2666c2cbfe4a48 100644
--- a/drivers/hwtracing/coresight/coresight-tgu.c
+++ b/drivers/hwtracing/coresight/coresight-tgu.c
@@ -21,13 +21,35 @@ static int calculate_array_location(struct tgu_drvdata *drvdata,
int step_index, int operation_index,
int reg_index)
{
- int ret;
+ int ret = -EINVAL;
+
+ switch (operation_index) {
+ case TGU_PRIORITY0:
+ case TGU_PRIORITY1:
+ case TGU_PRIORITY2:
+ case TGU_PRIORITY3:
+ ret = operation_index * (drvdata->max_step) *
+ (drvdata->max_reg) +
+ step_index * (drvdata->max_reg) + reg_index;
+ break;
+ case TGU_CONDITION_DECODE:
+ ret = step_index * (drvdata->max_condition_decode) +
+ reg_index;
+ break;
+ default:
+ break;
+ }
+ return ret;
+}
- ret = operation_index * (drvdata->max_step) *
- (drvdata->max_reg) +
- step_index * (drvdata->max_reg) + reg_index;
+static int check_array_location(struct tgu_drvdata *drvdata, int step,
+ int ops, int reg)
+{
+ int result = calculate_array_location(drvdata, step, ops, reg);
- return ret;
+ if (result == -EINVAL)
+ dev_err(&drvdata->csdev->dev, "%s - Fail\n", __func__);
+ return result;
}
static ssize_t tgu_dataset_show(struct device *dev,
@@ -36,13 +58,33 @@ static ssize_t tgu_dataset_show(struct device *dev,
struct tgu_drvdata *drvdata = dev_get_drvdata(dev->parent);
struct tgu_attribute *tgu_attr =
container_of(attr, struct tgu_attribute, attr);
+ int ret = 0;
+
+ ret = check_array_location(drvdata, tgu_attr->step_index,
+ tgu_attr->operation_index, tgu_attr->reg_num);
+ if (ret == -EINVAL)
+ return ret;
- return sysfs_emit(buf, "0x%x\n",
- drvdata->value_table->priority[
- calculate_array_location(
- drvdata, tgu_attr->step_index,
- tgu_attr->operation_index,
- tgu_attr->reg_num)]);
+ switch (tgu_attr->operation_index) {
+ case TGU_PRIORITY0:
+ case TGU_PRIORITY1:
+ case TGU_PRIORITY2:
+ case TGU_PRIORITY3:
+ return sysfs_emit(buf, "0x%x\n",
+ drvdata->value_table->priority[calculate_array_location(
+ drvdata, tgu_attr->step_index,
+ tgu_attr->operation_index,
+ tgu_attr->reg_num)]);
+ case TGU_CONDITION_DECODE:
+ return sysfs_emit(buf, "0x%x\n",
+ drvdata->value_table->condition_decode[calculate_array_location(
+ drvdata, tgu_attr->step_index,
+ tgu_attr->operation_index,
+ tgu_attr->reg_num)]);
+ default:
+ break;
+ }
+ return -EINVAL;
}
static ssize_t tgu_dataset_store(struct device *dev,
@@ -51,20 +93,44 @@ static ssize_t tgu_dataset_store(struct device *dev,
size_t size)
{
unsigned long val;
+ int ret = -EINVAL;
struct tgu_drvdata *tgu_drvdata = dev_get_drvdata(dev->parent);
struct tgu_attribute *tgu_attr =
container_of(attr, struct tgu_attribute, attr);
if (kstrtoul(buf, 0, &val))
- return -EINVAL;
+ return ret;
- guard(spinlock)(&tgu_drvdata->spinlock);
- tgu_drvdata->value_table->priority[calculate_array_location(
- tgu_drvdata, tgu_attr->step_index, tgu_attr->operation_index,
- tgu_attr->reg_num)] = val;
+ ret = check_array_location(tgu_drvdata, tgu_attr->step_index,
+ tgu_attr->operation_index, tgu_attr->reg_num);
- return size;
+ if (ret == -EINVAL)
+ return ret;
+
+ guard(spinlock)(&tgu_drvdata->spinlock);
+ switch (tgu_attr->operation_index) {
+ case TGU_PRIORITY0:
+ case TGU_PRIORITY1:
+ case TGU_PRIORITY2:
+ case TGU_PRIORITY3:
+ tgu_drvdata->value_table->priority[calculate_array_location(
+ tgu_drvdata, tgu_attr->step_index,
+ tgu_attr->operation_index,
+ tgu_attr->reg_num)] = val;
+ ret = size;
+ break;
+ case TGU_CONDITION_DECODE:
+ tgu_drvdata->value_table->condition_decode[calculate_array_location(
+ tgu_drvdata, tgu_attr->step_index,
+ tgu_attr->operation_index,
+ tgu_attr->reg_num)] = val;
+ ret = size;
+ break;
+ default:
+ break;
+ }
+ return ret;
}
static umode_t tgu_node_visible(struct kobject *kobject,
@@ -81,34 +147,70 @@ static umode_t tgu_node_visible(struct kobject *kobject,
container_of(dev_attr, struct tgu_attribute, attr);
if (tgu_attr->step_index < drvdata->max_step) {
- ret = (tgu_attr->reg_num < drvdata->max_reg) ?
- attr->mode :
- 0;
+ switch (tgu_attr->operation_index) {
+ case TGU_PRIORITY0:
+ case TGU_PRIORITY1:
+ case TGU_PRIORITY2:
+ case TGU_PRIORITY3:
+ ret = (tgu_attr->reg_num < drvdata->max_reg) ?
+ attr->mode :
+ 0;
+ break;
+ case TGU_CONDITION_DECODE:
+ ret = (tgu_attr->reg_num <
+ drvdata->max_condition_decode) ?
+ attr->mode :
+ 0;
+ break;
+ default:
+ break;
+ }
}
return ret;
}
-static void tgu_write_all_hw_regs(struct tgu_drvdata *drvdata)
+static ssize_t tgu_write_all_hw_regs(struct tgu_drvdata *drvdata)
{
- int i, j, k;
+ int i, j, k, ret;
CS_UNLOCK(drvdata->base);
for (i = 0; i < drvdata->max_step; i++) {
for (j = 0; j < MAX_PRIORITY; j++) {
for (k = 0; k < drvdata->max_reg; k++) {
+
+ ret = check_array_location(drvdata, i, j, k);
+ if (ret == -EINVAL)
+ goto exit;
+
tgu_writel(drvdata,
drvdata->value_table->priority
[calculate_array_location(
- drvdata, i, j, k)],
+ drvdata, i, j, k)],
PRIORITY_REG_STEP(i, j, k));
}
}
}
+ for (i = 0; i < drvdata->max_step; i++) {
+ for (j = 0; j < drvdata->max_condition_decode; j++) {
+ ret = check_array_location(drvdata, i, TGU_CONDITION_DECODE, j);
+ if (ret == -EINVAL)
+ goto exit;
+
+ tgu_writel(drvdata,
+ drvdata->value_table->condition_decode
+ [calculate_array_location(
+ drvdata, i,
+ TGU_CONDITION_DECODE, j)],
+ CONDITION_DECODE_STEP(i, j));
+ }
+ }
/* Enable TGU to program the triggers */
tgu_writel(drvdata, 1, TGU_CONTROL);
+exit:
CS_LOCK(drvdata->base);
+ return ret >= 0 ? 0 : ret;
}
static void tgu_set_reg_number(struct tgu_drvdata *drvdata)
@@ -139,9 +241,21 @@ static void tgu_set_steps(struct tgu_drvdata *drvdata)
drvdata->max_step = num_steps;
}
+static void tgu_set_conditions(struct tgu_drvdata *drvdata)
+{
+ int num_conditions;
+ u32 devid;
+
+ devid = readl_relaxed(drvdata->base + CORESIGHT_DEVID);
+
+ num_conditions = TGU_DEVID_CONDITIONS(devid);
+ drvdata->max_condition_decode = num_conditions;
+}
+
static int tgu_enable(struct coresight_device *csdev, enum cs_mode mode,
void *data)
{
+ int ret = 0;
struct tgu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
spin_lock(&drvdata->spinlock);
@@ -150,11 +264,15 @@ static int tgu_enable(struct coresight_device *csdev, enum cs_mode mode,
spin_unlock(&drvdata->spinlock);
return -EBUSY;
}
- tgu_write_all_hw_regs(drvdata);
+ ret = tgu_write_all_hw_regs(drvdata);
+
+ if (ret == -EINVAL)
+ goto exit;
drvdata->enable = true;
+exit:
spin_unlock(&drvdata->spinlock);
- return 0;
+ return ret;
}
static int tgu_disable(struct coresight_device *csdev, void *data)
@@ -271,6 +389,14 @@ static const struct attribute_group *tgu_attr_groups[] = {
PRIORITY_ATTRIBUTE_GROUP_INIT(7, 1),
PRIORITY_ATTRIBUTE_GROUP_INIT(7, 2),
PRIORITY_ATTRIBUTE_GROUP_INIT(7, 3),
+ CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(0),
+ CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(1),
+ CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(2),
+ CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(3),
+ CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(4),
+ CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(5),
+ CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(6),
+ CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(7),
NULL,
};
@@ -307,6 +433,7 @@ static int tgu_probe(struct amba_device *adev, const struct amba_id *id)
tgu_set_reg_number(drvdata);
tgu_set_steps(drvdata);
+ tgu_set_conditions(drvdata);
drvdata->value_table =
devm_kzalloc(dev, sizeof(*drvdata->value_table), GFP_KERNEL);
@@ -322,6 +449,15 @@ static int tgu_probe(struct amba_device *adev, const struct amba_id *id)
if (!drvdata->value_table->priority)
return -ENOMEM;
+ drvdata->value_table->condition_decode = devm_kzalloc(
+ dev,
+ drvdata->max_condition_decode * drvdata->max_step *
+ sizeof(*(drvdata->value_table->condition_decode)),
+ GFP_KERNEL);
+
+ if (!drvdata->value_table->condition_decode)
+ return -ENOMEM;
+
drvdata->enable = false;
desc.type = CORESIGHT_DEV_TYPE_HELPER;
desc.pdata = adev->dev.platform_data;
diff --git a/drivers/hwtracing/coresight/coresight-tgu.h b/drivers/hwtracing/coresight/coresight-tgu.h
index f07ead50536581578bcae7248d913207db6ac8ea..691da393ffa30fe7501ba0e8c4a058d8d561fc14 100644
--- a/drivers/hwtracing/coresight/coresight-tgu.h
+++ b/drivers/hwtracing/coresight/coresight-tgu.h
@@ -15,6 +15,7 @@
#define TGU_DEVID_SENSE_INPUT(devid_val) ((int) BMVAL(devid_val, 10, 17))
#define TGU_DEVID_STEPS(devid_val) ((int)BMVAL(devid_val, 3, 6))
+#define TGU_DEVID_CONDITIONS(devid_val) ((int)BMVAL(devid_val, 0, 2))
#define NUMBER_BITS_EACH_SIGNAL 4
#define LENGTH_REGISTER 32
@@ -48,6 +49,7 @@
*/
#define STEP_OFFSET 0x1D8
#define PRIORITY_START_OFFSET 0x0074
+#define CONDITION_DECODE_OFFSET 0x0050
#define PRIORITY_OFFSET 0x60
#define REG_OFFSET 0x4
@@ -56,6 +58,9 @@
(PRIORITY_START_OFFSET + PRIORITY_OFFSET * priority +\
REG_OFFSET * reg + STEP_OFFSET * step)
+#define CONDITION_DECODE_STEP(step, decode) \
+ (CONDITION_DECODE_OFFSET + REG_OFFSET * decode + STEP_OFFSET * step)
+
#define tgu_dataset_rw(name, step_index, type, reg_num) \
(&((struct tgu_attribute[]){ { \
__ATTR(name, 0644, tgu_dataset_show, tgu_dataset_store), \
@@ -68,6 +73,9 @@
tgu_dataset_rw(reg##reg_num, step_index, TGU_PRIORITY##priority, \
reg_num)
+#define STEP_DECODE(step_index, reg_num) \
+ tgu_dataset_rw(reg##reg_num, step_index, TGU_CONDITION_DECODE, reg_num)
+
#define STEP_PRIORITY_LIST(step_index, priority) \
{STEP_PRIORITY(step_index, 0, priority), \
STEP_PRIORITY(step_index, 1, priority), \
@@ -90,6 +98,14 @@
NULL \
}
+#define STEP_DECODE_LIST(n) \
+ {STEP_DECODE(n, 0), \
+ STEP_DECODE(n, 1), \
+ STEP_DECODE(n, 2), \
+ STEP_DECODE(n, 3), \
+ NULL \
+ }
+
#define PRIORITY_ATTRIBUTE_GROUP_INIT(step, priority)\
(&(const struct attribute_group){\
.attrs = (struct attribute*[])STEP_PRIORITY_LIST(step, priority),\
@@ -97,11 +113,19 @@
.name = "step" #step "_priority" #priority \
})
+#define CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(step)\
+ (&(const struct attribute_group){\
+ .attrs = (struct attribute*[])STEP_DECODE_LIST(step),\
+ .is_visible = tgu_node_visible,\
+ .name = "step" #step "_condition_decode" \
+ })
+
enum operation_index {
TGU_PRIORITY0,
TGU_PRIORITY1,
TGU_PRIORITY2,
- TGU_PRIORITY3
+ TGU_PRIORITY3,
+ TGU_CONDITION_DECODE
};
@@ -117,6 +141,7 @@ struct tgu_attribute {
struct value_table {
unsigned int *priority;
+ unsigned int *condition_decode;
};
/**
@@ -129,6 +154,7 @@ struct value_table {
* @value_table: Store given value based on relevant parameters.
* @max_reg: Maximum number of registers
* @max_step: Maximum step size
+ * @max_condition_decode: Maximum number of condition_decode
*
* This structure defines the data associated with a TGU device,
* including its base address, device pointers, clock, spinlock for
@@ -144,6 +170,7 @@ struct tgu_drvdata {
struct value_table *value_table;
int max_reg;
int max_step;
+ int max_condition_decode;
};
#endif
--
2.34.1
next prev parent reply other threads:[~2025-04-23 6:27 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-23 6:26 [PATCH v4 0/7] Provides support for Trigger Generation Unit Songwei Chai
2025-04-23 6:26 ` [PATCH v4 1/7] dt-bindings: arm: Add support for Coresight TGU trace Songwei Chai
2025-04-23 6:26 ` [PATCH v4 2/7] coresight: Add coresight TGU driver Songwei Chai
2025-04-23 6:26 ` [PATCH v4 3/7] coresight-tgu: Add signal priority support Songwei Chai
2025-04-23 6:26 ` Songwei Chai [this message]
2025-04-23 6:26 ` [PATCH v4 5/7] coresight-tgu: add support to configure next action Songwei Chai
2025-04-23 6:26 ` [PATCH v4 6/7] coresight-tgu: add timer/counter functionality for TGU Songwei Chai
2025-04-23 6:26 ` [PATCH v4 7/7] coresight-tgu: add reset node to initialize Songwei Chai
-- strict thread matches above, loose matches on Subject: below --
2025-04-23 6:38 [PATCH v4 0/7] Provides support for Trigger Generation Unit Songwei Chai
2025-04-23 6:38 ` [PATCH v4 4/7] coresight-tgu: Add TGU decode support Songwei Chai
2025-04-23 10:10 [PATCH v4 0/7] Provides support for Trigger Generation Unit Songwei Chai
2025-04-23 10:10 ` [PATCH v4 4/7] coresight-tgu: Add TGU decode support Songwei Chai
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