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Mon, 09 Jun 2025 12:23:29 +0000 (GMT) Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 559CNSHg032056 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 9 Jun 2025 12:23:28 GMT Received: from cse-cd01-lnx.ap.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 9 Jun 2025 05:23:24 -0700 From: Yongxing Mou Date: Mon, 9 Jun 2025 20:21:29 +0800 Subject: [PATCH v2 10/38] drm/msm/dp: introduce the max_streams for dp controller Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20250609-msm-dp-mst-v2-10-a54d8902a23d@quicinc.com> References: <20250609-msm-dp-mst-v2-0-a54d8902a23d@quicinc.com> In-Reply-To: <20250609-msm-dp-mst-v2-0-a54d8902a23d@quicinc.com> To: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , "Simona Vetter" CC: , , , , "Yongxing Mou" , Abhinav Kumar X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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On most platforms, the supported MST streams number is 2 or 4. For platforms that do not support MST, define DEFAULT_STREAM_COUNT as 1. Also exist platform that DP0 supports 4 streams while DP1 support 2 streams. Signed-off-by: Abhinav Kumar Signed-off-by: Yongxing Mou --- drivers/gpu/drm/msm/dp/dp_display.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index 7ed4034c89605596c874a6bf9a5a19586d6c13fb..4e0213cae4aafb468681db27b3c3fef28d44b2c0 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -34,6 +34,7 @@ module_param(psr_enabled, bool, 0); MODULE_PARM_DESC(psr_enabled, "enable PSR for eDP and DP displays"); #define HPD_STRING_SIZE 30 +#define DEFAULT_STREAM_COUNT 1 enum { ISR_DISCONNECTED, @@ -83,6 +84,7 @@ struct msm_dp_display_private { bool core_initialized; bool phy_initialized; bool audio_supported; + bool mst_supported; struct drm_device *drm_dev; @@ -110,12 +112,14 @@ struct msm_dp_display_private { bool wide_bus_supported; struct msm_dp_audio *audio; + int max_stream; }; struct msm_dp_desc { phys_addr_t io_start; unsigned int id; bool wide_bus_supported; + int mst_streams; }; static const struct msm_dp_desc msm_dp_desc_sa8775p[] = { @@ -1330,6 +1334,14 @@ static int msm_dp_display_probe(struct platform_device *pdev) dp->msm_dp_display.is_edp = (dp->msm_dp_display.connector_type == DRM_MODE_CONNECTOR_eDP); + dp->max_stream = DEFAULT_STREAM_COUNT; + dp->mst_supported = FALSE; + + if (desc->mst_streams > DEFAULT_STREAM_COUNT) { + dp->max_stream = desc->mst_streams; + dp->mst_supported = TRUE; + } + rc = msm_dp_init_sub_modules(dp); if (rc) { DRM_ERROR("init sub module failed\n"); -- 2.34.1