[PATCH V4 0/4] Add level shifter support for qualcomm SOC's

[PATCH V4 0/4] Add level shifter support for qualcomm SOC's

[Sarthak Garg]

Add level shifter support for qualcomm SOC's.

- Changed from v3
    - As suggested by Krzysztof Kozlowski moved the property from the
    SoC-level DTS to the board-level DTS.
    - Revised the commit messages to clearly explain its board-specific.

- Changed from v2
    - As suggested by Konrad Dybcio and Ulf Hansson redesigned logic
      to introduce a new DT property max-sd-hs-frequency and override
      the hs_max_dtr accordingly in sd.c file.

- Changed from v1
    - As suggested by Krzysztof Kozlowski redesigned logic to use
    compatible property for adding this level shifter support.
    - Addressed Adrian Hunter comments on V1 with resepect to
      checkpatch.
    - Cleared the bits first and then set bits in
      sdhci_msm_execute_tuning as suggested by Adrian Hunter.
    - Upated the if condition logic in msm_set_clock_rate_for_bus_mode
      as suggested by Adrian Hunter.

Sarthak Garg (4):
  mmc: sdhci-msm: Enable tuning for SDR50 mode for SD card
  dt-bindings: mmc: controller: Add max-sd-hs-frequency property
  mmc: core: Introduce a new flag max-sd-hs-frequency
  arm64: dts: qcom: sm8550: Remove SDR104/SDR50 broken capabilities

 .../bindings/mmc/mmc-controller-common.yaml       | 10 ++++++++++
 arch/arm64/boot/dts/qcom/sm8550-hdk.dts           |  1 +
 arch/arm64/boot/dts/qcom/sm8550-mtp.dts           |  1 +
 .../dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts   |  1 +
 arch/arm64/boot/dts/qcom/sm8550.dtsi              |  3 ---
 drivers/mmc/core/host.c                           |  2 ++
 drivers/mmc/core/sd.c                             |  2 +-
 drivers/mmc/host/sdhci-msm.c                      | 15 +++++++++++++++
 include/linux/mmc/host.h                          |  1 +
 9 files changed, 32 insertions(+), 4 deletions(-)

-- 
2.34.1

[PATCH V4 1/4] mmc: sdhci-msm: Enable tuning for SDR50 mode for SD card

[Sarthak Garg]

For Qualcomm SoCs which needs level shifter for SD card, extra delay is
seen on receiver data path.

To compensate this delay enable tuning for SDR50 mode for targets which
has level shifter. SDHCI_SDR50_NEEDS_TUNING caps will be set for targets
with level shifter on Qualcomm SOC's.

Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
---
 drivers/mmc/host/sdhci-msm.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index 66c0d1ba2a33..bf91cb96a0ea 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -81,6 +81,7 @@
 #define CORE_IO_PAD_PWR_SWITCH_EN	BIT(15)
 #define CORE_IO_PAD_PWR_SWITCH	BIT(16)
 #define CORE_HC_SELECT_IN_EN	BIT(18)
+#define CORE_HC_SELECT_IN_SDR50	(4 << 19)
 #define CORE_HC_SELECT_IN_HS400	(6 << 19)
 #define CORE_HC_SELECT_IN_MASK	(7 << 19)
 
@@ -1133,6 +1134,10 @@ static bool sdhci_msm_is_tuning_needed(struct sdhci_host *host)
 {
 	struct mmc_ios *ios = &host->mmc->ios;
 
+	if (ios->timing == MMC_TIMING_UHS_SDR50 &&
+	    host->flags & SDHCI_SDR50_NEEDS_TUNING)
+		return true;
+
 	/*
 	 * Tuning is required for SDR104, HS200 and HS400 cards and
 	 * if clock frequency is greater than 100MHz in these modes.
@@ -1201,6 +1206,8 @@ static int sdhci_msm_execute_tuning(struct mmc_host *mmc, u32 opcode)
 	struct mmc_ios ios = host->mmc->ios;
 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
+	const struct sdhci_msm_offset *msm_offset = msm_host->offset;
+	u32 config;
 
 	if (!sdhci_msm_is_tuning_needed(host)) {
 		msm_host->use_cdr = false;
@@ -1217,6 +1224,14 @@ static int sdhci_msm_execute_tuning(struct mmc_host *mmc, u32 opcode)
 	 */
 	msm_host->tuning_done = 0;
 
+	if (ios.timing == MMC_TIMING_UHS_SDR50 &&
+	    host->flags & SDHCI_SDR50_NEEDS_TUNING) {
+		config = readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec);
+		config &= ~CORE_HC_SELECT_IN_MASK;
+		config |= CORE_HC_SELECT_IN_EN | CORE_HC_SELECT_IN_SDR50;
+		writel_relaxed(config, host->ioaddr + msm_offset->core_vendor_spec);
+	}
+
 	/*
 	 * For HS400 tuning in HS200 timing requires:
 	 * - select MCLK/2 in VENDOR_SPEC
-- 
2.34.1

[PATCH V4 2/4] dt-bindings: mmc: controller: Add max-sd-hs-frequency property

[Sarthak Garg]

Some platforms may require limiting the maximum frequency used in SD
High-Speed (HS) mode due to board-level hardware constraints. For
example, certain boards may include level shifters or other components
that cannot reliably operate at the default 50 MHz HS frequency.

Introduce a new optional device tree property max-sd-hs-frequency to
limit the maximum frequency (in Hz) used for SD cards operating in
High-Speed (HS) mode.

Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
---
 .../devicetree/bindings/mmc/mmc-controller-common.yaml | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml b/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml
index 9a7235439759..6c2529b976d1 100644
--- a/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml
+++ b/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml
@@ -93,6 +93,16 @@ properties:
     minimum: 400000
     maximum: 384000000
 
+  max-sd-hs-frequency:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: |
+      Maximum frequency (in Hz) to be used for SD cards operating in
+      High-Speed (HS) mode. This is useful for board-specific limitations,
+      such as level shifters or others where the card cannot reliably
+      operate at the default 50 MHz HS frequency.
+    minimum: 400000
+    maximum: 50000000
+
   disable-wp:
     $ref: /schemas/types.yaml#/definitions/flag
     description:
-- 
2.34.1

[PATCH V4 3/4] mmc: core: Introduce a new flag max-sd-hs-frequency

[Sarthak Garg]

Introduce a new device tree flag to cap the maximum High-Speed (HS)
mode frequency for SD cards, accommodating board-specific
constraints such as the inclusion of a level shifter which cannot
support the default 50Mhz HS frequency and others.

Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
---
 drivers/mmc/core/host.c  | 2 ++
 drivers/mmc/core/sd.c    | 2 +-
 include/linux/mmc/host.h | 1 +
 3 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c
index dacb5bd9bb71..7892e80bc073 100644
--- a/drivers/mmc/core/host.c
+++ b/drivers/mmc/core/host.c
@@ -302,6 +302,8 @@ int mmc_of_parse(struct mmc_host *host)
 	/* f_max is obtained from the optional "max-frequency" property */
 	device_property_read_u32(dev, "max-frequency", &host->f_max);
 
+	device_property_read_u32(dev, "max-sd-hs-frequency", &host->max_sd_hs_freq);
+
 	/*
 	 * Configure CD and WP pins. They are both by default active low to
 	 * match the SDHCI spec. If GPIOs are provided for CD and / or WP, the
diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c
index ec02067f03c5..d2f1766bddb4 100644
--- a/drivers/mmc/core/sd.c
+++ b/drivers/mmc/core/sd.c
@@ -359,7 +359,7 @@ static int mmc_read_switch(struct mmc_card *card)
 	}
 
 	if (status[13] & SD_MODE_HIGH_SPEED)
-		card->sw_caps.hs_max_dtr = HIGH_SPEED_MAX_DTR;
+		card->sw_caps.hs_max_dtr = card->host->max_sd_hs_freq ?: HIGH_SPEED_MAX_DTR;
 
 	if (card->scr.sda_spec3) {
 		card->sw_caps.sd3_bus_mode = status[13];
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index 68f09a955a90..552e8a22c0a2 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -565,6 +565,7 @@ struct mmc_host {
 	int			hsq_depth;
 
 	u32			err_stats[MMC_ERR_MAX];
+	unsigned int		max_sd_hs_freq;
 	unsigned long		private[] ____cacheline_aligned;
 };
 
-- 
2.34.1

[PATCH V4 4/4] arm64: dts: qcom: sm8550: Remove SDR104/SDR50 broken capabilities

[Sarthak Garg]

The kernel now handles level shifter limitations affecting SD card
modes, making it unnecessary to explicitly disable SDR104 and SDR50
capabilities in the device tree.

However, due to board-specific hardware constraints particularly related
to level shifter in this case the maximum frequency for SD High-Speed
(HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD
card in HS mode. This is achieved using the max-sd-hs-frequency property
in the board DTS.

Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sm8550-hdk.dts                     | 1 +
 arch/arm64/boot/dts/qcom/sm8550-mtp.dts                     | 1 +
 arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 +
 arch/arm64/boot/dts/qcom/sm8550.dtsi                        | 3 ---
 4 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8550-hdk.dts b/arch/arm64/boot/dts/qcom/sm8550-hdk.dts
index 29bc1ddfc7b2..a6bc3c11598b 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-hdk.dts
@@ -1164,6 +1164,7 @@ &sdhc_2 {
 	vmmc-supply = <&vreg_l9b_2p9>;
 	vqmmc-supply = <&vreg_l8b_1p8>;
 
+	max-sd-hs-frequency = <37500000>;
 	bus-width = <4>;
 	no-sdio;
 	no-mmc;
diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
index 5648ab60ba4c..166d3595633d 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
@@ -818,6 +818,7 @@ &sdhc_2 {
 	pinctrl-1 = <&sdc2_sleep &sdc2_card_det_n>;
 	vmmc-supply = <&vreg_l9b_2p9>;
 	vqmmc-supply = <&vreg_l8b_1p8>;
+	max-sd-hs-frequency = <37500000>;
 	bus-width = <4>;
 	no-sdio;
 	no-mmc;
diff --git a/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts b/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts
index d90dc7b37c4a..039ead5b8784 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts
@@ -716,6 +716,7 @@ &sdhc_2 {
 	pinctrl-names = "default", "sleep";
 	vmmc-supply = <&pm8550_l9>;
 	vqmmc-supply = <&pm8550_l8>;
+	max-sd-hs-frequency = <37500000>;
 	no-sdio;
 	no-mmc;
 	status = "okay";
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 82cabf777cd2..bc7c4b77f277 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -3191,9 +3191,6 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
 			bus-width = <4>;
 			dma-coherent;
 
-			/* Forbid SDR104/SDR50 - broken hw! */
-			sdhci-caps-mask = <0x3 0>;
-
 			status = "disabled";
 
 			sdhc2_opp_table: opp-table {
-- 
2.34.1

Re: [PATCH V4 2/4] dt-bindings: mmc: controller: Add max-sd-hs-frequency property

[Krzysztof Kozlowski]

On 01/08/2025 10:45, Sarthak Garg wrote:
> Some platforms may require limiting the maximum frequency used in SD
> High-Speed (HS) mode due to board-level hardware constraints. For
> example, certain boards may include level shifters or other components
> that cannot reliably operate at the default 50 MHz HS frequency.
> 
> Introduce a new optional device tree property max-sd-hs-frequency to
> limit the maximum frequency (in Hz) used for SD cards operating in
> High-Speed (HS) mode.
> 
> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
> ---
>  .../devicetree/bindings/mmc/mmc-controller-common.yaml | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml b/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml
> index 9a7235439759..6c2529b976d1 100644
> --- a/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml
> +++ b/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml
> @@ -93,6 +93,16 @@ properties:
>      minimum: 400000
>      maximum: 384000000
>  
> +  max-sd-hs-frequency:

Use standard unit suffixes. s/frequency/hz/



> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description: |
> +      Maximum frequency (in Hz) to be used for SD cards operating in
> +      High-Speed (HS) mode. This is useful for board-specific limitations,
> +      such as level shifters or others where the card cannot reliably
> +      operate at the default 50 MHz HS frequency.

Don't repeat constraints in free form text.

default:

Re: [PATCH V4 4/4] arm64: dts: qcom: sm8550: Remove SDR104/SDR50 broken capabilities

[Krzysztof Kozlowski]

On 01/08/2025 10:45, Sarthak Garg wrote:
> The kernel now handles level shifter limitations affecting SD card
> modes, making it unnecessary to explicitly disable SDR104 and SDR50
> capabilities in the device tree.
> 
> However, due to board-specific hardware constraints particularly related
> to level shifter in this case the maximum frequency for SD High-Speed
> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD
> card in HS mode. This is achieved using the max-sd-hs-frequency property
> in the board DTS.
> 
> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/sm8550-hdk.dts                     | 1 +
>  arch/arm64/boot/dts/qcom/sm8550-mtp.dts                     | 1 +
>  arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 +
>  arch/arm64/boot/dts/qcom/sm8550.dtsi                        | 3 ---
>  4 files changed, 3 insertions(+), 3 deletions(-)
> 

This will break MMC for all of the users and nothing in commit msg or
cover letter explains that or mentions merging strategy.

Exactly this case is covered by your internal guideline, no? Please read it.

Best regards,
Krzysztof

Re: [PATCH V4 2/4] dt-bindings: mmc: controller: Add max-sd-hs-frequency property

[Sarthak Garg]

On 8/1/2025 2:30 PM, Krzysztof Kozlowski wrote:
> On 01/08/2025 10:45, Sarthak Garg wrote:
>> Some platforms may require limiting the maximum frequency used in SD
>> High-Speed (HS) mode due to board-level hardware constraints. For
>> example, certain boards may include level shifters or other components
>> that cannot reliably operate at the default 50 MHz HS frequency.
>>
>> Introduce a new optional device tree property max-sd-hs-frequency to
>> limit the maximum frequency (in Hz) used for SD cards operating in
>> High-Speed (HS) mode.
>>
>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
>> ---
>>   .../devicetree/bindings/mmc/mmc-controller-common.yaml | 10 ++++++++++
>>   1 file changed, 10 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml b/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml
>> index 9a7235439759..6c2529b976d1 100644
>> --- a/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml
>> +++ b/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml
>> @@ -93,6 +93,16 @@ properties:
>>       minimum: 400000
>>       maximum: 384000000
>>   
>> +  max-sd-hs-frequency:
> 
> Use standard unit suffixes. s/frequency/hz/
> 
> 
> 

Sure will update this name to max-sd-hs-hz in V5.

>> +    $ref: /schemas/types.yaml#/definitions/uint32
>> +    description: |
>> +      Maximum frequency (in Hz) to be used for SD cards operating in
>> +      High-Speed (HS) mode. This is useful for board-specific limitations,
>> +      such as level shifters or others where the card cannot reliably
>> +      operate at the default 50 MHz HS frequency.
> 
> Don't repeat constraints in free form text.
> 
> default:
> 
> 

Sure will remove min/max constraints and add default: 50000000 in V5.

Re: [PATCH V4 4/4] arm64: dts: qcom: sm8550: Remove SDR104/SDR50 broken capabilities

[Sarthak Garg]

On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote:
> On 01/08/2025 10:45, Sarthak Garg wrote:
>> The kernel now handles level shifter limitations affecting SD card
>> modes, making it unnecessary to explicitly disable SDR104 and SDR50
>> capabilities in the device tree.
>>
>> However, due to board-specific hardware constraints particularly related
>> to level shifter in this case the maximum frequency for SD High-Speed
>> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD
>> card in HS mode. This is achieved using the max-sd-hs-frequency property
>> in the board DTS.
>>
>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/sm8550-hdk.dts                     | 1 +
>>   arch/arm64/boot/dts/qcom/sm8550-mtp.dts                     | 1 +
>>   arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 +
>>   arch/arm64/boot/dts/qcom/sm8550.dtsi                        | 3 ---
>>   4 files changed, 3 insertions(+), 3 deletions(-)
>>
> 
> This will break MMC for all of the users and nothing in commit msg or
> cover letter explains that or mentions merging strategy.
> 
> Exactly this case is covered by your internal guideline, no? Please read it.
> 
> Best regards,
> Krzysztof

Just to make sure I’m addressing the right concern — are you primarily 
worried about the introduction of the max-sd-hs-frequency property in 
the board DTS files, or about the removal of the sdhci-caps-mask
from the common sm8550.dtsi?

Re: [PATCH V4 4/4] arm64: dts: qcom: sm8550: Remove SDR104/SDR50 broken capabilities

[Krzysztof Kozlowski]

On 05/08/2025 11:19, Sarthak Garg wrote:
> 
> 
> On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote:
>> On 01/08/2025 10:45, Sarthak Garg wrote:
>>> The kernel now handles level shifter limitations affecting SD card
>>> modes, making it unnecessary to explicitly disable SDR104 and SDR50
>>> capabilities in the device tree.
>>>
>>> However, due to board-specific hardware constraints particularly related
>>> to level shifter in this case the maximum frequency for SD High-Speed
>>> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD
>>> card in HS mode. This is achieved using the max-sd-hs-frequency property
>>> in the board DTS.
>>>
>>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
>>> ---
>>>   arch/arm64/boot/dts/qcom/sm8550-hdk.dts                     | 1 +
>>>   arch/arm64/boot/dts/qcom/sm8550-mtp.dts                     | 1 +
>>>   arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 +
>>>   arch/arm64/boot/dts/qcom/sm8550.dtsi                        | 3 ---
>>>   4 files changed, 3 insertions(+), 3 deletions(-)
>>>
>>
>> This will break MMC for all of the users and nothing in commit msg or
>> cover letter explains that or mentions merging strategy.
>>
>> Exactly this case is covered by your internal guideline, no? Please read it.
>>
>> Best regards,
>> Krzysztof
> 
> Just to make sure I’m addressing the right concern — are you primarily 
> worried about the introduction of the max-sd-hs-frequency property in 
> the board DTS files, or about the removal of the sdhci-caps-mask
> from the common sm8550.dtsi?


Apply this patch and test MMC. Does it work? No. Was it working? Yes.


Best regards,
Krzysztof

Re: [PATCH V4 4/4] arm64: dts: qcom: sm8550: Remove SDR104/SDR50 broken capabilities

[Dmitry Baryshkov]

On Tue, Aug 05, 2025 at 02:49:29PM +0530, Sarthak Garg wrote:
> 
> 
> On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote:
> > On 01/08/2025 10:45, Sarthak Garg wrote:
> > > The kernel now handles level shifter limitations affecting SD card
> > > modes, making it unnecessary to explicitly disable SDR104 and SDR50
> > > capabilities in the device tree.
> > > 
> > > However, due to board-specific hardware constraints particularly related
> > > to level shifter in this case the maximum frequency for SD High-Speed
> > > (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD
> > > card in HS mode. This is achieved using the max-sd-hs-frequency property
> > > in the board DTS.
> > > 
> > > Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
> > > ---
> > >   arch/arm64/boot/dts/qcom/sm8550-hdk.dts                     | 1 +
> > >   arch/arm64/boot/dts/qcom/sm8550-mtp.dts                     | 1 +
> > >   arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 +
> > >   arch/arm64/boot/dts/qcom/sm8550.dtsi                        | 3 ---

You missed several devices which use SM8550. Please fix that.

> > >   4 files changed, 3 insertions(+), 3 deletions(-)
> > > 
> > 
> > This will break MMC for all of the users and nothing in commit msg or
> > cover letter explains that or mentions merging strategy.
> > 
> > Exactly this case is covered by your internal guideline, no? Please read it.
> > 
> > Best regards,
> > Krzysztof
> 
> Just to make sure I’m addressing the right concern — are you primarily
> worried about the introduction of the max-sd-hs-frequency property in the
> board DTS files, or about the removal of the sdhci-caps-mask
> from the common sm8550.dtsi?

This patch requires all previous patches to work, so it can not be
applied in parallel. It should be applied after the previous patches are
merged by MMC maintainers and then available in the Bjorn's tree. This
requires either skipping a release for this patch or using an immutable
tag for the MMC patches. All these deteails should be explained in the
cover letter.

-- 
With best wishes
Dmitry

Re: [PATCH V4 4/4] arm64: dts: qcom: sm8550: Remove SDR104/SDR50 broken capabilities

[Konrad Dybcio]

On 8/5/25 11:59 AM, Dmitry Baryshkov wrote:
> On Tue, Aug 05, 2025 at 02:49:29PM +0530, Sarthak Garg wrote:
>>
>>
>> On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote:
>>> On 01/08/2025 10:45, Sarthak Garg wrote:
>>>> The kernel now handles level shifter limitations affecting SD card
>>>> modes, making it unnecessary to explicitly disable SDR104 and SDR50
>>>> capabilities in the device tree.
>>>>
>>>> However, due to board-specific hardware constraints particularly related
>>>> to level shifter in this case the maximum frequency for SD High-Speed
>>>> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD
>>>> card in HS mode. This is achieved using the max-sd-hs-frequency property
>>>> in the board DTS.
>>>>
>>>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
>>>> ---
>>>>   arch/arm64/boot/dts/qcom/sm8550-hdk.dts                     | 1 +
>>>>   arch/arm64/boot/dts/qcom/sm8550-mtp.dts                     | 1 +
>>>>   arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 +
>>>>   arch/arm64/boot/dts/qcom/sm8550.dtsi                        | 3 ---
> 
> You missed several devices which use SM8550. Please fix that.

I would be in favor of making this addition in the SoC dtsi and removing/
altering it on a case by case basis, since as I explained in the threads
of previous revisions, the fix for the limitation is additional on-board
hardware

Konrad

Re: [PATCH V4 4/4] arm64: dts: qcom: sm8550: Remove SDR104/SDR50 broken capabilities

[Sarthak Garg]

On 8/5/2025 2:55 PM, Krzysztof Kozlowski wrote:
> On 05/08/2025 11:19, Sarthak Garg wrote:
>>
>>
>> On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote:
>>> On 01/08/2025 10:45, Sarthak Garg wrote:
>>>> The kernel now handles level shifter limitations affecting SD card
>>>> modes, making it unnecessary to explicitly disable SDR104 and SDR50
>>>> capabilities in the device tree.
>>>>
>>>> However, due to board-specific hardware constraints particularly related
>>>> to level shifter in this case the maximum frequency for SD High-Speed
>>>> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD
>>>> card in HS mode. This is achieved using the max-sd-hs-frequency property
>>>> in the board DTS.
>>>>
>>>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
>>>> ---
>>>>    arch/arm64/boot/dts/qcom/sm8550-hdk.dts                     | 1 +
>>>>    arch/arm64/boot/dts/qcom/sm8550-mtp.dts                     | 1 +
>>>>    arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 +
>>>>    arch/arm64/boot/dts/qcom/sm8550.dtsi                        | 3 ---
>>>>    4 files changed, 3 insertions(+), 3 deletions(-)
>>>>
>>>
>>> This will break MMC for all of the users and nothing in commit msg or
>>> cover letter explains that or mentions merging strategy.
>>>
>>> Exactly this case is covered by your internal guideline, no? Please read it.
>>>
>>> Best regards,
>>> Krzysztof
>>
>> Just to make sure I’m addressing the right concern — are you primarily
>> worried about the introduction of the max-sd-hs-frequency property in
>> the board DTS files, or about the removal of the sdhci-caps-mask
>> from the common sm8550.dtsi?
> 
> 
> Apply this patch and test MMC. Does it work? No. Was it working? Yes.
> 
> 
> Best regards,
> Krzysztof


You're absolutely right to raise the concern about potential breakage.
After conducting additional testing across multiple boards, I’ve 
confirmed that the removal of SDR104/SDR50 broken capabilities does 
indeed affect V1 SM8550 devices.
However, on V2 devices, all modes—including SDR104, SDR50, and HS—are 
fully functional and have been verified to work reliably.

Based on your feedback, I will revise the patch to retain the broken 
SDR104/SDR50 capabilities in the common sm8550.dtsi, ensuring no impact 
on current sm8550 devices already in use.

We will revisit the removal of broken capabilities dt property for 
upcoming targets after thorough validation and testing to ensure no 
regressions from the beginning.

Please let me know if this approach aligns with your expectations. I’ll 
prepare and send out a revised patch accordingly.

Best regards,
Sarthak

Re: [PATCH V4 4/4] arm64: dts: qcom: sm8550: Remove SDR104/SDR50 broken capabilities

[Sarthak Garg]

On 8/5/2025 3:29 PM, Dmitry Baryshkov wrote:
> On Tue, Aug 05, 2025 at 02:49:29PM +0530, Sarthak Garg wrote:
>>
>>
>> On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote:
>>> On 01/08/2025 10:45, Sarthak Garg wrote:
>>>> The kernel now handles level shifter limitations affecting SD card
>>>> modes, making it unnecessary to explicitly disable SDR104 and SDR50
>>>> capabilities in the device tree.
>>>>
>>>> However, due to board-specific hardware constraints particularly related
>>>> to level shifter in this case the maximum frequency for SD High-Speed
>>>> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD
>>>> card in HS mode. This is achieved using the max-sd-hs-frequency property
>>>> in the board DTS.
>>>>
>>>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
>>>> ---
>>>>    arch/arm64/boot/dts/qcom/sm8550-hdk.dts                     | 1 +
>>>>    arch/arm64/boot/dts/qcom/sm8550-mtp.dts                     | 1 +
>>>>    arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 +
>>>>    arch/arm64/boot/dts/qcom/sm8550.dtsi                        | 3 ---
> 
> You missed several devices which use SM8550. Please fix that.
> 
>>>>    4 files changed, 3 insertions(+), 3 deletions(-)
>>>>
>>>
>>> This will break MMC for all of the users and nothing in commit msg or
>>> cover letter explains that or mentions merging strategy.
>>>
>>> Exactly this case is covered by your internal guideline, no? Please read it.
>>>
>>> Best regards,
>>> Krzysztof
>>
>> Just to make sure I’m addressing the right concern — are you primarily
>> worried about the introduction of the max-sd-hs-frequency property in the
>> board DTS files, or about the removal of the sdhci-caps-mask
>> from the common sm8550.dtsi?
> 
> This patch requires all previous patches to work, so it can not be
> applied in parallel. It should be applied after the previous patches are
> merged by MMC maintainers and then available in the Bjorn's tree. This
> requires either skipping a release for this patch or using an immutable
> tag for the MMC patches. All these deteails should be explained in the
> cover letter.
> 

As mentioned in reply to Krzysztof's previous comment we are planning to 
drop the plan to modify broken capabilities for SM8550 in the current 
cycle. The removal of SDR104/SDR50 caps will be revisited for upcoming 
targets, where we can ensure proper validation and alignment with MMC 
patch dependencies.

Best regards,
Sarthak

Re: [PATCH V4 4/4] arm64: dts: qcom: sm8550: Remove SDR104/SDR50 broken capabilities

[Sarthak Garg]

On 8/5/2025 6:38 PM, Konrad Dybcio wrote:
> On 8/5/25 11:59 AM, Dmitry Baryshkov wrote:
>> On Tue, Aug 05, 2025 at 02:49:29PM +0530, Sarthak Garg wrote:
>>>
>>>
>>> On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote:
>>>> On 01/08/2025 10:45, Sarthak Garg wrote:
>>>>> The kernel now handles level shifter limitations affecting SD card
>>>>> modes, making it unnecessary to explicitly disable SDR104 and SDR50
>>>>> capabilities in the device tree.
>>>>>
>>>>> However, due to board-specific hardware constraints particularly related
>>>>> to level shifter in this case the maximum frequency for SD High-Speed
>>>>> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD
>>>>> card in HS mode. This is achieved using the max-sd-hs-frequency property
>>>>> in the board DTS.
>>>>>
>>>>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
>>>>> ---
>>>>>    arch/arm64/boot/dts/qcom/sm8550-hdk.dts                     | 1 +
>>>>>    arch/arm64/boot/dts/qcom/sm8550-mtp.dts                     | 1 +
>>>>>    arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 +
>>>>>    arch/arm64/boot/dts/qcom/sm8550.dtsi                        | 3 ---
>>
>> You missed several devices which use SM8550. Please fix that.
> 
> I would be in favor of making this addition in the SoC dtsi and removing/
> altering it on a case by case basis, since as I explained in the threads
> of previous revisions, the fix for the limitation is additional on-board
> hardware
> 
> Konrad

@Krzysztof Kozlowski please let me know your view on placement of the 
max-sd-hs-frequency
DT property in SOC dtsi as per above comment.

Best regards,
Sarthak

Re: [PATCH V4 4/4] arm64: dts: qcom: sm8550: Remove SDR104/SDR50 broken capabilities

[Konrad Dybcio]

On 8/13/25 1:08 PM, Sarthak Garg wrote:
> 
> 
> On 8/5/2025 2:55 PM, Krzysztof Kozlowski wrote:
>> On 05/08/2025 11:19, Sarthak Garg wrote:
>>>
>>>
>>> On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote:
>>>> On 01/08/2025 10:45, Sarthak Garg wrote:
>>>>> The kernel now handles level shifter limitations affecting SD card
>>>>> modes, making it unnecessary to explicitly disable SDR104 and SDR50
>>>>> capabilities in the device tree.
>>>>>
>>>>> However, due to board-specific hardware constraints particularly related
>>>>> to level shifter in this case the maximum frequency for SD High-Speed
>>>>> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD
>>>>> card in HS mode. This is achieved using the max-sd-hs-frequency property
>>>>> in the board DTS.
>>>>>
>>>>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
>>>>> ---
>>>>>    arch/arm64/boot/dts/qcom/sm8550-hdk.dts                     | 1 +
>>>>>    arch/arm64/boot/dts/qcom/sm8550-mtp.dts                     | 1 +
>>>>>    arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 +
>>>>>    arch/arm64/boot/dts/qcom/sm8550.dtsi                        | 3 ---
>>>>>    4 files changed, 3 insertions(+), 3 deletions(-)
>>>>>
>>>>
>>>> This will break MMC for all of the users and nothing in commit msg or
>>>> cover letter explains that or mentions merging strategy.
>>>>
>>>> Exactly this case is covered by your internal guideline, no? Please read it.
>>>>
>>>> Best regards,
>>>> Krzysztof
>>>
>>> Just to make sure I’m addressing the right concern — are you primarily
>>> worried about the introduction of the max-sd-hs-frequency property in
>>> the board DTS files, or about the removal of the sdhci-caps-mask
>>> from the common sm8550.dtsi?
>>
>>
>> Apply this patch and test MMC. Does it work? No. Was it working? Yes.
>>
>>
>> Best regards,
>> Krzysztof
> 
> 
> You're absolutely right to raise the concern about potential breakage.
> After conducting additional testing across multiple boards, I’ve confirmed that the removal of SDR104/SDR50 broken capabilities does indeed affect V1 SM8550 devices.

v1 is a prototype revision, please forget it exists, we most definitely
do not support it upstream

Konrad


> However, on V2 devices, all modes—including SDR104, SDR50, and HS—are fully functional and have been verified to work reliably.
> 
> Based on your feedback, I will revise the patch to retain the broken SDR104/SDR50 capabilities in the common sm8550.dtsi, ensuring no impact on current sm8550 devices already in use.
> 
> We will revisit the removal of broken capabilities dt property for upcoming targets after thorough validation and testing to ensure no regressions from the beginning.
> 
> Please let me know if this approach aligns with your expectations. I’ll prepare and send out a revised patch accordingly.
> 
> Best regards,
> Sarthak

Re: [PATCH V4 4/4] arm64: dts: qcom: sm8550: Remove SDR104/SDR50 broken capabilities

[Krzysztof Kozlowski]

On 13/08/2025 13:21, Konrad Dybcio wrote:
> On 8/13/25 1:08 PM, Sarthak Garg wrote:
>>
>>
>> On 8/5/2025 2:55 PM, Krzysztof Kozlowski wrote:
>>> On 05/08/2025 11:19, Sarthak Garg wrote:
>>>>
>>>>
>>>> On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote:
>>>>> On 01/08/2025 10:45, Sarthak Garg wrote:
>>>>>> The kernel now handles level shifter limitations affecting SD card
>>>>>> modes, making it unnecessary to explicitly disable SDR104 and SDR50
>>>>>> capabilities in the device tree.
>>>>>>
>>>>>> However, due to board-specific hardware constraints particularly related
>>>>>> to level shifter in this case the maximum frequency for SD High-Speed
>>>>>> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD
>>>>>> card in HS mode. This is achieved using the max-sd-hs-frequency property
>>>>>> in the board DTS.
>>>>>>
>>>>>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
>>>>>> ---
>>>>>>    arch/arm64/boot/dts/qcom/sm8550-hdk.dts                     | 1 +
>>>>>>    arch/arm64/boot/dts/qcom/sm8550-mtp.dts                     | 1 +
>>>>>>    arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 +
>>>>>>    arch/arm64/boot/dts/qcom/sm8550.dtsi                        | 3 ---
>>>>>>    4 files changed, 3 insertions(+), 3 deletions(-)
>>>>>>
>>>>>
>>>>> This will break MMC for all of the users and nothing in commit msg or
>>>>> cover letter explains that or mentions merging strategy.
>>>>>
>>>>> Exactly this case is covered by your internal guideline, no? Please read it.
>>>>>
>>>>> Best regards,
>>>>> Krzysztof
>>>>
>>>> Just to make sure I’m addressing the right concern — are you primarily
>>>> worried about the introduction of the max-sd-hs-frequency property in
>>>> the board DTS files, or about the removal of the sdhci-caps-mask
>>>> from the common sm8550.dtsi?
>>>
>>>
>>> Apply this patch and test MMC. Does it work? No. Was it working? Yes.
>>>
>>>
>>> Best regards,
>>> Krzysztof
>>
>>
>> You're absolutely right to raise the concern about potential breakage.
>> After conducting additional testing across multiple boards, I’ve confirmed that the removal of SDR104/SDR50 broken capabilities does indeed affect V1 SM8550 devices.
> 
> v1 is a prototype revision, please forget it exists, we most definitely
> do not support it upstream


You should double check. SM8450 (not v1!) needed it, so either it was
copied to SM8550 (v2!) by mistake or was also needed.


Best regards,
Krzysztof

Re: [PATCH V4 4/4] arm64: dts: qcom: sm8550: Remove SDR104/SDR50 broken capabilities

[Konrad Dybcio]

On 8/13/25 1:56 PM, Krzysztof Kozlowski wrote:
> On 13/08/2025 13:21, Konrad Dybcio wrote:
>> On 8/13/25 1:08 PM, Sarthak Garg wrote:
>>>
>>>
>>> On 8/5/2025 2:55 PM, Krzysztof Kozlowski wrote:
>>>> On 05/08/2025 11:19, Sarthak Garg wrote:
>>>>>
>>>>>
>>>>> On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote:
>>>>>> On 01/08/2025 10:45, Sarthak Garg wrote:
>>>>>>> The kernel now handles level shifter limitations affecting SD card
>>>>>>> modes, making it unnecessary to explicitly disable SDR104 and SDR50
>>>>>>> capabilities in the device tree.
>>>>>>>
>>>>>>> However, due to board-specific hardware constraints particularly related
>>>>>>> to level shifter in this case the maximum frequency for SD High-Speed
>>>>>>> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD
>>>>>>> card in HS mode. This is achieved using the max-sd-hs-frequency property
>>>>>>> in the board DTS.
>>>>>>>
>>>>>>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
>>>>>>> ---
>>>>>>>    arch/arm64/boot/dts/qcom/sm8550-hdk.dts                     | 1 +
>>>>>>>    arch/arm64/boot/dts/qcom/sm8550-mtp.dts                     | 1 +
>>>>>>>    arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 +
>>>>>>>    arch/arm64/boot/dts/qcom/sm8550.dtsi                        | 3 ---
>>>>>>>    4 files changed, 3 insertions(+), 3 deletions(-)
>>>>>>>
>>>>>>
>>>>>> This will break MMC for all of the users and nothing in commit msg or
>>>>>> cover letter explains that or mentions merging strategy.
>>>>>>
>>>>>> Exactly this case is covered by your internal guideline, no? Please read it.
>>>>>>
>>>>>> Best regards,
>>>>>> Krzysztof
>>>>>
>>>>> Just to make sure I’m addressing the right concern — are you primarily
>>>>> worried about the introduction of the max-sd-hs-frequency property in
>>>>> the board DTS files, or about the removal of the sdhci-caps-mask
>>>>> from the common sm8550.dtsi?
>>>>
>>>>
>>>> Apply this patch and test MMC. Does it work? No. Was it working? Yes.
>>>>
>>>>
>>>> Best regards,
>>>> Krzysztof
>>>
>>>
>>> You're absolutely right to raise the concern about potential breakage.
>>> After conducting additional testing across multiple boards, I’ve confirmed that the removal of SDR104/SDR50 broken capabilities does indeed affect V1 SM8550 devices.
>>
>> v1 is a prototype revision, please forget it exists, we most definitely
>> do not support it upstream
> 
> 
> You should double check. SM8450 (not v1!) needed it, so either it was
> copied to SM8550 (v2!) by mistake or was also needed.

I believe that the speed capabilities are indeed restricted on 8550-final
and that's why this patchset exists in the first place

Konrad

Re: [PATCH V4 4/4] arm64: dts: qcom: sm8550: Remove SDR104/SDR50 broken capabilities

[Sarthak Garg]

On 8/13/2025 5:37 PM, Konrad Dybcio wrote:
> On 8/13/25 1:56 PM, Krzysztof Kozlowski wrote:
>> On 13/08/2025 13:21, Konrad Dybcio wrote:
>>> On 8/13/25 1:08 PM, Sarthak Garg wrote:
>>>>
>>>>
>>>> On 8/5/2025 2:55 PM, Krzysztof Kozlowski wrote:
>>>>> On 05/08/2025 11:19, Sarthak Garg wrote:
>>>>>>
>>>>>>
>>>>>> On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote:
>>>>>>> On 01/08/2025 10:45, Sarthak Garg wrote:
>>>>>>>> The kernel now handles level shifter limitations affecting SD card
>>>>>>>> modes, making it unnecessary to explicitly disable SDR104 and SDR50
>>>>>>>> capabilities in the device tree.
>>>>>>>>
>>>>>>>> However, due to board-specific hardware constraints particularly related
>>>>>>>> to level shifter in this case the maximum frequency for SD High-Speed
>>>>>>>> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD
>>>>>>>> card in HS mode. This is achieved using the max-sd-hs-frequency property
>>>>>>>> in the board DTS.
>>>>>>>>
>>>>>>>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
>>>>>>>> ---
>>>>>>>>     arch/arm64/boot/dts/qcom/sm8550-hdk.dts                     | 1 +
>>>>>>>>     arch/arm64/boot/dts/qcom/sm8550-mtp.dts                     | 1 +
>>>>>>>>     arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 +
>>>>>>>>     arch/arm64/boot/dts/qcom/sm8550.dtsi                        | 3 ---
>>>>>>>>     4 files changed, 3 insertions(+), 3 deletions(-)
>>>>>>>>
>>>>>>>
>>>>>>> This will break MMC for all of the users and nothing in commit msg or
>>>>>>> cover letter explains that or mentions merging strategy.
>>>>>>>
>>>>>>> Exactly this case is covered by your internal guideline, no? Please read it.
>>>>>>>
>>>>>>> Best regards,
>>>>>>> Krzysztof
>>>>>>
>>>>>> Just to make sure I’m addressing the right concern — are you primarily
>>>>>> worried about the introduction of the max-sd-hs-frequency property in
>>>>>> the board DTS files, or about the removal of the sdhci-caps-mask
>>>>>> from the common sm8550.dtsi?
>>>>>
>>>>>
>>>>> Apply this patch and test MMC. Does it work? No. Was it working? Yes.
>>>>>
>>>>>
>>>>> Best regards,
>>>>> Krzysztof
>>>>
>>>>
>>>> You're absolutely right to raise the concern about potential breakage.
>>>> After conducting additional testing across multiple boards, I’ve confirmed that the removal of SDR104/SDR50 broken capabilities does indeed affect V1 SM8550 devices.
>>>
>>> v1 is a prototype revision, please forget it exists, we most definitely
>>> do not support it upstream
>>
>>
>> You should double check. SM8450 (not v1!) needed it, so either it was
>> copied to SM8550 (v2!) by mistake or was also needed.
> 
> I believe that the speed capabilities are indeed restricted on 8550-final
> and that's why this patchset exists in the first place
> 
> Konrad

Hi Krzysztof, Konrad,

Konrad is right — this patch series addresses limitations seen on
SM8550-final silicon.

SDR50 mode: The tuning support introduced in this series helps ensure
reliable operation.
SDR104 mode: limitations are resolved in SM8550 v2.

But still to avoid regressions, *I’ll like to retain sdhci-caps-mask in
sm8550.dtsi for now and revisit its removal for future targets after
thorough validation and testing from the beginning.*

Konrad suggested placing max-sd-hs-frequency in the SoC dtsi.
Krzysztof, could you please share your thoughts on this approach?

Best regards,
Sarthak Garg

Re: [PATCH V4 4/4] arm64: dts: qcom: sm8550: Remove SDR104/SDR50 broken capabilities

[Neil Armstrong]

On 14/08/2025 09:15, Sarthak Garg wrote:
> 
> 
> On 8/13/2025 5:37 PM, Konrad Dybcio wrote:
>> On 8/13/25 1:56 PM, Krzysztof Kozlowski wrote:
>>> On 13/08/2025 13:21, Konrad Dybcio wrote:
>>>> On 8/13/25 1:08 PM, Sarthak Garg wrote:
>>>>>
>>>>>
>>>>> On 8/5/2025 2:55 PM, Krzysztof Kozlowski wrote:
>>>>>> On 05/08/2025 11:19, Sarthak Garg wrote:
>>>>>>>
>>>>>>>
>>>>>>> On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote:
>>>>>>>> On 01/08/2025 10:45, Sarthak Garg wrote:
>>>>>>>>> The kernel now handles level shifter limitations affecting SD card
>>>>>>>>> modes, making it unnecessary to explicitly disable SDR104 and SDR50
>>>>>>>>> capabilities in the device tree.
>>>>>>>>>
>>>>>>>>> However, due to board-specific hardware constraints particularly related
>>>>>>>>> to level shifter in this case the maximum frequency for SD High-Speed
>>>>>>>>> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD
>>>>>>>>> card in HS mode. This is achieved using the max-sd-hs-frequency property
>>>>>>>>> in the board DTS.
>>>>>>>>>
>>>>>>>>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
>>>>>>>>> ---
>>>>>>>>>     arch/arm64/boot/dts/qcom/sm8550-hdk.dts                     | 1 +
>>>>>>>>>     arch/arm64/boot/dts/qcom/sm8550-mtp.dts                     | 1 +
>>>>>>>>>     arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 +
>>>>>>>>>     arch/arm64/boot/dts/qcom/sm8550.dtsi                        | 3 ---
>>>>>>>>>     4 files changed, 3 insertions(+), 3 deletions(-)
>>>>>>>>>
>>>>>>>>
>>>>>>>> This will break MMC for all of the users and nothing in commit msg or
>>>>>>>> cover letter explains that or mentions merging strategy.
>>>>>>>>
>>>>>>>> Exactly this case is covered by your internal guideline, no? Please read it.
>>>>>>>>
>>>>>>>> Best regards,
>>>>>>>> Krzysztof
>>>>>>>
>>>>>>> Just to make sure I’m addressing the right concern — are you primarily
>>>>>>> worried about the introduction of the max-sd-hs-frequency property in
>>>>>>> the board DTS files, or about the removal of the sdhci-caps-mask
>>>>>>> from the common sm8550.dtsi?
>>>>>>
>>>>>>
>>>>>> Apply this patch and test MMC. Does it work? No. Was it working? Yes.
>>>>>>
>>>>>>
>>>>>> Best regards,
>>>>>> Krzysztof
>>>>>
>>>>>
>>>>> You're absolutely right to raise the concern about potential breakage.
>>>>> After conducting additional testing across multiple boards, I’ve confirmed that the removal of SDR104/SDR50 broken capabilities does indeed affect V1 SM8550 devices.
>>>>
>>>> v1 is a prototype revision, please forget it exists, we most definitely
>>>> do not support it upstream
>>>
>>>
>>> You should double check. SM8450 (not v1!) needed it, so either it was
>>> copied to SM8550 (v2!) by mistake or was also needed.
>>
>> I believe that the speed capabilities are indeed restricted on 8550-final
>> and that's why this patchset exists in the first place
>>
>> Konrad
> 
> Hi Krzysztof, Konrad,
> 
> Konrad is right — this patch series addresses limitations seen on
> SM8550-final silicon.
> 
> SDR50 mode: The tuning support introduced in this series helps ensure
> reliable operation.
> SDR104 mode: limitations are resolved in SM8550 v2.

I guess the state is the same for SM8650, it also requires the max-sd-hs-frequency.

I guess all boards with a level-shifter on board would need such limitation,
including most of the HDK boards (SM8450 included)

Neil

> 
> But still to avoid regressions, *I’ll like to retain sdhci-caps-mask in
> sm8550.dtsi for now and revisit its removal for future targets after
> thorough validation and testing from the beginning.*
> 
> Konrad suggested placing max-sd-hs-frequency in the SoC dtsi.
> Krzysztof, could you please share your thoughts on this approach?
> 
> Best regards,
> Sarthak Garg

Re: [PATCH V4 4/4] arm64: dts: qcom: sm8550: Remove SDR104/SDR50 broken capabilities

[Sarthak Garg]

On 8/19/2025 7:00 PM, Neil Armstrong wrote:
> On 14/08/2025 09:15, Sarthak Garg wrote:
>>
>>
>> On 8/13/2025 5:37 PM, Konrad Dybcio wrote:
>>> On 8/13/25 1:56 PM, Krzysztof Kozlowski wrote:
>>>> On 13/08/2025 13:21, Konrad Dybcio wrote:
>>>>> On 8/13/25 1:08 PM, Sarthak Garg wrote:
>>>>>>
>>>>>>
>>>>>> On 8/5/2025 2:55 PM, Krzysztof Kozlowski wrote:
>>>>>>> On 05/08/2025 11:19, Sarthak Garg wrote:
>>>>>>>>
>>>>>>>>
>>>>>>>> On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote:
>>>>>>>>> On 01/08/2025 10:45, Sarthak Garg wrote:
>>>>>>>>>> The kernel now handles level shifter limitations affecting SD 
>>>>>>>>>> card
>>>>>>>>>> modes, making it unnecessary to explicitly disable SDR104 and 
>>>>>>>>>> SDR50
>>>>>>>>>> capabilities in the device tree.
>>>>>>>>>>
>>>>>>>>>> However, due to board-specific hardware constraints 
>>>>>>>>>> particularly related
>>>>>>>>>> to level shifter in this case the maximum frequency for SD 
>>>>>>>>>> High-Speed
>>>>>>>>>> (HS) mode must be limited to 37.5 MHz to ensure reliable 
>>>>>>>>>> operation of SD
>>>>>>>>>> card in HS mode. This is achieved using the 
>>>>>>>>>> max-sd-hs-frequency property
>>>>>>>>>> in the board DTS.
>>>>>>>>>>
>>>>>>>>>> Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
>>>>>>>>>> ---
>>>>>>>>>>     
>>>>>>>>>> arch/arm64/boot/dts/qcom/sm8550-hdk.dts                     | 1 +
>>>>>>>>>>     
>>>>>>>>>> arch/arm64/boot/dts/qcom/sm8550-mtp.dts                     | 1 +
>>>>>>>>>>     
>>>>>>>>>> arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 +
>>>>>>>>>>     
>>>>>>>>>> arch/arm64/boot/dts/qcom/sm8550.dtsi                        | 
>>>>>>>>>> 3 ---
>>>>>>>>>>     4 files changed, 3 insertions(+), 3 deletions(-)
>>>>>>>>>>
>>>>>>>>>
>>>>>>>>> This will break MMC for all of the users and nothing in commit 
>>>>>>>>> msg or
>>>>>>>>> cover letter explains that or mentions merging strategy.
>>>>>>>>>
>>>>>>>>> Exactly this case is covered by your internal guideline, no? 
>>>>>>>>> Please read it.
>>>>>>>>>
>>>>>>>>> Best regards,
>>>>>>>>> Krzysztof
>>>>>>>>
>>>>>>>> Just to make sure I’m addressing the right concern — are you 
>>>>>>>> primarily
>>>>>>>> worried about the introduction of the max-sd-hs-frequency 
>>>>>>>> property in
>>>>>>>> the board DTS files, or about the removal of the sdhci-caps-mask
>>>>>>>> from the common sm8550.dtsi?
>>>>>>>
>>>>>>>
>>>>>>> Apply this patch and test MMC. Does it work? No. Was it working? 
>>>>>>> Yes.
>>>>>>>
>>>>>>>
>>>>>>> Best regards,
>>>>>>> Krzysztof
>>>>>>
>>>>>>
>>>>>> You're absolutely right to raise the concern about potential 
>>>>>> breakage.
>>>>>> After conducting additional testing across multiple boards, I’ve 
>>>>>> confirmed that the removal of SDR104/SDR50 broken capabilities 
>>>>>> does indeed affect V1 SM8550 devices.
>>>>>
>>>>> v1 is a prototype revision, please forget it exists, we most 
>>>>> definitely
>>>>> do not support it upstream
>>>>
>>>>
>>>> You should double check. SM8450 (not v1!) needed it, so either it was
>>>> copied to SM8550 (v2!) by mistake or was also needed.
>>>
>>> I believe that the speed capabilities are indeed restricted on 
>>> 8550-final
>>> and that's why this patchset exists in the first place
>>>
>>> Konrad
>>
>> Hi Krzysztof, Konrad,
>>
>> Konrad is right — this patch series addresses limitations seen on
>> SM8550-final silicon.
>>
>> SDR50 mode: The tuning support introduced in this series helps ensure
>> reliable operation.
>> SDR104 mode: limitations are resolved in SM8550 v2.
> 
> I guess the state is the same for SM8650, it also requires the 
> max-sd-hs-frequency.
> 
> I guess all boards with a level-shifter on board would need such 
> limitation,
> including most of the HDK boards (SM8450 included)
> 
> Neil
>

Yes, that makes sense Neil — all boards with a level-shifter on board
would likely need this limitation, including SM8450, SM8550, and SM8650.

>>
>> But still to avoid regressions, *I’ll like to retain sdhci-caps-mask in
>> sm8550.dtsi for now and revisit its removal for future targets after
>> thorough validation and testing from the beginning.*
>>
>> Konrad suggested placing max-sd-hs-frequency in the SoC dtsi.
>> Krzysztof, could you please share your thoughts on this approach?
>>
>> Best regards,
>> Sarthak Garg
>