* [PATCH v6 0/2] Add display support for QCS615 platform
@ 2025-08-18 4:39 Fange Zhang
2025-08-18 4:39 ` [PATCH v6 1/2] arm64: dts: qcom: Add display support for QCS615 Fange Zhang
2025-08-18 4:39 ` [PATCH v6 2/2] arm64: dts: qcom: Add display support for QCS615 RIDE board Fange Zhang
0 siblings, 2 replies; 6+ messages in thread
From: Fange Zhang @ 2025-08-18 4:39 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Li Liu, Fange Zhang,
dmitry.baryshkov, tingwei.zhang, xiangxu.yin, Dmitry Baryshkov
1.Add MDSS & DPU support for QCS615
2.Add DSI support for QCS615
QCS615 platform supports DisplayPort, and this feature will be added in a future patch
Dropped patches 1–7, which have already been merged upstream
The dependency has already been reviewed
- dispcc dts
https://lore.kernel.org/all/20250814-qcs615-mm-cpu-dt-v6-v6-0-a06f69928ab5@oss.qualcomm.com/
Signed-off-by: Li Liu <quic_lliu6@quicinc.com>
Signed-off-by: Fange Zhang <fange.zhang@oss.qualcomm.com>
---
Changes in v6:
- Add qcom,dsi-phy-28nm.h header and update dispcc DSI clocks [Konrad]
- Change mdss_dsi0_phy reg size from 0x188 to 0x124 [Konrad]
- Remove assigned-clocks and assigned-clocks-rates from display-controller [Konrad]
- Remove gpio header [Krzysztof]
- Replace legacy `interrupt-parent` + `interrupts` with `interrupts-extended` for display-controller [Konrad]
- Update mdp_opp_table clk [Konrad]
- Link to v5: https://lore.kernel.org/r/20250718-add-display-support-for-qcs615-platform-v5-0-8579788ea195@oss.qualcomm.com
Changes in v5:
- Drop patches 1–7, which have already been merged upstream
- Rename dp-connector to dp-dsi0-connector
- Rename dp_connector_out to dp_dsi0_connector_in
- Rename label from DP to DSI0 for dp-dsi0-connector
- Rename anx_7625 to bridge
- Rename anx_7625_in to dsi2dp_bridge_in
- Rename anx_7625_out to dsi2dp_bridge_out
- Rename ioexp to io_expander
- Replace legacy `interrupt-parent` + `interrupts` with `interrupts-extended` for bridge [Dmitry]
- Replace legacy `interrupt-parent` + `interrupts` with `interrupts-extended` for io_expander [Dmitry]
- Update interrupt type for bridge [Dmitry]
- Update interrupt type for io_expander [Dmitry]
- Link to v4: https://lore.kernel.org/all/20241210-add-display-support-for-qcs615-platform-v4-0-2d875a67602d@quicinc.com
Changes in v4:
- Add dp-connector node for anx_7625_out [Dmitry]
- Add missing qcom,sm6150-dsi-ctrl for dsi-controller-main.yaml [Krzysztof]
- Change VIG_SDM845_MASK to VIG_SDM845_MASK_SDMA for sm6150_sspp [Abhinav]
- Change DMA_SDM845_MASK to DMA_SDM845_MASK_SDMA for sm6150_sspp [Abhinav]
- Remove redundant annotation from sdm845_dsi_cfg [Dmitry]
- Remove redundant blocks from sm6150_intf [Dmitry]
- Update mdp_opp_table opp clk to correct value
- Link to v3: https://lore.kernel.org/r/20241122-add-display-support-for-qcs615-platform-v3-0-35252e3a51fe@quicinc.com
Changes in v3:
- Add reg_bus_bw for sm6150_data [Dmitry]
- Remove patch for SX150X defconfig [Dmitry]
- Remove dsi0_hpd_cfg_pins from ioexp [Dmitry]
- Remove dsi0_cdet_cfg_pins from ioexpa [Dmitry]
- Remove tlmm node for ioexp_intr_active and ioAexp_reset_active [Dmitry]
- Remove qcs615_dsi_regulators and reuse sdm845_dsi_cfg [Dmitry, Konrad]
- Rename qcs615/QCS615 to sm6150/SM6150 for whole patch [Dmitry]
- Rename qcom,dsi-phy-14nm-615 to qcom,sm6150-dsi-phy-14nm [Dmitry]
- Rename qcom,qcs615-dsi-ctrl to qcom,sm6150-dsi-ctrl [Dmitry]
- Rename qcom,qcs615-dpu to qcom,sm6150-dpu [Dmitry]
- Rename qcom,qcs615-mdss to qcom,sm6150-mdss [Dmitry]
- Split drm dsi patch to dsi and dsi phy [Dmitry]
- Update yaml clocks node with ephemeral nodes and remove unsed include [Dmitry, Rob]
- Link to v2: https://lore.kernel.org/r/20241113-add-display-support-for-qcs615-platform-v2-0-2873eb6fb869@quicinc.com
Changes in v2:
- Add QCS615 DP controller comment in commit message [Dmitry]
- Add comments for dsi_dp_hpd_cfg_pins and dsi_dp_cdet_cfg_pins [Dmitry]
- Add missing port@1 for connector for anx7625 [Dmitry]
- Change 0 to QCOM_ICC_TAG_ALWAYS for mdss interconnects [Dmitry]
- Change 0 to GPIO_ACTIVE_HIGH for GPIO flags [Dmitry]
- Move anx_7625 to same node [Dmitry]
- Move status to last in mdss_dsi0 [Dmitry]
- Rename dsi0_hpd_cfg_pins to dsi_dp_hpd_cfg_pins in ioexp [Dmitry]
- Rename dsi0_cdet_cfg_pins to dsi_dp_cdet_cfg_pins in ioexp [Dmitry]
- Rename anx_7625_1 to dsi_anx_7625 in ioexp [Dmitry]
- Remove absent block in qcs615_lm [Dmitry]
- Remove merge_3d value in qcs615_pp [Dmitry]
- Remove redundant annotation in qcs615_sspp [Dmitry]
- Remove unsupported dsi clk from dsi0_opp_table [Dmitry]
- Remove dp_hpd_cfg_pins node from ioexp [Dmitry]
- Splite drm driver patches to mdss, dpu and dsi [Dmitry]
- Link to v1: https://lore.kernel.org/r/20241014-add_display_support_for_qcs615-v1-0-4efa191dbdd4@quicinc.com
Signed-off-by: Fange Zhang <fange.zhang@oss.qualcomm.com>
---
Li Liu (2):
arm64: dts: qcom: Add display support for QCS615
arm64: dts: qcom: Add display support for QCS615 RIDE board
arch/arm64/boot/dts/qcom/qcs615-ride.dts | 90 +++++++++++++++
arch/arm64/boot/dts/qcom/sm6150.dtsi | 182 ++++++++++++++++++++++++++++++-
2 files changed, 270 insertions(+), 2 deletions(-)
---
base-commit: 7ef84751db83e45a12d69cba309f2af0ac9150c3
change-id: 20250818-add-display-support-for-qcs615-platform-5b02a42c555a
Best regards,
--
Fange Zhang <fange.zhang@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v6 1/2] arm64: dts: qcom: Add display support for QCS615
2025-08-18 4:39 [PATCH v6 0/2] Add display support for QCS615 platform Fange Zhang
@ 2025-08-18 4:39 ` Fange Zhang
2025-08-18 4:39 ` [PATCH v6 2/2] arm64: dts: qcom: Add display support for QCS615 RIDE board Fange Zhang
1 sibling, 0 replies; 6+ messages in thread
From: Fange Zhang @ 2025-08-18 4:39 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Li Liu, Fange Zhang,
dmitry.baryshkov, tingwei.zhang, xiangxu.yin, Dmitry Baryshkov
From: Li Liu <quic_lliu6@quicinc.com>
Add display MDSS and DSI configuration for QCS615 platform.
QCS615 has a DP port, and DP support will be added in a later patch.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Li Liu <quic_lliu6@quicinc.com>
Signed-off-by: Fange Zhang <fange.zhang@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sm6150.dtsi | 182 ++++++++++++++++++++++++++++++++++-
1 file changed, 180 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm6150.dtsi b/arch/arm64/boot/dts/qcom/sm6150.dtsi
index 50cd9275e4028eb8f689eae215bf47a9e06d4cfb..8c60875b5953f031fac8557d047d1adf3883db29 100644
--- a/arch/arm64/boot/dts/qcom/sm6150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6150.dtsi
@@ -3,6 +3,7 @@
* Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
*/
+#include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
#include <dt-bindings/clock/qcom,qcs615-camcc.h>
#include <dt-bindings/clock/qcom,qcs615-dispcc.h>
#include <dt-bindings/clock/qcom,qcs615-gcc.h>
@@ -3576,14 +3577,191 @@ camcc: clock-controller@ad00000 {
#power-domain-cells = <1>;
};
+ mdss: display-subsystem@ae00000 {
+ compatible = "qcom,sm6150-mdss";
+ reg = <0x0 0x0ae00000 0x0 0x1000>;
+ reg-names = "mdss";
+
+ interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
+ <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+ &config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY>;
+ interconnect-names = "mdp0-mem",
+ "cpu-cfg";
+
+ power-domains = <&dispcc MDSS_CORE_GDSC>;
+
+ clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>;
+
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ iommus = <&apps_smmu 0x800 0x0>;
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ status = "disabled";
+
+ mdss_mdp: display-controller@ae01000 {
+ compatible = "qcom,sm6150-dpu";
+ reg = <0x0 0x0ae01000 0x0 0x8f000>,
+ <0x0 0x0aeb0000 0x0 0x2008>;
+ reg-names = "mdp",
+ "vbif";
+
+ clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_CLK>,
+ <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
+ clock-names = "iface",
+ "bus",
+ "core",
+ "vsync";
+
+ operating-points-v2 = <&mdp_opp_table>;
+ power-domains = <&rpmhpd RPMHPD_CX>;
+
+ interrupts-extended = <&mdss 0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ dpu_intf0_out: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ dpu_intf1_out: endpoint {
+ remote-endpoint = <&mdss_dsi0_in>;
+ };
+ };
+ };
+
+ mdp_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-192000000 {
+ opp-hz = /bits/ 64 <192000000>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-256000000 {
+ opp-hz = /bits/ 64 <256000000>;
+ required-opps = <&rpmhpd_opp_svs>;
+ };
+
+ opp-307200000 {
+ opp-hz = /bits/ 64 <307200000>;
+ required-opps = <&rpmhpd_opp_nom>;
+ };
+ };
+ };
+
+ mdss_dsi0: dsi@ae94000 {
+ compatible = "qcom,sm6150-dsi-ctrl", "qcom,mdss-dsi-ctrl";
+ reg = <0x0 0x0ae94000 0x0 0x400>;
+ reg-names = "dsi_ctrl";
+
+ interrupts-extended = <&mdss 4>;
+
+ clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
+ <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
+ <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
+ <&dispcc DISP_CC_MDSS_ESC0_CLK>,
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&gcc GCC_DISP_HF_AXI_CLK>;
+ clock-names = "byte",
+ "byte_intf",
+ "pixel",
+ "core",
+ "iface",
+ "bus";
+
+ assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,
+ <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
+ assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+ <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
+
+ operating-points-v2 = <&dsi0_opp_table>;
+ power-domains = <&rpmhpd RPMHPD_CX>;
+
+ phys = <&mdss_dsi0_phy>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+
+ dsi0_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-164000000 {
+ opp-hz = /bits/ 64 <164000000>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ };
+ };
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ mdss_dsi0_in: endpoint {
+ remote-endpoint = <&dpu_intf1_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mdss_dsi0_out: endpoint {
+ };
+ };
+ };
+ };
+
+ mdss_dsi0_phy: phy@ae94400 {
+ compatible = "qcom,sm6150-dsi-phy-14nm";
+ reg = <0x0 0x0ae94400 0x0 0x100>,
+ <0x0 0x0ae94500 0x0 0x300>,
+ <0x0 0x0ae94800 0x0 0x124>;
+ reg-names = "dsi_phy",
+ "dsi_phy_lane",
+ "dsi_pll";
+
+ #clock-cells = <1>;
+ #phy-cells = <0>;
+
+ clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "iface",
+ "ref";
+
+ status = "disabled";
+ };
+ };
+
dispcc: clock-controller@af00000 {
compatible = "qcom,qcs615-dispcc";
reg = <0 0x0af00000 0 0x20000>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>,
- <0>,
- <0>,
+ <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+ <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>,
<0>,
<0>,
<0>;
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v6 2/2] arm64: dts: qcom: Add display support for QCS615 RIDE board
2025-08-18 4:39 [PATCH v6 0/2] Add display support for QCS615 platform Fange Zhang
2025-08-18 4:39 ` [PATCH v6 1/2] arm64: dts: qcom: Add display support for QCS615 Fange Zhang
@ 2025-08-18 4:39 ` Fange Zhang
2025-08-24 3:15 ` Bjorn Andersson
1 sibling, 1 reply; 6+ messages in thread
From: Fange Zhang @ 2025-08-18 4:39 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Li Liu, Fange Zhang,
dmitry.baryshkov, tingwei.zhang, xiangxu.yin
From: Li Liu <quic_lliu6@quicinc.com>
Add display MDSS and DSI configuration for QCS615 RIDE board.
QCS615 has a DP port, and DP support will be added in a later patch.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Li Liu <quic_lliu6@quicinc.com>
Signed-off-by: Fange Zhang <fange.zhang@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/qcs615-ride.dts | 90 ++++++++++++++++++++++++++++++++
1 file changed, 90 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
index 59582d3dc4c49828ef4a0d22a1cbaba715c7ce8c..39c757b66f47579d9bc7cc5c4d703f7af4434df4 100644
--- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
+++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
@@ -39,6 +39,18 @@ xo_board_clk: xo-board-clk {
};
};
+ dp-dsi0-connector {
+ compatible = "dp-connector";
+ label = "DSI0";
+ type = "mini";
+
+ port {
+ dp_dsi0_connector_in: endpoint {
+ remote-endpoint = <&dsi2dp_bridge_out>;
+ };
+ };
+ };
+
vreg_conn_1p8: regulator-conn-1p8 {
compatible = "regulator-fixed";
regulator-name = "vreg_conn_1p8";
@@ -294,6 +306,84 @@ &gcc {
<&sleep_clk>;
};
+&i2c2 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ io_expander: gpio@3e {
+ compatible = "semtech,sx1509q";
+ reg = <0x3e>;
+ interrupts-extended = <&tlmm 58 IRQ_TYPE_EDGE_FALLING>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ semtech,probe-reset;
+ };
+
+ i2c-mux@77 {
+ compatible = "nxp,pca9542";
+ reg = <0x77>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ bridge@58 {
+ compatible = "analogix,anx7625";
+ reg = <0x58>;
+ interrupts-extended = <&io_expander 0 IRQ_TYPE_EDGE_FALLING>;
+ enable-gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
+ wakeup-source;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ dsi2dp_bridge_in: endpoint {
+ remote-endpoint = <&mdss_dsi0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ dsi2dp_bridge_out: endpoint {
+ remote-endpoint = <&dp_dsi0_connector_in>;
+ };
+ };
+ };
+ };
+ };
+ };
+};
+
+&mdss {
+ status = "okay";
+};
+
+&mdss_dsi0 {
+ vdda-supply = <&vreg_l11a>;
+ status = "okay";
+};
+
+&mdss_dsi0_out {
+ remote-endpoint = <&dsi2dp_bridge_in>;
+ data-lanes = <0 1 2 3>;
+};
+
+&mdss_dsi0_phy {
+ vdds-supply = <&vreg_l5a>;
+ status = "okay";
+};
+
&pcie {
perst-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>;
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v6 2/2] arm64: dts: qcom: Add display support for QCS615 RIDE board
2025-08-18 4:39 ` [PATCH v6 2/2] arm64: dts: qcom: Add display support for QCS615 RIDE board Fange Zhang
@ 2025-08-24 3:15 ` Bjorn Andersson
2025-08-26 8:08 ` Fange Zhang
0 siblings, 1 reply; 6+ messages in thread
From: Bjorn Andersson @ 2025-08-24 3:15 UTC (permalink / raw)
To: Fange Zhang
Cc: Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-msm, devicetree, linux-kernel, Li Liu, dmitry.baryshkov,
tingwei.zhang, xiangxu.yin
On Mon, Aug 18, 2025 at 12:39:21PM +0800, Fange Zhang wrote:
> From: Li Liu <quic_lliu6@quicinc.com>
>
> Add display MDSS and DSI configuration for QCS615 RIDE board.
> QCS615 has a DP port, and DP support will be added in a later patch.
>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> Signed-off-by: Li Liu <quic_lliu6@quicinc.com>
> Signed-off-by: Fange Zhang <fange.zhang@oss.qualcomm.com>
Running dtb checker after applying your patch gives me the following:
> $ make qcom/qcs615-ride.dtb CHECK_DTBS=1
> UPD include/config/kernel.release
> HOSTCC scripts/basic/fixdep
> SCHEMA Documentation/devicetree/bindings/processed-schema.json
> Documentation/devicetree/bindings/net/snps,dwmac.yaml: mac-mode: missing type definition
> Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml: ti,rx-gain-reduction-db: missing type definition
> Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml: fsl,phy-pcs-tx-deemph-3p5db-attenuation-db: missing type definition
> DTC [C] arch/arm64/boot/dts/qcom/qcs615-ride.dtb
> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: clock-controller@100000: 'clock-names' is a required property
> from schema $id: http://devicetree.org/schemas/clock/qcom,qcs615-gcc.yaml#
Taniya is looking at this one.
> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: gpio@3e: $nodename:0: 'gpio@3e' does not match '^(pinctrl|pinmux)(@[0-9a-f]+)?$'
> from schema $id: http://devicetree.org/schemas/pinctrl/semtech,sx1501q.yaml#
This is from your patch.
> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'vdd10-supply' is a required property
> from schema $id: http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#
This is from your patch.
> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'vdd18-supply' is a required property
> from schema $id: http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#
This is from your patch.
> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'vdd33-supply' is a required property
> from schema $id: http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#
This is from your patch.
> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'wakeup-source' does not match any of the regexes: 'pinctrl-[0-9]+'
> from schema $id: http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#
This is from your patch.
> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: phy@ae94400: Unevaluated properties are not allowed ('vdds-supply' was unexpected)
> from schema $id: http://devicetree.org/schemas/display/msm/dsi-phy-14nm.yaml#
This is from your patch.
Am I missing something? Is there any reason why these 6 new errors
should be added?
Regards,
Bjorn
> ---
> arch/arm64/boot/dts/qcom/qcs615-ride.dts | 90 ++++++++++++++++++++++++++++++++
> 1 file changed, 90 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> index 59582d3dc4c49828ef4a0d22a1cbaba715c7ce8c..39c757b66f47579d9bc7cc5c4d703f7af4434df4 100644
> --- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> +++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> @@ -39,6 +39,18 @@ xo_board_clk: xo-board-clk {
> };
> };
>
> + dp-dsi0-connector {
> + compatible = "dp-connector";
> + label = "DSI0";
> + type = "mini";
> +
> + port {
> + dp_dsi0_connector_in: endpoint {
> + remote-endpoint = <&dsi2dp_bridge_out>;
> + };
> + };
> + };
> +
> vreg_conn_1p8: regulator-conn-1p8 {
> compatible = "regulator-fixed";
> regulator-name = "vreg_conn_1p8";
> @@ -294,6 +306,84 @@ &gcc {
> <&sleep_clk>;
> };
>
> +&i2c2 {
> + clock-frequency = <400000>;
> + status = "okay";
> +
> + io_expander: gpio@3e {
> + compatible = "semtech,sx1509q";
> + reg = <0x3e>;
> + interrupts-extended = <&tlmm 58 IRQ_TYPE_EDGE_FALLING>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + semtech,probe-reset;
> + };
> +
> + i2c-mux@77 {
> + compatible = "nxp,pca9542";
> + reg = <0x77>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + i2c@0 {
> + reg = <0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + bridge@58 {
> + compatible = "analogix,anx7625";
> + reg = <0x58>;
> + interrupts-extended = <&io_expander 0 IRQ_TYPE_EDGE_FALLING>;
> + enable-gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
> + reset-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
> + wakeup-source;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + dsi2dp_bridge_in: endpoint {
> + remote-endpoint = <&mdss_dsi0_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + dsi2dp_bridge_out: endpoint {
> + remote-endpoint = <&dp_dsi0_connector_in>;
> + };
> + };
> + };
> + };
> + };
> + };
> +};
> +
> +&mdss {
> + status = "okay";
> +};
> +
> +&mdss_dsi0 {
> + vdda-supply = <&vreg_l11a>;
> + status = "okay";
> +};
> +
> +&mdss_dsi0_out {
> + remote-endpoint = <&dsi2dp_bridge_in>;
> + data-lanes = <0 1 2 3>;
> +};
> +
> +&mdss_dsi0_phy {
> + vdds-supply = <&vreg_l5a>;
> + status = "okay";
> +};
> +
> &pcie {
> perst-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
> wake-gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>;
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v6 2/2] arm64: dts: qcom: Add display support for QCS615 RIDE board
2025-08-24 3:15 ` Bjorn Andersson
@ 2025-08-26 8:08 ` Fange Zhang
2025-08-26 12:21 ` Fange Zhang
0 siblings, 1 reply; 6+ messages in thread
From: Fange Zhang @ 2025-08-26 8:08 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-msm, devicetree, linux-kernel, Li Liu, dmitry.baryshkov,
tingwei.zhang, xiangxu.yin
On 8/24/2025 11:15 AM, Bjorn Andersson wrote:
> On Mon, Aug 18, 2025 at 12:39:21PM +0800, Fange Zhang wrote:
>> From: Li Liu <quic_lliu6@quicinc.com>
>>
>> Add display MDSS and DSI configuration for QCS615 RIDE board.
>> QCS615 has a DP port, and DP support will be added in a later patch.
>>
>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
>> Signed-off-by: Li Liu <quic_lliu6@quicinc.com>
>> Signed-off-by: Fange Zhang <fange.zhang@oss.qualcomm.com>
>
> Running dtb checker after applying your patch gives me the following:
>> $ make qcom/qcs615-ride.dtb CHECK_DTBS=1
>> UPD include/config/kernel.release
>> HOSTCC scripts/basic/fixdep
>> SCHEMA Documentation/devicetree/bindings/processed-schema.json
>> Documentation/devicetree/bindings/net/snps,dwmac.yaml: mac-mode: missing type definition
>> Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml: ti,rx-gain-reduction-db: missing type definition
>> Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml: fsl,phy-pcs-tx-deemph-3p5db-attenuation-db: missing type definition
>> DTC [C] arch/arm64/boot/dts/qcom/qcs615-ride.dtb
>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: clock-controller@100000: 'clock-names' is a required property
>> from schema $id: http://devicetree.org/schemas/clock/qcom,qcs615-gcc.yaml#
>
> Taniya is looking at this one.
Got it. Since the patch appears to be accepted, should I still wait for
mm clk version 7?
https://patchwork.kernel.org/project/linux-arm-msm/patch/20250814-qcs615-mm-cpu-dt-v6-v6-1-a06f69928ab5@oss.qualcomm.com/
>
>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: gpio@3e: $nodename:0: 'gpio@3e' does not match '^(pinctrl|pinmux)(@[0-9a-f]+)?$'
>> from schema $id: http://devicetree.org/schemas/pinctrl/semtech,sx1501q.yaml#
>
> This is from your patch.
got it, will change "gpio@3e" to "pinctrl@3e"
>
>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'vdd10-supply' is a required property
>> from schema $id: http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#
>
> This is from your patch.
got it, will add this part like
https://lore.kernel.org/all/20250604071851.1438612-3-quic_amakhija@quicinc.com/
@@ -51,6 +51,64 @@ dp_dsi0_connector_in: endpoint {
};
};
+ vreg_12p0: vreg-12p0-regulator {=
...
@@ -338,7 +396,9 @@ bridge@58 {
interrupts-extended = <&io_expander 0
IRQ_TYPE_EDGE_FALLING>;
enable-gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
reset-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
- wakeup-source;
+ vdd10-supply = <&vreg_1p0>;
+ vdd18-supply = <&vreg_1p8>;
+ vdd33-supply = <&vreg_3p0>;
>
>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'vdd18-supply' is a required property
>> from schema $id: http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#
>
> This is from your patch.
same as above
>
>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'vdd33-supply' is a required property
>> from schema $id: http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#
>
> This is from your patch.
same as above
>
>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'wakeup-source' does not match any of the regexes: 'pinctrl-[0-9]+'
>> from schema $id: http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#
>
> This is from your patch.
will remove it
>
>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: phy@ae94400: Unevaluated properties are not allowed ('vdds-supply' was unexpected)
>> from schema $id: http://devicetree.org/schemas/display/msm/dsi-phy-14nm.yaml#
>
> This is from your patch.
will change "vdds-supply" to "vcca-supply"
>
>
> Am I missing something? Is there any reason why these 6 new errors
> should be added?
Sorry, I missed those parts earlier. I've re-tested and confirmed the
changes. The patch can pass after refine.
Would it be appropriate to send v7 now, or should I wait until the mm
clk v7 is ready?
>
> Regards,
> Bjorn
>
>> ---
>> arch/arm64/boot/dts/qcom/qcs615-ride.dts | 90 ++++++++++++++++++++++++++++++++
>> 1 file changed, 90 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
>> index 59582d3dc4c49828ef4a0d22a1cbaba715c7ce8c..39c757b66f47579d9bc7cc5c4d703f7af4434df4 100644
>> --- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
>> +++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
>> @@ -39,6 +39,18 @@ xo_board_clk: xo-board-clk {
>> };
>> };
>>
>> + dp-dsi0-connector {
>> + compatible = "dp-connector";
>> + label = "DSI0";
>> + type = "mini";
>> +
>> + port {
>> + dp_dsi0_connector_in: endpoint {
>> + remote-endpoint = <&dsi2dp_bridge_out>;
>> + };
>> + };
>> + };
>> +
>> vreg_conn_1p8: regulator-conn-1p8 {
>> compatible = "regulator-fixed";
>> regulator-name = "vreg_conn_1p8";
>> @@ -294,6 +306,84 @@ &gcc {
>> <&sleep_clk>;
>> };
>>
>> +&i2c2 {
>> + clock-frequency = <400000>;
>> + status = "okay";
>> +
>> + io_expander: gpio@3e {
>> + compatible = "semtech,sx1509q";
>> + reg = <0x3e>;
>> + interrupts-extended = <&tlmm 58 IRQ_TYPE_EDGE_FALLING>;
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + semtech,probe-reset;
>> + };
>> +
>> + i2c-mux@77 {
>> + compatible = "nxp,pca9542";
>> + reg = <0x77>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + i2c@0 {
>> + reg = <0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + bridge@58 {
>> + compatible = "analogix,anx7625";
>> + reg = <0x58>;
>> + interrupts-extended = <&io_expander 0 IRQ_TYPE_EDGE_FALLING>;
>> + enable-gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
>> + reset-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
>> + wakeup-source;
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> + reg = <0>;
>> +
>> + dsi2dp_bridge_in: endpoint {
>> + remote-endpoint = <&mdss_dsi0_out>;
>> + };
>> + };
>> +
>> + port@1 {
>> + reg = <1>;
>> +
>> + dsi2dp_bridge_out: endpoint {
>> + remote-endpoint = <&dp_dsi0_connector_in>;
>> + };
>> + };
>> + };
>> + };
>> + };
>> + };
>> +};
>> +
>> +&mdss {
>> + status = "okay";
>> +};
>> +
>> +&mdss_dsi0 {
>> + vdda-supply = <&vreg_l11a>;
>> + status = "okay";
>> +};
>> +
>> +&mdss_dsi0_out {
>> + remote-endpoint = <&dsi2dp_bridge_in>;
>> + data-lanes = <0 1 2 3>;
>> +};
>> +
>> +&mdss_dsi0_phy {
>> + vdds-supply = <&vreg_l5a>;
>> + status = "okay";
>> +};
>> +
>> &pcie {
>> perst-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
>> wake-gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>;
>>
>> --
>> 2.34.1
>>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v6 2/2] arm64: dts: qcom: Add display support for QCS615 RIDE board
2025-08-26 8:08 ` Fange Zhang
@ 2025-08-26 12:21 ` Fange Zhang
0 siblings, 0 replies; 6+ messages in thread
From: Fange Zhang @ 2025-08-26 12:21 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-msm, devicetree, linux-kernel, Li Liu, dmitry.baryshkov,
tingwei.zhang, xiangxu.yin
On 8/26/2025 4:08 PM, Fange Zhang wrote:
>
>
> On 8/24/2025 11:15 AM, Bjorn Andersson wrote:
>> On Mon, Aug 18, 2025 at 12:39:21PM +0800, Fange Zhang wrote:
>>> From: Li Liu <quic_lliu6@quicinc.com>
>>>
>>> Add display MDSS and DSI configuration for QCS615 RIDE board.
>>> QCS615 has a DP port, and DP support will be added in a later patch.
>>>
>>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
>>> Signed-off-by: Li Liu <quic_lliu6@quicinc.com>
>>> Signed-off-by: Fange Zhang <fange.zhang@oss.qualcomm.com>
>>
>> Running dtb checker after applying your patch gives me the following:
>>> $ make qcom/qcs615-ride.dtb CHECK_DTBS=1
>>> UPD include/config/kernel.release
>>> HOSTCC scripts/basic/fixdep
>>> SCHEMA Documentation/devicetree/bindings/processed-schema.json
>>> Documentation/devicetree/bindings/net/snps,dwmac.yaml: mac-mode:
>>> missing type definition
>>> Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml: ti,rx-
>>> gain-reduction-db: missing type definition
>>> Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml:
>>> fsl,phy-pcs-tx-deemph-3p5db-attenuation-db: missing type definition
>>> DTC [C] arch/arm64/boot/dts/qcom/qcs615-ride.dtb
>>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: clock-controller@100000:
>>> 'clock-names' is a required property
>>> from schema $id: http://devicetree.org/schemas/clock/
>>> qcom,qcs615-gcc.yaml#
>>
>> Taniya is looking at this one.
>
> Got it. Since the patch appears to be accepted, should I still wait for
> mm clk version 7?
> https://patchwork.kernel.org/project/linux-arm-msm/patch/20250814-
> qcs615-mm-cpu-dt-v6-v6-1-a06f69928ab5@oss.qualcomm.com/
>
>>
>>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: gpio@3e: $nodename:0:
>>> 'gpio@3e' does not match '^(pinctrl|pinmux)(@[0-9a-f]+)?$'
>>> from schema $id: http://devicetree.org/schemas/pinctrl/
>>> semtech,sx1501q.yaml#
>>
>> This is from your patch.
>
> got it, will change "gpio@3e" to "pinctrl@3e"
>
>>
>>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'vdd10-supply'
>>> is a required property
>>> from schema $id: http://devicetree.org/schemas/display/
>>> bridge/analogix,anx7625.yaml#
>>
>> This is from your patch.
>
> got it, will add this part like https://lore.kernel.org/
> all/20250604071851.1438612-3-quic_amakhija@quicinc.com/
>
> @@ -51,6 +51,64 @@ dp_dsi0_connector_in: endpoint {
> };
> };
>
> + vreg_12p0: vreg-12p0-regulator {=
> ...
> @@ -338,7 +396,9 @@ bridge@58 {
> interrupts-extended = <&io_expander 0
> IRQ_TYPE_EDGE_FALLING>;
> enable-gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
> reset-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
> - wakeup-source;
> + vdd10-supply = <&vreg_1p0>;
> + vdd18-supply = <&vreg_1p8>;
> + vdd33-supply = <&vreg_3p0>;
>
>>
>>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'vdd18-supply'
>>> is a required property
>>> from schema $id: http://devicetree.org/schemas/display/
>>> bridge/analogix,anx7625.yaml#
>>
>> This is from your patch.
>
> same as above
>
>>
>>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'vdd33-supply'
>>> is a required property
>>> from schema $id: http://devicetree.org/schemas/display/
>>> bridge/analogix,anx7625.yaml#
>>
>> This is from your patch.
>
> same as above
>
>>
>>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'wakeup-source'
>>> does not match any of the regexes: 'pinctrl-[0-9]+'
>>> from schema $id: http://devicetree.org/schemas/display/
>>> bridge/analogix,anx7625.yaml#
>>
>> This is from your patch.
>
> will remove it
>
>>
>>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: phy@ae94400: Unevaluated
>>> properties are not allowed ('vdds-supply' was unexpected)
>>> from schema $id: http://devicetree.org/schemas/display/msm/
>>> dsi-phy-14nm.yaml#
>>
>> This is from your patch.
>
> will change "vdds-supply" to "vcca-supply"
>
>>
>>
>> Am I missing something? Is there any reason why these 6 new errors
>> should be added?
>
> Sorry, I missed those parts earlier. I've re-tested and confirmed the
> changes. The patch can pass after refine.
> Would it be appropriate to send v7 now, or should I wait until the mm
> clk v7 is ready?
ok, I saw it's already included in linux-next. I'll send v7 tomorrow
based on the latest linux-next. may i?
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=f9c36698db91780eed4ee3a90794bda2a4252166
>
>>
>> Regards,
>> Bjorn
>>
>>> ---
>>> arch/arm64/boot/dts/qcom/qcs615-ride.dts | 90 +++++++++++++++++++++
>>> +++++++++++
>>> 1 file changed, 90 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/
>>> boot/dts/qcom/qcs615-ride.dts
>>> index
>>> 59582d3dc4c49828ef4a0d22a1cbaba715c7ce8c..39c757b66f47579d9bc7cc5c4d703f7af4434df4 100644
>>> --- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
>>> +++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
>>> @@ -39,6 +39,18 @@ xo_board_clk: xo-board-clk {
>>> };
>>> };
>>> + dp-dsi0-connector {
>>> + compatible = "dp-connector";
>>> + label = "DSI0";
>>> + type = "mini";
>>> +
>>> + port {
>>> + dp_dsi0_connector_in: endpoint {
>>> + remote-endpoint = <&dsi2dp_bridge_out>;
>>> + };
>>> + };
>>> + };
>>> +
>>> vreg_conn_1p8: regulator-conn-1p8 {
>>> compatible = "regulator-fixed";
>>> regulator-name = "vreg_conn_1p8";
>>> @@ -294,6 +306,84 @@ &gcc {
>>> <&sleep_clk>;
>>> };
>>> +&i2c2 {
>>> + clock-frequency = <400000>;
>>> + status = "okay";
>>> +
>>> + io_expander: gpio@3e {
>>> + compatible = "semtech,sx1509q";
>>> + reg = <0x3e>;
>>> + interrupts-extended = <&tlmm 58 IRQ_TYPE_EDGE_FALLING>;
>>> + gpio-controller;
>>> + #gpio-cells = <2>;
>>> + interrupt-controller;
>>> + #interrupt-cells = <2>;
>>> + semtech,probe-reset;
>>> + };
>>> +
>>> + i2c-mux@77 {
>>> + compatible = "nxp,pca9542";
>>> + reg = <0x77>;
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + i2c@0 {
>>> + reg = <0>;
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + bridge@58 {
>>> + compatible = "analogix,anx7625";
>>> + reg = <0x58>;
>>> + interrupts-extended = <&io_expander 0
>>> IRQ_TYPE_EDGE_FALLING>;
>>> + enable-gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
>>> + reset-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
>>> + wakeup-source;
>>> +
>>> + ports {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + port@0 {
>>> + reg = <0>;
>>> +
>>> + dsi2dp_bridge_in: endpoint {
>>> + remote-endpoint = <&mdss_dsi0_out>;
>>> + };
>>> + };
>>> +
>>> + port@1 {
>>> + reg = <1>;
>>> +
>>> + dsi2dp_bridge_out: endpoint {
>>> + remote-endpoint = <&dp_dsi0_connector_in>;
>>> + };
>>> + };
>>> + };
>>> + };
>>> + };
>>> + };
>>> +};
>>> +
>>> +&mdss {
>>> + status = "okay";
>>> +};
>>> +
>>> +&mdss_dsi0 {
>>> + vdda-supply = <&vreg_l11a>;
>>> + status = "okay";
>>> +};
>>> +
>>> +&mdss_dsi0_out {
>>> + remote-endpoint = <&dsi2dp_bridge_in>;
>>> + data-lanes = <0 1 2 3>;
>>> +};
>>> +
>>> +&mdss_dsi0_phy {
>>> + vdds-supply = <&vreg_l5a>;
>>> + status = "okay";
>>> +};
>>> +
>>> &pcie {
>>> perst-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
>>> wake-gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>;
>>>
>>> --
>>> 2.34.1
>>>
>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2025-08-26 12:21 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-08-18 4:39 [PATCH v6 0/2] Add display support for QCS615 platform Fange Zhang
2025-08-18 4:39 ` [PATCH v6 1/2] arm64: dts: qcom: Add display support for QCS615 Fange Zhang
2025-08-18 4:39 ` [PATCH v6 2/2] arm64: dts: qcom: Add display support for QCS615 RIDE board Fange Zhang
2025-08-24 3:15 ` Bjorn Andersson
2025-08-26 8:08 ` Fange Zhang
2025-08-26 12:21 ` Fange Zhang
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