[PATCH V2 0/2] Add regulator load support for QMP UFS PHY

[PATCH V2 0/2] Add regulator load support for QMP UFS PHY

[Nitin Rawat]

This patch series adds regulator load support to the QMP UFS PHY driver.
Currently, the driver only sets regulator supply names without specifying
load requirements, which can lead to suboptimal power management.

On some SoCs, regulators are shared between the QMP UFS PHY and other IP
blocks. The regulator framework needs to know the maximum load
requirements from all consumers to determine the appropriate
regulator mode (Low Power Mode vs High Power Mode) and ensure stable
operation.

The series implements a simple and efficient approach for regulator load
handling, with varying load requirements across different SoC
configurations.

Changes from v1:
1. Addressed comments to move load configuration from device tree to
   hardcoded, per-compatible data within the driver.
2. Accordingly updated commit text to reflect the same.
3. Addressed Manivannan's comment to avoid initialization of load.

Nitin Rawat (2):
  phy: qcom-qmp-ufs: Add regulator load voting for UFS QMP Phy
  phy: qcom-qmp-ufs: Add regulator loads for SM8550 and SM8750

 drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

--
2.48.1

[PATCH V2 1/2] phy: qcom-qmp-ufs: Add regulator load voting for UFS QMP Phy

[Nitin Rawat]

On some SoCs, regulators are shared between the QMP UFS PHY and other
IP blocks. Hence convey maximum load requirement for UFS PHY to the
regulator framework as supply's capabilities or mode(Low Power Mode
or High Power Mode) change depending on the maximum potential load
at any given time, which the regulator driver must be aware of.
This helps to ensure stable operation and proper power management,
set the regulator load before enabling the regulators.

This patch adds:

- vreg_load_uA field to qmp_phy_cfg structure for load value arrays.
- Enhanced qmp_ufs_vreg_init() to set init_load_uA when loads are
  specified.

Configurations without specific load requirements will continue
to work unchanged, as init_load_uA remains zero-initialized when
vreg_load_uA is not provided.

Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com>
---
 drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
index 9c69c77d10c8..f7a4a8334026 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
@@ -1110,6 +1110,9 @@ struct qmp_phy_cfg {
 	const char * const *vreg_list;
 	int num_vregs;

+	/* regulator load values in same order as vreg_list */
+	const int *vreg_load_ua;
+
 	/* array of registers with different offsets */
 	const unsigned int *regs;

@@ -1901,8 +1904,11 @@ static int qmp_ufs_vreg_init(struct qmp_ufs *qmp)
 	if (!qmp->vregs)
 		return -ENOMEM;

-	for (i = 0; i < num; i++)
+	for (i = 0; i < num; i++) {
 		qmp->vregs[i].supply = cfg->vreg_list[i];
+		if (cfg->vreg_load_ua)
+			qmp->vregs[i].init_load_uA = cfg->vreg_load_ua[i];
+	}

 	return devm_regulator_bulk_get(dev, num, qmp->vregs);
 }
--
2.48.1

[PATCH V2 2/2] phy: qcom-qmp-ufs: Add regulator loads for SM8550 and SM8750

[Nitin Rawat]

Add regulator load configuration for SM8550 and SM8750 UFS PHY.
This ensure proper regulator load management and mode selection for
optimal power efficiency on these SoC platforms where regulators may
be shared with other IP blocks.

The load requirements are:

- SM8550: vdda-phy=205000uA, vdda-pll=17500uA
- SM8750: vdda-phy=213000uA, vdda-pll=18300uA

Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com>
---
 drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
index f7a4a8334026..50875d9609f6 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
@@ -1172,6 +1172,17 @@ static const char * const qmp_phy_vreg_l[] = {
 	"vdda-phy", "vdda-pll",
 };

+/* Regulator load arrays for specific configurations */
+static const int sm8650_vreg_load_ua[] = {
+	205000, /* vdda-phy */
+	17500,  /* vdda-pll */
+};
+
+static const int sm8750_vreg_load_ua[] = {
+	213000, /* vdda-phy */
+	18300,  /* vdda-pll */
+};
+
 static const struct qmp_ufs_offsets qmp_ufs_offsets = {
 	.serdes		= 0,
 	.pcs		= 0xc00,
@@ -1642,6 +1653,7 @@ static const struct qmp_phy_cfg sm8650_ufsphy_cfg = {

 	.vreg_list		= qmp_phy_vreg_l,
 	.num_vregs		= ARRAY_SIZE(qmp_phy_vreg_l),
+	.vreg_load_ua		= sm8650_vreg_load_ua,
 	.regs			= ufsphy_v6_regs_layout,
 };

@@ -1680,6 +1692,7 @@ static const struct qmp_phy_cfg sm8750_ufsphy_cfg = {

 	.vreg_list		= qmp_phy_vreg_l,
 	.num_vregs		= ARRAY_SIZE(qmp_phy_vreg_l),
+	.vreg_load_ua		= sm8750_vreg_load_ua,
 	.regs			= ufsphy_v6_regs_layout,

 };
--
2.48.1

Re: [PATCH V2 1/2] phy: qcom-qmp-ufs: Add regulator load voting for UFS QMP Phy

[Dmitry Baryshkov]

On Mon, Aug 18, 2025 at 06:11:09PM +0530, Nitin Rawat wrote:
> On some SoCs, regulators are shared between the QMP UFS PHY and other
> IP blocks. Hence convey maximum load requirement for UFS PHY to the

s/maximum//

> regulator framework as supply's capabilities or mode(Low Power Mode
> or High Power Mode) change depending on the maximum potential load
> at any given time, which the regulator driver must be aware of.
> This helps to ensure stable operation and proper power management,
> set the regulator load before enabling the regulators.
> 
> This patch adds:
> 

Documentation/process/submitting-patches.rst, "[This patch] makes xyzzy
do frotz".

> - vreg_load_uA field to qmp_phy_cfg structure for load value arrays.
> - Enhanced qmp_ufs_vreg_init() to set init_load_uA when loads are
>   specified.
> 
> Configurations without specific load requirements will continue
> to work unchanged, as init_load_uA remains zero-initialized when
> vreg_load_uA is not provided.
> 
> Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com>
> ---
>  drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
> index 9c69c77d10c8..f7a4a8334026 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
> @@ -1110,6 +1110,9 @@ struct qmp_phy_cfg {
>  	const char * const *vreg_list;
>  	int num_vregs;
> 
> +	/* regulator load values in same order as vreg_list */
> +	const int *vreg_load_ua;
> +
>  	/* array of registers with different offsets */
>  	const unsigned int *regs;
> 
> @@ -1901,8 +1904,11 @@ static int qmp_ufs_vreg_init(struct qmp_ufs *qmp)
>  	if (!qmp->vregs)
>  		return -ENOMEM;
> 
> -	for (i = 0; i < num; i++)
> +	for (i = 0; i < num; i++) {
>  		qmp->vregs[i].supply = cfg->vreg_list[i];
> +		if (cfg->vreg_load_ua)
> +			qmp->vregs[i].init_load_uA = cfg->vreg_load_ua[i];

Please rewrite the driver to use devm_regulator_bulk_get_const().

> +	}
> 
>  	return devm_regulator_bulk_get(dev, num, qmp->vregs);
>  }
> --
> 2.48.1
> 

-- 
With best wishes
Dmitry

Re: [PATCH V2 2/2] phy: qcom-qmp-ufs: Add regulator loads for SM8550 and SM8750

[Konrad Dybcio]

On 8/18/25 2:41 PM, Nitin Rawat wrote:
> Add regulator load configuration for SM8550 and SM8750 UFS PHY.
> This ensure proper regulator load management and mode selection for
> optimal power efficiency on these SoC platforms where regulators may
> be shared with other IP blocks.
> 
> The load requirements are:
> 
> - SM8550: vdda-phy=205000uA, vdda-pll=17500uA
> - SM8750: vdda-phy=213000uA, vdda-pll=18300uA
> 
> Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com>
> ---
>  drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
> index f7a4a8334026..50875d9609f6 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
> @@ -1172,6 +1172,17 @@ static const char * const qmp_phy_vreg_l[] = {
>  	"vdda-phy", "vdda-pll",
>  };
> 
> +/* Regulator load arrays for specific configurations */
> +static const int sm8650_vreg_load_ua[] = {
> +	205000, /* vdda-phy */
> +	17500,  /* vdda-pll */

Is one really supposed to be 10x higher? I mean, it may be, but
it looks odd..

Konrad