[PATCH] arm64: dts: qcom: x1e80100: Add '#cooling-cells' for CPU nodes

[PATCH] arm64: dts: qcom: x1e80100: Add '#cooling-cells' for CPU nodes

[Manivannan Sadhasivam]

From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>

Enable passive cooling for CPUs in the X1E80100 SoC by adding the
'#cooling-cells' property. This will allow the OS to mitigate the CPU
power dissipation with the help of SCMI DVFS.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
---
 arch/arm64/boot/dts/qcom/x1e80100.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index 51576d9c935d..001cf9cbb0c5 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -76,6 +76,7 @@ cpu0: cpu@0 {
 			power-domains = <&cpu_pd0>, <&scmi_dvfs 0>;
 			power-domain-names = "psci", "perf";
 			cpu-idle-states = <&cluster_c4>;
+			#cooling-cells = <2>;
 
 			l2_0: l2-cache {
 				compatible = "cache";
@@ -93,6 +94,7 @@ cpu1: cpu@100 {
 			power-domains = <&cpu_pd1>, <&scmi_dvfs 0>;
 			power-domain-names = "psci", "perf";
 			cpu-idle-states = <&cluster_c4>;
+			#cooling-cells = <2>;
 		};
 
 		cpu2: cpu@200 {
@@ -104,6 +106,7 @@ cpu2: cpu@200 {
 			power-domains = <&cpu_pd2>, <&scmi_dvfs 0>;
 			power-domain-names = "psci", "perf";
 			cpu-idle-states = <&cluster_c4>;
+			#cooling-cells = <2>;
 		};
 
 		cpu3: cpu@300 {
@@ -115,6 +118,7 @@ cpu3: cpu@300 {
 			power-domains = <&cpu_pd3>, <&scmi_dvfs 0>;
 			power-domain-names = "psci", "perf";
 			cpu-idle-states = <&cluster_c4>;
+			#cooling-cells = <2>;
 		};
 
 		cpu4: cpu@10000 {
@@ -126,6 +130,7 @@ cpu4: cpu@10000 {
 			power-domains = <&cpu_pd4>, <&scmi_dvfs 1>;
 			power-domain-names = "psci", "perf";
 			cpu-idle-states = <&cluster_c4>;
+			#cooling-cells = <2>;
 
 			l2_1: l2-cache {
 				compatible = "cache";
@@ -143,6 +148,7 @@ cpu5: cpu@10100 {
 			power-domains = <&cpu_pd5>, <&scmi_dvfs 1>;
 			power-domain-names = "psci", "perf";
 			cpu-idle-states = <&cluster_c4>;
+			#cooling-cells = <2>;
 		};
 
 		cpu6: cpu@10200 {
@@ -154,6 +160,7 @@ cpu6: cpu@10200 {
 			power-domains = <&cpu_pd6>, <&scmi_dvfs 1>;
 			power-domain-names = "psci", "perf";
 			cpu-idle-states = <&cluster_c4>;
+			#cooling-cells = <2>;
 		};
 
 		cpu7: cpu@10300 {
@@ -165,6 +172,7 @@ cpu7: cpu@10300 {
 			power-domains = <&cpu_pd7>, <&scmi_dvfs 1>;
 			power-domain-names = "psci", "perf";
 			cpu-idle-states = <&cluster_c4>;
+			#cooling-cells = <2>;
 		};
 
 		cpu8: cpu@20000 {
@@ -176,6 +184,7 @@ cpu8: cpu@20000 {
 			power-domains = <&cpu_pd8>, <&scmi_dvfs 2>;
 			power-domain-names = "psci", "perf";
 			cpu-idle-states = <&cluster_c4>;
+			#cooling-cells = <2>;
 
 			l2_2: l2-cache {
 				compatible = "cache";
@@ -193,6 +202,7 @@ cpu9: cpu@20100 {
 			power-domains = <&cpu_pd9>, <&scmi_dvfs 2>;
 			power-domain-names = "psci", "perf";
 			cpu-idle-states = <&cluster_c4>;
+			#cooling-cells = <2>;
 		};
 
 		cpu10: cpu@20200 {
@@ -204,6 +214,7 @@ cpu10: cpu@20200 {
 			power-domains = <&cpu_pd10>, <&scmi_dvfs 2>;
 			power-domain-names = "psci", "perf";
 			cpu-idle-states = <&cluster_c4>;
+			#cooling-cells = <2>;
 		};
 
 		cpu11: cpu@20300 {
@@ -215,6 +226,7 @@ cpu11: cpu@20300 {
 			power-domains = <&cpu_pd11>, <&scmi_dvfs 2>;
 			power-domain-names = "psci", "perf";
 			cpu-idle-states = <&cluster_c4>;
+			#cooling-cells = <2>;
 		};
 
 		cpu-map {
-- 
2.48.1

Re: [PATCH] arm64: dts: qcom: x1e80100: Add '#cooling-cells' for CPU nodes

[Dmitry Baryshkov]

On Wed, Oct 15, 2025 at 12:27:03PM +0530, Manivannan Sadhasivam wrote:
> From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
> 
> Enable passive cooling for CPUs in the X1E80100 SoC by adding the
> '#cooling-cells' property. This will allow the OS to mitigate the CPU
> power dissipation with the help of SCMI DVFS.

#cooling-cells isn't enough, the devices need to be listed in the
thermal maps.

> 
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
> ---
>  arch/arm64/boot/dts/qcom/x1e80100.dtsi | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 

-- 
With best wishes
Dmitry

Re: [PATCH] arm64: dts: qcom: x1e80100: Add '#cooling-cells' for CPU nodes

[Manivannan Sadhasivam]

On Sun, Oct 19, 2025 at 07:01:30PM +0300, Dmitry Baryshkov wrote:
> On Wed, Oct 15, 2025 at 12:27:03PM +0530, Manivannan Sadhasivam wrote:
> > From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
> > 
> > Enable passive cooling for CPUs in the X1E80100 SoC by adding the
> > '#cooling-cells' property. This will allow the OS to mitigate the CPU
> > power dissipation with the help of SCMI DVFS.
> 
> #cooling-cells isn't enough, the devices need to be listed in the
> thermal maps.
> 

Not strictly required unless the cooling device and trip points are wired in DT.
But I don't want to do that yet, and just expose the cooling devices to
userspace so that I can experiment with something like thermal-daemon.

- Mani

-- 
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