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Mon, 10 Nov 2025 03:29:55 -0800 (PST) X-Google-Smtp-Source: AGHT+IGMG6ovmdfjX+JC8Me1fTeukl5fm1TgWV8TPUNLWMYD42ZI2p8Y10hF6Q+EdEn8pCXJX3XaOw== X-Received: by 2002:a17:903:3d0f:b0:297:e575:cc5d with SMTP id d9443c01a7336-297e575cd10mr97124085ad.35.1762774194529; Mon, 10 Nov 2025 03:29:54 -0800 (PST) Received: from hu-krichai-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-29651cd0ee9sm144165495ad.112.2025.11.10.03.29.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Nov 2025 03:29:54 -0800 (PST) From: Krishna Chaitanya Chundru To: andersson@kernel.org, robh@kernel.org, manivannan.sadhasivam@linaro.org, krzk@kernel.org, helgaas@kernel.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, kw@linux.com, conor+dt@kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree-spec@vger.kernel.org, quic_vbadigan@quicinc.com, krishna.chundru@oss.qualcomm.com Subject: [PATCH v2] schemas: pci: Document PCIe T_POWER_ON Date: Mon, 10 Nov 2025 16:59:47 +0530 Message-Id: <20251110112947.2071036-1-krishna.chundru@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: Qm7A2twOwt-T3TVODIbpjXv1ItZGLWRX X-Authority-Analysis: v=2.4 cv=OK4qHCaB c=1 sm=1 tr=0 ts=6911ccb3 cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=5_BQsOELN8wEIR4Ca7QA:9 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTEwMDEwMCBTYWx0ZWRfXzioelCUZKPbn LLxFXmOaaNNLUDBYBoRs+8o5EEyWSpG7i1BHGSDxbpYCtmWEssUgDBas18Zq07V6b4QJ0NDX5Y2 afOaOeVYfBMqTUJN2dN2MQhn2xdo2N9pI0rcqObGItx7O3TTaOJG5WzydfOnrk5wpSZ3dw0WwSB hi8vXifExiScM3Z791t6CTetx7P3FPWqtB0qvOebXK+GLNl/MSmmu0xHhixzO3a0Ibz7SYBx2Sr WqOva6vZa64hnkQ3I5SHw4dAlU/h3aguUUfEHqnao+OBhEc9GJ9vjoDU75AQvWuGsXxwVgbTw8M tGq6Cj0Jc0otKP5Qna2+dOmVCzVVzFGCCuSjWt4ydl80YPSvS+uTUhQ7duOS115bqZt80tVAUhE mbS0O0tqr1LjVZzXtG6cRKZ9ROl3vQ== X-Proofpoint-GUID: Qm7A2twOwt-T3TVODIbpjXv1ItZGLWRX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-10_04,2025-11-06_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 clxscore=1015 suspectscore=0 bulkscore=0 impostorscore=0 adultscore=0 priorityscore=1501 spamscore=0 malwarescore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511100100 >From PCIe r6, sec 5.5.4 & Table 5-11 in sec 5.5.5 T_POWER_ON is the minimum amount of time(in us) that each component must wait in L1.2.Exit after sampling CLKREQ# asserted before actively driving the interface to ensure no device is ever actively driving into an unpowered component and these values are based on the components and AC coupling capacitors used in the connection linking the two components. This property should be used to indicate the T_POWER_ON for each Root Port. Signed-off-by: Krishna Chaitanya Chundru --- Changes in v1: - Updated the commiit text (Mani). - Link to v1: https://lore.kernel.org/all/20251110112550.2070659-1-krishna.chundru@oss.qualcomm.com/#t dtschema/schemas/pci/pci-bus-common.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/dtschema/schemas/pci/pci-bus-common.yaml b/dtschema/schemas/pci/pci-bus-common.yaml index 5257339..bbe5510 100644 --- a/dtschema/schemas/pci/pci-bus-common.yaml +++ b/dtschema/schemas/pci/pci-bus-common.yaml @@ -152,6 +152,15 @@ properties: This property is invalid in host bridge nodes. maxItems: 1 + t-power-on-us: + description: + The minimum amount of time that each component must wait in + L1.2.Exit after sampling CLKREQ# asserted before actively driving + the interface to ensure no device is ever actively driving into an + unpowered component. This value is based on the components and AC + coupling capacitors used in the connection linking the two + components(PCIe r6.0, sec 5.5.4). + supports-clkreq: description: If present this property specifies that CLKREQ signal routing exists from -- 2.34.1