From: Bjorn Helgaas <helgaas@kernel.org>
To: Val Packett <val@packett.cool>
Cc: "Dmitry Baryshkov" <dmitry.baryshkov@oss.qualcomm.com>,
manivannan.sadhasivam@oss.qualcomm.com,
"Rob Clark" <robin.clark@oss.qualcomm.com>,
"Vignesh Raman" <vignesh.raman@collabora.com>,
"Valentine Burley" <valentine.burley@collabora.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Rob Herring" <robh@kernel.org>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-msm@vger.kernel.org,
"David E. Box" <david.e.box@linux.intel.com>,
"Kai-Heng Feng" <kai.heng.feng@canonical.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
"Heiner Kallweit" <hkallweit1@gmail.com>,
"Chia-Lin Kao" <acelan.kao@canonical.com>
Subject: Re: [PATCH v2 0/2] PCI/ASPM: Enable ASPM and Clock PM by default on devicetree platforms
Date: Tue, 11 Nov 2025 17:33:13 -0600 [thread overview]
Message-ID: <20251111233313.GA2211570@bhelgaas> (raw)
In-Reply-To: <36f05566-8c7a-485b-96e7-9792ab355374@packett.cool>
On Tue, Nov 11, 2025 at 03:51:03AM -0300, Val Packett wrote:
> On 11/8/25 1:18 PM, Dmitry Baryshkov wrote:
> > On Mon, Sep 22, 2025 at 09:46:43PM +0530, Manivannan Sadhasivam via B4 Relay wrote:
> > > Hi,
> > >
> > > This series is one of the 'let's bite the bullet' kind, where we have decided to
> > > enable all ASPM and Clock PM states by default on devicetree platforms [1]. The
> > > reason why devicetree platforms were chosen because, it will be of minimal
> > > impact compared to the ACPI platforms. So seemed ideal to test the waters.
> > >
> > > This series is tested on Lenovo Thinkpad T14s based on Snapdragon X1 SoC. All
> > > supported ASPM states are getting enabled for both the NVMe and WLAN devices by
> > > default.
> > > [..]
> > The series breaks the DRM CI on DB820C board (apq8096, PCIe network
> > card, NFS root). The board resets randomly after some time ([1]).
>
> Is that reset.. due to the watchdog resetting a hard-frozen system?
>
> Me and a bunch of other people in the #aarch64-laptops irc/matrix room have
> been experiencing these random hard freezes with ASPM enabled for the NVMe
> SSD, on Hamoa (and Purwa too I think) devices.
I don't know what controllers are in Hamoa and Purwa or what the IDs
of the root ports and endpoints are. Can you collect the Vendor and
Device IDs (from dmesg log or "lspci -n")? If we figure out that some
are broken, we might be able to add quirks to avoid any broken ASPM
states.
> I have confirmed with a modified (to accept args) enable-aspm.sh script[1]
> that disabling ASPM *only* for the SSD, while keeping it *on* for the WiFi
> adapter, is enough to keep the system stable (got to about a month of uptime
> in that state).
>
> If you have reproduced the same issue on an entirely different SoC, it's
> probably a general driver issue.
>
> Please, please help us debug this using your internal secret debug equipment
> :)
>
>
> [1]: https://gist.github.com/valpackett/8a6207b44364de6b32652f4041fe680f
Can you use "echo 1 > /sys/bus/pci/devices/.../link/l0s_aspm" and
similar (see Documentation/ABI/testing/sysfs-bus-pci) to do this
tuning instead of poking with setpci? If so, it might be easier.
There are ordering requirements that aspm.c tries to observe via the
sysfs interface.
enable-aspm.sh might observe them also (I didn't look that carefully),
but if aspm.c gets them wrong, they're wrong for everybody, so we'd
like to know about that.
Bjorn
prev parent reply other threads:[~2025-11-11 23:33 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-22 16:16 [PATCH v2 0/2] PCI/ASPM: Enable ASPM and Clock PM by default on devicetree platforms Manivannan Sadhasivam via B4 Relay
2025-09-22 16:16 ` [PATCH v2 1/2] PCI/ASPM: Override the ASPM and Clock PM states set by BIOS for " Manivannan Sadhasivam via B4 Relay
2025-10-14 16:30 ` FUKAUMI Naoki
2025-10-14 18:49 ` Bjorn Helgaas
2025-10-14 23:33 ` Dragan Simic
2025-10-15 6:22 ` Manivannan Sadhasivam
2025-10-15 11:23 ` Diederik de Haas
2025-10-23 18:57 ` Dragan Simic
2025-10-15 6:26 ` Manivannan Sadhasivam
2025-10-15 7:13 ` FUKAUMI Naoki
2025-10-15 7:50 ` Manivannan Sadhasivam
2025-10-15 9:11 ` Shawn Lin
2025-10-15 9:43 ` Manivannan Sadhasivam
2025-10-15 9:46 ` Niklas Cassel
2025-10-15 10:33 ` Manivannan Sadhasivam
2025-10-15 12:17 ` Niklas Cassel
2025-10-15 13:00 ` Shawn Lin
2025-10-15 15:23 ` Niklas Cassel
2025-10-15 23:30 ` Bjorn Helgaas
2025-10-16 6:46 ` Hongxing Zhu
2025-10-17 3:36 ` Manivannan Sadhasivam
2025-10-17 9:47 ` Shawn Lin
2025-10-17 10:04 ` Manivannan Sadhasivam
2025-10-17 12:19 ` Shawn Lin
2025-10-17 12:54 ` Manivannan Sadhasivam
2025-10-17 13:45 ` Bjorn Helgaas
2025-10-31 6:21 ` Manivannan Sadhasivam
2025-10-15 12:26 ` Diederik de Haas
2025-10-15 22:50 ` Bjorn Helgaas
2025-10-16 17:38 ` Diederik de Haas
2025-10-30 22:14 ` Bjorn Helgaas
2025-10-30 22:16 ` Bjorn Helgaas
2025-09-22 16:16 ` [PATCH v2 2/2] PCI: qcom: Remove the custom ASPM enablement code Manivannan Sadhasivam via B4 Relay
2025-09-23 23:14 ` [PATCH v2 0/2] PCI/ASPM: Enable ASPM and Clock PM by default on devicetree platforms Bjorn Helgaas
2025-11-08 16:18 ` Dmitry Baryshkov
2025-11-11 6:51 ` Val Packett
2025-11-11 7:19 ` Manivannan Sadhasivam
2025-11-11 7:40 ` Val Packett
2025-11-11 10:06 ` Manivannan Sadhasivam
2025-11-11 17:29 ` Val Packett
2025-11-13 4:30 ` Val Packett
2025-11-11 23:33 ` Bjorn Helgaas [this message]
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