From: Kumari Pallavi <kumari.pallavi@oss.qualcomm.com>
To: kpallavi@qti.qualcomm.com, srini@kernel.org,
amahesh@qti.qualcomm.com, arnd@arndb.de,
gregkh@linuxfoundation.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org
Cc: Kumari Pallavi <kumari.pallavi@oss.qualcomm.com>,
quic_bkumar@quicinc.com, ekansh.gupta@oss.qualcomm.com,
linux-kernel@vger.kernel.org, quic_chennak@quicinc.com,
dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, jingyi.wang@oss.qualcomm.com,
aiqun.yu@oss.qualcomm.com, ktadakam@qti.qualcomm.com
Subject: [PATCH v4 4/4] misc: fastrpc: Update dma_bits for CDSP support on Kaanapali SoC
Date: Wed, 26 Nov 2025 15:15:45 +0530 [thread overview]
Message-ID: <20251126094545.2139376-5-kumari.pallavi@oss.qualcomm.com> (raw)
In-Reply-To: <20251126094545.2139376-1-kumari.pallavi@oss.qualcomm.com>
DSP currently supports 32-bit IOVA (32-bit PA + 4-bit SID) for
both Q6 and user DMA (uDMA) access. This is being upgraded to
34-bit PA + 4-bit SID due to a hardware revision in CDSP for
Kaanapali SoC, which expands the DMA addressable range.
Update DMA bits configuration in the driver to support CDSP on
Kaanapali SoC. Set the default `dma_bits` to 32-bit and update
it to 34-bit based on CDSP and OF matching on the fastrpc node.
Signed-off-by: Kumari Pallavi <kumari.pallavi@oss.qualcomm.com>
---
drivers/misc/fastrpc.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/misc/fastrpc.c b/drivers/misc/fastrpc.c
index 9c3860f5716c..b1315e20f121 100644
--- a/drivers/misc/fastrpc.c
+++ b/drivers/misc/fastrpc.c
@@ -269,6 +269,8 @@ struct fastrpc_session_ctx {
struct fastrpc_soc_data {
u32 sid_pos;
+ u32 dma_addr_bits_extended;
+ u32 dma_addr_bits_default;
};
struct fastrpc_channel_ctx {
@@ -2189,6 +2191,7 @@ static int fastrpc_cb_probe(struct platform_device *pdev)
int i, sessions = 0;
unsigned long flags;
int rc;
+ u32 dma_bits;
cctx = dev_get_drvdata(dev->parent);
if (!cctx)
@@ -2202,12 +2205,16 @@ static int fastrpc_cb_probe(struct platform_device *pdev)
spin_unlock_irqrestore(&cctx->lock, flags);
return -ENOSPC;
}
+ dma_bits = cctx->soc_data->dma_addr_bits_default;
sess = &cctx->session[cctx->sesscount++];
sess->used = false;
sess->valid = true;
sess->dev = dev;
dev_set_drvdata(dev, sess);
+ if (cctx->domain_id == CDSP_DOMAIN_ID)
+ dma_bits = cctx->soc_data->dma_addr_bits_extended;
+
if (of_property_read_u32(dev->of_node, "reg", &sess->sid))
dev_info(dev, "FastRPC Session ID not specified in DT\n");
@@ -2222,9 +2229,9 @@ static int fastrpc_cb_probe(struct platform_device *pdev)
}
}
spin_unlock_irqrestore(&cctx->lock, flags);
- rc = dma_set_mask(dev, DMA_BIT_MASK(32));
+ rc = dma_set_mask(dev, DMA_BIT_MASK(dma_bits));
if (rc) {
- dev_err(dev, "32-bit DMA enable failed\n");
+ dev_err(dev, "%u-bit DMA enable failed\n", dma_bits);
return rc;
}
@@ -2311,10 +2318,14 @@ static int fastrpc_get_domain_id(const char *domain)
static const struct fastrpc_soc_data kaanapali_soc_data = {
.sid_pos = 56,
+ .dma_addr_bits_extended = 34,
+ .dma_addr_bits_default = 32,
};
static const struct fastrpc_soc_data default_soc_data = {
.sid_pos = 32,
+ .dma_addr_bits_extended = 32,
+ .dma_addr_bits_default = 32,
};
static int fastrpc_rpmsg_probe(struct rpmsg_device *rpdev)
--
2.34.1
prev parent reply other threads:[~2025-11-26 9:46 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-26 9:45 [PATCH v4 0/4] Add ADSP and CDSP support on Kaanapali SoC Kumari Pallavi
2025-11-26 9:45 ` [PATCH v4 1/4] dt-bindings: misc: qcom,fastrpc: Add compatible for Kaanapali Kumari Pallavi
2025-11-27 7:30 ` Krzysztof Kozlowski
2025-12-01 8:18 ` Kumari Pallavi
2025-12-01 8:36 ` Krzysztof Kozlowski
2025-11-26 9:45 ` [PATCH v4 2/4] misc: fastrpc: Rename phys to dma_addr for clarity Kumari Pallavi
2025-11-27 12:23 ` kernel test robot
2025-11-26 9:45 ` [PATCH v4 3/4] misc: fastrpc: Add support for new DSP IOVA formatting Kumari Pallavi
2025-11-27 7:32 ` Krzysztof Kozlowski
2025-11-26 9:45 ` Kumari Pallavi [this message]
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