From: Bartosz Golaszewski <brgl@bgdev.pl>
To: Vinod Koul <vkoul@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
Thara Gopinath <thara.gopinath@gmail.com>,
Herbert Xu <herbert@gondor.apana.org.au>,
"David S. Miller" <davem@davemloft.net>,
Udit Tiwari <quic_utiwari@quicinc.com>,
Daniel Perez-Zoghbi <dperezzo@quicinc.com>,
Md Sadre Alam <mdalam@qti.qualcomm.com>,
Dmitry Baryshkov <lumag@kernel.org>
Cc: dmaengine@vger.kernel.org, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-crypto@vger.kernel.org,
Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Subject: [PATCH v9 10/11] crypto: qce - Add support for BAM locking
Date: Fri, 28 Nov 2025 12:44:08 +0100 [thread overview]
Message-ID: <20251128-qcom-qce-cmd-descr-v9-10-9a5f72b89722@linaro.org> (raw)
In-Reply-To: <20251128-qcom-qce-cmd-descr-v9-0-9a5f72b89722@linaro.org>
From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Implement the infrastructure for using the new DMA controller lock/unlock
feature of the BAM driver. No functional change for now.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
---
drivers/crypto/qce/common.c | 18 ++++++++++++++++++
drivers/crypto/qce/dma.c | 39 ++++++++++++++++++++++++++++++++++-----
drivers/crypto/qce/dma.h | 4 ++++
3 files changed, 56 insertions(+), 5 deletions(-)
diff --git a/drivers/crypto/qce/common.c b/drivers/crypto/qce/common.c
index 04253a8d33409a2a51db527435d09ae85a7880af..74756c222fed6d0298eb6c957ed15b8b7083b72f 100644
--- a/drivers/crypto/qce/common.c
+++ b/drivers/crypto/qce/common.c
@@ -593,3 +593,21 @@ void qce_get_version(struct qce_device *qce, u32 *major, u32 *minor, u32 *step)
*minor = (val & CORE_MINOR_REV_MASK) >> CORE_MINOR_REV_SHIFT;
*step = (val & CORE_STEP_REV_MASK) >> CORE_STEP_REV_SHIFT;
}
+
+int qce_bam_lock(struct qce_device *qce)
+{
+ qce_clear_bam_transaction(qce);
+ /* Dummy write to acquire the lock on the BAM pipe. */
+ qce_write(qce, REG_AUTH_SEG_CFG, 0);
+
+ return qce_submit_cmd_desc_lock(qce);
+}
+
+int qce_bam_unlock(struct qce_device *qce)
+{
+ qce_clear_bam_transaction(qce);
+ /* Dummy write to release the lock on the BAM pipe. */
+ qce_write(qce, REG_AUTH_SEG_CFG, 0);
+
+ return qce_submit_cmd_desc_unlock(qce);
+}
diff --git a/drivers/crypto/qce/dma.c b/drivers/crypto/qce/dma.c
index ba7a52fd4c6349d59c075c346f75741defeb6034..885053955ac3dc95efefef541907f57844b60a3d 100644
--- a/drivers/crypto/qce/dma.c
+++ b/drivers/crypto/qce/dma.c
@@ -41,7 +41,7 @@ void qce_clear_bam_transaction(struct qce_device *qce)
bam_txn->pre_bam_ce_idx = 0;
}
-int qce_submit_cmd_desc(struct qce_device *qce)
+static int qce_do_submit_cmd_desc(struct qce_device *qce, struct bam_desc_metadata *meta)
{
struct qce_desc_info *qce_desc = qce->dma.bam_txn->desc;
struct qce_bam_transaction *bam_txn = qce->dma.bam_txn;
@@ -50,7 +50,7 @@ int qce_submit_cmd_desc(struct qce_device *qce)
unsigned long attrs = DMA_PREP_CMD;
dma_cookie_t cookie;
unsigned int mapped;
- int ret;
+ int ret = -ENOMEM;
mapped = dma_map_sg_attrs(qce->dev, bam_txn->wr_sgl, bam_txn->wr_sgl_cnt,
DMA_TO_DEVICE, attrs);
@@ -59,9 +59,15 @@ int qce_submit_cmd_desc(struct qce_device *qce)
dma_desc = dmaengine_prep_slave_sg(chan, bam_txn->wr_sgl, bam_txn->wr_sgl_cnt,
DMA_MEM_TO_DEV, attrs);
- if (!dma_desc) {
- dma_unmap_sg(qce->dev, bam_txn->wr_sgl, bam_txn->wr_sgl_cnt, DMA_TO_DEVICE);
- return -ENOMEM;
+ if (!dma_desc)
+ goto err_out;
+
+ if (meta) {
+ meta->chan = chan;
+
+ ret = dmaengine_desc_attach_metadata(dma_desc, meta, 0);
+ if (ret)
+ goto err_out;
}
qce_desc->dma_desc = dma_desc;
@@ -74,6 +80,29 @@ int qce_submit_cmd_desc(struct qce_device *qce)
qce_dma_issue_pending(&qce->dma);
return 0;
+
+err_out:
+ dma_unmap_sg(qce->dev, bam_txn->wr_sgl, bam_txn->wr_sgl_cnt, DMA_TO_DEVICE);
+ return ret;
+}
+
+int qce_submit_cmd_desc(struct qce_device *qce)
+{
+ return qce_do_submit_cmd_desc(qce, NULL);
+}
+
+int qce_submit_cmd_desc_lock(struct qce_device *qce)
+{
+ struct bam_desc_metadata meta = { .op = BAM_META_CMD_LOCK, };
+
+ return qce_do_submit_cmd_desc(qce, &meta);
+}
+
+int qce_submit_cmd_desc_unlock(struct qce_device *qce)
+{
+ struct bam_desc_metadata meta = { .op = BAM_META_CMD_UNLOCK };
+
+ return qce_do_submit_cmd_desc(qce, &meta);
}
static void qce_prep_dma_cmd_desc(struct qce_device *qce, struct qce_dma_data *dma,
diff --git a/drivers/crypto/qce/dma.h b/drivers/crypto/qce/dma.h
index f05dfa9e6b25bd60e32f45079a8bc7e6a4cf81f9..4b3ee17db72e29b9f417994477ad8a0ec2294db1 100644
--- a/drivers/crypto/qce/dma.h
+++ b/drivers/crypto/qce/dma.h
@@ -47,6 +47,10 @@ qce_sgtable_add(struct sg_table *sgt, struct scatterlist *sg_add,
unsigned int max_len);
void qce_write_dma(struct qce_device *qce, unsigned int offset, u32 val);
int qce_submit_cmd_desc(struct qce_device *qce);
+int qce_submit_cmd_desc_lock(struct qce_device *qce);
+int qce_submit_cmd_desc_unlock(struct qce_device *qce);
void qce_clear_bam_transaction(struct qce_device *qce);
+int qce_bam_lock(struct qce_device *qce);
+int qce_bam_unlock(struct qce_device *qce);
#endif /* _DMA_H_ */
--
2.51.0
next prev parent reply other threads:[~2025-11-28 11:44 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-28 11:43 [PATCH v9 00/11] crypto/dmaengine: qce: introduce BAM locking and use DMA for register I/O Bartosz Golaszewski
2025-11-28 11:43 ` [PATCH v9 01/11] dmaengine: qcom: bam_dma: Extend the driver's device match data Bartosz Golaszewski
2025-11-28 11:44 ` [PATCH v9 02/11] dmaengine: qcom: bam_dma: Add bam_pipe_lock flag support Bartosz Golaszewski
2025-12-06 11:42 ` Dmitry Baryshkov
2025-11-28 11:44 ` [PATCH v9 03/11] dmaengine: qcom: bam_dma: implement support for BAM locking Bartosz Golaszewski
2025-12-06 11:44 ` Dmitry Baryshkov
2025-12-16 13:00 ` Vinod Koul
2025-12-16 15:00 ` Bartosz Golaszewski
2025-12-16 15:10 ` Vinod Koul
2025-12-17 14:31 ` Bartosz Golaszewski
2025-11-28 11:44 ` [PATCH v9 04/11] crypto: qce - Include algapi.h in the core.h header Bartosz Golaszewski
2025-11-28 11:44 ` [PATCH v9 05/11] crypto: qce - Remove unused ignore_buf Bartosz Golaszewski
2025-11-28 12:01 ` Konrad Dybcio
2025-11-28 12:05 ` Bartosz Golaszewski
2025-11-28 12:09 ` Konrad Dybcio
2025-11-28 11:44 ` [PATCH v9 06/11] crypto: qce - Simplify arguments of devm_qce_dma_request() Bartosz Golaszewski
2025-11-28 11:44 ` [PATCH v9 07/11] crypto: qce - Use existing devres APIs in devm_qce_dma_request() Bartosz Golaszewski
2025-11-28 12:03 ` Konrad Dybcio
2025-11-28 11:44 ` [PATCH v9 08/11] crypto: qce - Map crypto memory for DMA Bartosz Golaszewski
2025-11-28 11:44 ` [PATCH v9 09/11] crypto: qce - Add BAM DMA support for crypto register I/O Bartosz Golaszewski
2025-11-28 11:44 ` Bartosz Golaszewski [this message]
2025-12-01 13:03 ` [PATCH v9 10/11] crypto: qce - Add support for BAM locking Konrad Dybcio
2025-11-28 11:44 ` [PATCH v9 11/11] crypto: qce - Switch to using BAM DMA for crypto I/O Bartosz Golaszewski
2025-11-28 12:08 ` Konrad Dybcio
2025-11-28 12:11 ` Bartosz Golaszewski
2025-11-28 12:57 ` Konrad Dybcio
2025-12-06 11:45 ` Dmitry Baryshkov
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