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Fri, 28 Nov 2025 03:44:27 -0800 (PST) From: Bartosz Golaszewski Date: Fri, 28 Nov 2025 12:44:08 +0100 Subject: [PATCH v9 10/11] crypto: qce - Add support for BAM locking Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20251128-qcom-qce-cmd-descr-v9-10-9a5f72b89722@linaro.org> References: <20251128-qcom-qce-cmd-descr-v9-0-9a5f72b89722@linaro.org> In-Reply-To: <20251128-qcom-qce-cmd-descr-v9-0-9a5f72b89722@linaro.org> To: Vinod Koul , Jonathan Corbet , Thara Gopinath , Herbert Xu , "David S. Miller" , Udit Tiwari , Daniel Perez-Zoghbi , Md Sadre Alam , Dmitry Baryshkov Cc: dmaengine@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org, Bartosz Golaszewski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4359; i=bartosz.golaszewski@linaro.org; h=from:subject:message-id; bh=GYMvWd4G2OtMriFfOvACVEj/3rVgLKC4UYGoghgUhI0=; b=owEBbQKS/ZANAwAKAQWdLsv/NoTDAcsmYgBpKYsKPeo2cebRHz/smU6qyWPz+EA205XyjrMye TGvcJ4alE6JAjMEAAEKAB0WIQSR5RMt5bVGHXuiZfwFnS7L/zaEwwUCaSmLCgAKCRAFnS7L/zaE w78cEACGsGB8VrsYSRk7Htz+ngRasAWx7hSIWcx0SzmZX4Q/Ot0gNhZ0wxd6/HCKgDiZbKexEUI K+wir4BZdm0/TMOynQL10S47WqI42vcFqhst6dkQ7kJqLdmh9+cbCgO99RCT3MP6TUh8/b4hz9t ey5WqZkW1HXo682CydqukZ9DTzkV+Umzp/JnwPHDnjkOI9Bi9nFfED+1Mqcnf1K7ztlXNOlqoLL YrRtobLM5KqvGUFMEAoULNlubmv08Zt1GhsHT0TrY8aWVYJrvqSD1F0zSeySREivImmc9Qy3mKF USLEMI0TwWDm1Esj486MBOG+bVKKmH5xds+nMEoxaDiVtL9Kp95mPIbUk7rLMta1t2a7OXAGyP6 Cd+9JgU83Rj9enfAmR7encxpBwOgw4Ma0eN1eKCTpKvvR08uzQDhMgrmVYeX8IN2l2iY3wiseXb cYA+AekmsrClCitQIkP7zVSTQFXQvI2bmnb0kQuS5hHNAALI13TWYbt59K+doEMr6t4PLwnyUiu KETDzQNbN1dkIvhJ5rMhkQ+o/lrvy0KNDE/zwtusugIuyZR/iTIPJ8mizFuU2GZt3rBwuwMbxXy ZplfO9G1FRIcDRrVBv3DvbNfeXigSQvcjx1QF9pfXI+wvwhWCr2b44Hjh/OqezfcrLBBypdf64m 8vCsrZGFMr859wQ== X-Developer-Key: i=bartosz.golaszewski@linaro.org; a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski Implement the infrastructure for using the new DMA controller lock/unlock feature of the BAM driver. No functional change for now. Signed-off-by: Bartosz Golaszewski --- drivers/crypto/qce/common.c | 18 ++++++++++++++++++ drivers/crypto/qce/dma.c | 39 ++++++++++++++++++++++++++++++++++----- drivers/crypto/qce/dma.h | 4 ++++ 3 files changed, 56 insertions(+), 5 deletions(-) diff --git a/drivers/crypto/qce/common.c b/drivers/crypto/qce/common.c index 04253a8d33409a2a51db527435d09ae85a7880af..74756c222fed6d0298eb6c957ed15b8b7083b72f 100644 --- a/drivers/crypto/qce/common.c +++ b/drivers/crypto/qce/common.c @@ -593,3 +593,21 @@ void qce_get_version(struct qce_device *qce, u32 *major, u32 *minor, u32 *step) *minor = (val & CORE_MINOR_REV_MASK) >> CORE_MINOR_REV_SHIFT; *step = (val & CORE_STEP_REV_MASK) >> CORE_STEP_REV_SHIFT; } + +int qce_bam_lock(struct qce_device *qce) +{ + qce_clear_bam_transaction(qce); + /* Dummy write to acquire the lock on the BAM pipe. */ + qce_write(qce, REG_AUTH_SEG_CFG, 0); + + return qce_submit_cmd_desc_lock(qce); +} + +int qce_bam_unlock(struct qce_device *qce) +{ + qce_clear_bam_transaction(qce); + /* Dummy write to release the lock on the BAM pipe. */ + qce_write(qce, REG_AUTH_SEG_CFG, 0); + + return qce_submit_cmd_desc_unlock(qce); +} diff --git a/drivers/crypto/qce/dma.c b/drivers/crypto/qce/dma.c index ba7a52fd4c6349d59c075c346f75741defeb6034..885053955ac3dc95efefef541907f57844b60a3d 100644 --- a/drivers/crypto/qce/dma.c +++ b/drivers/crypto/qce/dma.c @@ -41,7 +41,7 @@ void qce_clear_bam_transaction(struct qce_device *qce) bam_txn->pre_bam_ce_idx = 0; } -int qce_submit_cmd_desc(struct qce_device *qce) +static int qce_do_submit_cmd_desc(struct qce_device *qce, struct bam_desc_metadata *meta) { struct qce_desc_info *qce_desc = qce->dma.bam_txn->desc; struct qce_bam_transaction *bam_txn = qce->dma.bam_txn; @@ -50,7 +50,7 @@ int qce_submit_cmd_desc(struct qce_device *qce) unsigned long attrs = DMA_PREP_CMD; dma_cookie_t cookie; unsigned int mapped; - int ret; + int ret = -ENOMEM; mapped = dma_map_sg_attrs(qce->dev, bam_txn->wr_sgl, bam_txn->wr_sgl_cnt, DMA_TO_DEVICE, attrs); @@ -59,9 +59,15 @@ int qce_submit_cmd_desc(struct qce_device *qce) dma_desc = dmaengine_prep_slave_sg(chan, bam_txn->wr_sgl, bam_txn->wr_sgl_cnt, DMA_MEM_TO_DEV, attrs); - if (!dma_desc) { - dma_unmap_sg(qce->dev, bam_txn->wr_sgl, bam_txn->wr_sgl_cnt, DMA_TO_DEVICE); - return -ENOMEM; + if (!dma_desc) + goto err_out; + + if (meta) { + meta->chan = chan; + + ret = dmaengine_desc_attach_metadata(dma_desc, meta, 0); + if (ret) + goto err_out; } qce_desc->dma_desc = dma_desc; @@ -74,6 +80,29 @@ int qce_submit_cmd_desc(struct qce_device *qce) qce_dma_issue_pending(&qce->dma); return 0; + +err_out: + dma_unmap_sg(qce->dev, bam_txn->wr_sgl, bam_txn->wr_sgl_cnt, DMA_TO_DEVICE); + return ret; +} + +int qce_submit_cmd_desc(struct qce_device *qce) +{ + return qce_do_submit_cmd_desc(qce, NULL); +} + +int qce_submit_cmd_desc_lock(struct qce_device *qce) +{ + struct bam_desc_metadata meta = { .op = BAM_META_CMD_LOCK, }; + + return qce_do_submit_cmd_desc(qce, &meta); +} + +int qce_submit_cmd_desc_unlock(struct qce_device *qce) +{ + struct bam_desc_metadata meta = { .op = BAM_META_CMD_UNLOCK }; + + return qce_do_submit_cmd_desc(qce, &meta); } static void qce_prep_dma_cmd_desc(struct qce_device *qce, struct qce_dma_data *dma, diff --git a/drivers/crypto/qce/dma.h b/drivers/crypto/qce/dma.h index f05dfa9e6b25bd60e32f45079a8bc7e6a4cf81f9..4b3ee17db72e29b9f417994477ad8a0ec2294db1 100644 --- a/drivers/crypto/qce/dma.h +++ b/drivers/crypto/qce/dma.h @@ -47,6 +47,10 @@ qce_sgtable_add(struct sg_table *sgt, struct scatterlist *sg_add, unsigned int max_len); void qce_write_dma(struct qce_device *qce, unsigned int offset, u32 val); int qce_submit_cmd_desc(struct qce_device *qce); +int qce_submit_cmd_desc_lock(struct qce_device *qce); +int qce_submit_cmd_desc_unlock(struct qce_device *qce); void qce_clear_bam_transaction(struct qce_device *qce); +int qce_bam_lock(struct qce_device *qce); +int qce_bam_unlock(struct qce_device *qce); #endif /* _DMA_H_ */ -- 2.51.0