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Fri, 28 Nov 2025 03:44:23 -0800 (PST) From: Bartosz Golaszewski Date: Fri, 28 Nov 2025 12:44:06 +0100 Subject: [PATCH v9 08/11] crypto: qce - Map crypto memory for DMA Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20251128-qcom-qce-cmd-descr-v9-8-9a5f72b89722@linaro.org> References: <20251128-qcom-qce-cmd-descr-v9-0-9a5f72b89722@linaro.org> In-Reply-To: <20251128-qcom-qce-cmd-descr-v9-0-9a5f72b89722@linaro.org> To: Vinod Koul , Jonathan Corbet , Thara Gopinath , Herbert Xu , "David S. Miller" , Udit Tiwari , Daniel Perez-Zoghbi , Md Sadre Alam , Dmitry Baryshkov Cc: dmaengine@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org, Bartosz Golaszewski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3084; i=bartosz.golaszewski@linaro.org; h=from:subject:message-id; bh=Y7Zq3m7ZDk1j81mFJRjZnJPSUKI9CxqNE4sy8coRQ28=; b=owEBbQKS/ZANAwAKAQWdLsv/NoTDAcsmYgBpKYsJ9Hr9P0P/w6D7i6D7Q5ICQn3DGaJjvkNV5 Jlv6XQErV2JAjMEAAEKAB0WIQSR5RMt5bVGHXuiZfwFnS7L/zaEwwUCaSmLCQAKCRAFnS7L/zaE w+wYD/98jkhzq4pvermrohP+/8Osr2vJf2aNYrttJVI6X5gKtxQB8Qp0iS9e3HRGKBNUx7j4EdM 9gmBANZFdZ1tV4t/gN/gWV5jwLsbwiEz/oEs4bLNawlPZoHLk6CKcEa6jXxfOQd4wrc8dIkTf6e xu9xRozw1A3za4JaO771zSuZx6se/RMmMkqnTj0NmhFRbOOFahxD9dQLPNb8g55A/tnIaOLBs3W trGwgIbZdyV7C6nIh1hc2WM9unq0dnGKhkWSH9Hv9gGx5zkfRsxVVq7rysCDyNJZtOyNG3hYH1g GYfi0Tucn2n30UMk8fjdx8RFXylsB4FnT9b7+JadJlgEgxe5uHbERZ68n1Bz1UW0LrpGovDUTeZ eJ1ekLpG+JdKkcqrya4c93/7w5vL2yeuNeN94RYXLaZ+rTWEayc0rIifDWQe4JwwMJ/Yv1tHUSl x2Qbg2m009Xw++F6DcNn4fVj1k1C08c5QsSPn7cAV+41qusFfLF0FEe07ifqiQpnIao12C1sFT3 RsfXuT5GVCt7T65xutcQakbHaFwXFQDm3ChGe5NKnaAW7ca2Dr9eusA9WHDyPbIx+uG6aGZtUqY tg8RZrpPlczJLrD9cdkF4/Md4X55/0YRffmZlvmm2yYlB6DaSVAH6p1wNo3bkeG4bV/p8aMsssJ FGGzypi5XRKumfw== X-Developer-Key: i=bartosz.golaszewski@linaro.org; a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski As the first step in converting the driver to using DMA for register I/O, let's map the crypto memory range. Signed-off-by: Bartosz Golaszewski --- drivers/crypto/qce/core.c | 25 +++++++++++++++++++++++-- drivers/crypto/qce/core.h | 6 ++++++ 2 files changed, 29 insertions(+), 2 deletions(-) diff --git a/drivers/crypto/qce/core.c b/drivers/crypto/qce/core.c index 8b7bcd0c420c45caf8b29e5455e0f384fd5c5616..2667fcd67fee826a44080da8f88a3e2abbb9b2cf 100644 --- a/drivers/crypto/qce/core.c +++ b/drivers/crypto/qce/core.c @@ -185,10 +185,19 @@ static int qce_check_version(struct qce_device *qce) return 0; } +static void qce_crypto_unmap_dma(void *data) +{ + struct qce_device *qce = data; + + dma_unmap_resource(qce->dev, qce->base_dma, qce->dma_size, + DMA_BIDIRECTIONAL, 0); +} + static int qce_crypto_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct qce_device *qce; + struct resource *res; int ret; qce = devm_kzalloc(dev, sizeof(*qce), GFP_KERNEL); @@ -198,7 +207,7 @@ static int qce_crypto_probe(struct platform_device *pdev) qce->dev = dev; platform_set_drvdata(pdev, qce); - qce->base = devm_platform_ioremap_resource(pdev, 0); + qce->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(qce->base)) return PTR_ERR(qce->base); @@ -244,7 +253,19 @@ static int qce_crypto_probe(struct platform_device *pdev) qce->async_req_enqueue = qce_async_request_enqueue; qce->async_req_done = qce_async_request_done; - return devm_qce_register_algs(qce); + ret = devm_qce_register_algs(qce); + if (ret) + return ret; + + qce->dma_size = resource_size(res); + qce->base_dma = dma_map_resource(dev, res->start, qce->dma_size, + DMA_BIDIRECTIONAL, 0); + qce->base_phys = res->start; + ret = dma_mapping_error(dev, qce->base_dma); + if (ret) + return ret; + + return devm_add_action_or_reset(qce->dev, qce_crypto_unmap_dma, qce); } static const struct of_device_id qce_crypto_of_match[] = { diff --git a/drivers/crypto/qce/core.h b/drivers/crypto/qce/core.h index f092ce2d3b04a936a37805c20ac5ba78d8fdd2df..a80e12eac6c87e5321cce16c56a4bf5003474ef0 100644 --- a/drivers/crypto/qce/core.h +++ b/drivers/crypto/qce/core.h @@ -27,6 +27,9 @@ * @dma: pointer to dma data * @burst_size: the crypto burst size * @pipe_pair_id: which pipe pair id the device using + * @base_dma: base DMA address + * @base_phys: base physical address + * @dma_size: size of memory mapped for DMA * @async_req_enqueue: invoked by every algorithm to enqueue a request * @async_req_done: invoked by every algorithm to finish its request */ @@ -43,6 +46,9 @@ struct qce_device { struct qce_dma_data dma; int burst_size; unsigned int pipe_pair_id; + dma_addr_t base_dma; + phys_addr_t base_phys; + size_t dma_size; int (*async_req_enqueue)(struct qce_device *qce, struct crypto_async_request *req); void (*async_req_done)(struct qce_device *qce, int ret); -- 2.51.0