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From: Xiangxu Yin via B4 Relay <devnull+xiangxu.yin.oss.qualcomm.com@kernel.org>
To: Vinod Koul <vkoul@kernel.org>,
	 Neil Armstrong <neil.armstrong@linaro.org>,
	Rob Herring <robh@kernel.org>,
	 Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
	 devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	 fange.zhang@oss.qualcomm.com, yongxing.mou@oss.qualcomm.com,
	 li.liu@oss.qualcomm.com, tingwei.zhang@oss.qualcomm.com,
	 Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
	 Bjorn Andersson <andersson@kernel.org>,
	 Konrad Dybcio <konradybcio@kernel.org>,
	 Xiangxu Yin <xiangxu.yin@oss.qualcomm.com>
Subject: [PATCH v8 03/12] phy: qcom: qmp-usbc: Add DP-related fields for USB/DP switchable PHY
Date: Mon, 15 Dec 2025 20:41:59 +0800	[thread overview]
Message-ID: <20251215-add-displayport-support-for-qcs615-platform-v8-3-cbc72c88a44e@oss.qualcomm.com> (raw)
In-Reply-To: <20251215-add-displayport-support-for-qcs615-platform-v8-0-cbc72c88a44e@oss.qualcomm.com>

From: Xiangxu Yin <xiangxu.yin@oss.qualcomm.com>

Extend qmp_usbc_offsets and qmp_phy_cfg with DP-specific fields,
including register offsets, init tables, and callback hooks. Also
update qmp_usbc struct to track DP-related resources and state.
This enables support for USB/DP switchable Type-C PHYs that operate
in either mode.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Xiangxu Yin <xiangxu.yin@oss.qualcomm.com>
---
 drivers/phy/qualcomm/phy-qcom-qmp-usbc.c | 54 +++++++++++++++++++++++++++-----
 1 file changed, 46 insertions(+), 8 deletions(-)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c b/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c
index 62920dd2aed3..de28c3464a40 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c
@@ -293,13 +293,18 @@ struct qmp_usbc_offsets {
 	/* for PHYs with >= 2 lanes */
 	u16 tx2;
 	u16 rx2;
+
+	u16 dp_serdes;
+	u16 dp_txa;
+	u16 dp_txb;
+	u16 dp_dp_phy;
 };
 
-/* struct qmp_phy_cfg - per-PHY initialization config */
+struct qmp_usbc;
 struct qmp_phy_cfg {
 	const struct qmp_usbc_offsets *offsets;
 
-	/* Init sequence for PHY blocks - serdes, tx, rx, pcs */
+	/* Init sequence for USB PHY blocks - serdes, tx, rx, pcs */
 	const struct qmp_phy_init_tbl *serdes_tbl;
 	int serdes_tbl_num;
 	const struct qmp_phy_init_tbl *tx_tbl;
@@ -309,6 +314,27 @@ struct qmp_phy_cfg {
 	const struct qmp_phy_init_tbl *pcs_tbl;
 	int pcs_tbl_num;
 
+	/* Init sequence for DP PHY blocks - serdes, tx, rbr, hbr, hbr2 */
+	const struct qmp_phy_init_tbl *dp_serdes_tbl;
+	int dp_serdes_tbl_num;
+	const struct qmp_phy_init_tbl *dp_tx_tbl;
+	int dp_tx_tbl_num;
+	const struct qmp_phy_init_tbl *serdes_tbl_rbr;
+	int serdes_tbl_rbr_num;
+	const struct qmp_phy_init_tbl *serdes_tbl_hbr;
+	int serdes_tbl_hbr_num;
+	const struct qmp_phy_init_tbl *serdes_tbl_hbr2;
+	int serdes_tbl_hbr2_num;
+
+	const u8 (*swing_tbl)[4][4];
+	const u8 (*pre_emphasis_tbl)[4][4];
+
+	/* DP PHY callbacks */
+	void (*dp_aux_init)(struct qmp_usbc *qmp);
+	void (*configure_dp_tx)(struct qmp_usbc *qmp);
+	int (*configure_dp_phy)(struct qmp_usbc *qmp);
+	int (*calibrate_dp_phy)(struct qmp_usbc *qmp);
+
 	/* regulators to be requested */
 	const char * const *vreg_list;
 	int num_vregs;
@@ -329,24 +355,36 @@ struct qmp_usbc {
 	void __iomem *rx;
 	void __iomem *tx2;
 	void __iomem *rx2;
-
-	struct regmap *tcsr_map;
-	u32 vls_clamp_reg;
+	void __iomem *dp_dp_phy;
+	void __iomem *dp_tx;
+	void __iomem *dp_tx2;
+	void __iomem *dp_serdes;
 
 	struct clk *pipe_clk;
+	struct clk_fixed_rate pipe_clk_fixed;
+
+	struct clk_hw dp_link_hw;
+	struct clk_hw dp_pixel_hw;
 	struct clk_bulk_data *clks;
 	int num_clks;
 	int num_resets;
 	struct reset_control_bulk_data *resets;
 	struct regulator_bulk_data *vregs;
 
+	struct regmap *tcsr_map;
+	u32 vls_clamp_reg;
+	u32 dp_phy_mode_reg;
+
 	struct mutex phy_mutex;
 
 	struct phy *usb_phy;
 	enum phy_mode mode;
 	unsigned int usb_init_count;
 
-	struct clk_fixed_rate pipe_clk_fixed;
+	struct phy *dp_phy;
+	unsigned int dp_aux_cfg;
+	struct phy_configure_opts_dp dp_opts;
+	unsigned int dp_init_count;
 
 	struct typec_switch_dev *sw;
 	enum typec_orientation orientation;
@@ -689,7 +727,7 @@ static int __maybe_unused qmp_usbc_runtime_suspend(struct device *dev)
 
 	dev_vdbg(dev, "Suspending QMP phy, mode:%d\n", qmp->mode);
 
-	if (!qmp->usb_init_count) {
+	if (!qmp->usb_init_count && !qmp->dp_init_count) {
 		dev_vdbg(dev, "PHY not initialized, bailing out\n");
 		return 0;
 	}
@@ -709,7 +747,7 @@ static int __maybe_unused qmp_usbc_runtime_resume(struct device *dev)
 
 	dev_vdbg(dev, "Resuming QMP phy, mode:%d\n", qmp->mode);
 
-	if (!qmp->usb_init_count) {
+	if (!qmp->usb_init_count && !qmp->dp_init_count) {
 		dev_vdbg(dev, "PHY not initialized, bailing out\n");
 		return 0;
 	}

-- 
2.34.1



  parent reply	other threads:[~2025-12-15 12:42 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-15 12:41 [PATCH v8 00/12] Add DisplayPort support for QCS615 platform Xiangxu Yin via B4 Relay
2025-12-15 12:41 ` [PATCH v8 01/12] dt-bindings: phy: Add QMP USB3+DP PHY for QCS615 Xiangxu Yin via B4 Relay
2025-12-15 12:41 ` [PATCH v8 02/12] phy: qcom: qmp-usbc: Rename USB-specific ops to prepare for DP support Xiangxu Yin via B4 Relay
2025-12-15 12:41 ` Xiangxu Yin via B4 Relay [this message]
2025-12-15 12:42 ` [PATCH v8 04/12] phy: qcom: qmp-usbc: Add regulator init_load support Xiangxu Yin via B4 Relay
2025-12-15 12:42 ` [PATCH v8 05/12] phy: qcom: qmp-usbc: Move reset config into PHY cfg Xiangxu Yin via B4 Relay
2025-12-15 12:42 ` [PATCH v8 06/12] phy: qcom: qmp-usbc: add DP link and vco_div clocks for DP PHY Xiangxu Yin via B4 Relay
2025-12-15 12:42 ` [PATCH v8 07/12] phy: qcom: qmp-usbc: Move USB-only init to usb_power_on Xiangxu Yin via B4 Relay
2025-12-15 12:42 ` [PATCH v8 08/12] phy: qcom: qmp-usbc: Add TCSR parsing and PHY mode setting Xiangxu Yin via B4 Relay
2025-12-15 12:42 ` [PATCH v8 09/12] phy: qcom: qmp-usbc: Add DP PHY ops for USB/DP switchable Type-C PHYs Xiangxu Yin via B4 Relay
2025-12-15 12:42 ` [PATCH v8 10/12] phy: qcom: qmp-usbc: Add USB/DP exclude handling Xiangxu Yin via B4 Relay
2025-12-15 12:42 ` [PATCH v8 11/12] phy: qcom: qmp: Add DP v2 PHY register definitions Xiangxu Yin via B4 Relay
2025-12-15 12:42 ` [PATCH v8 12/12] phy: qcom: qmp-usbc: Add QCS615 USB/DP PHY config and DP mode support Xiangxu Yin via B4 Relay

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