From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 32C171FB1; Fri, 26 Dec 2025 21:25:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766784331; cv=none; b=GBMrRTnPMLFNhW1FhfT1EJczpOEfVVmeJASySkA701T+q0h5p0Ih2BabwHBHNSTNA/WSHaw+TaqyMnV6wQJb8UAbUF+HoJ0wTtRis+3ShaOlt3ukT8F5MELeKsyLYFX/u2TCiRC9ihWxMk5dV/Q9gz7Pbb4FEFStCT/OJkkp3B4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766784331; c=relaxed/simple; bh=fuWgL3fSoUo1zmnsTOm9SMRw02AyD/UrzLpmlKJQuck=; h=Date:From:To:Cc:Subject:Message-ID:MIME-Version:Content-Type: Content-Disposition:In-Reply-To; b=ert3G9OCJUzAQGDzaZeGQDBFAhe852ykP+fUXl6kZqRJ1x4kKQxnSK3/SzxzDeuIWf8OujHrzGYvxhZW4Yeir0uraDz/Omg4M/6PshBjo1b78QUXcW95KOtrqkscuwePj0K4zY7ImdMgWR38hdTO8B0WbZ9bj40b5/3nOZrhnyk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=lLf560TN; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="lLf560TN" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 97627C4CEF7; Fri, 26 Dec 2025 21:25:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1766784330; bh=fuWgL3fSoUo1zmnsTOm9SMRw02AyD/UrzLpmlKJQuck=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=lLf560TN31/BTOsy8y2WDhhYT7OPvUF4uncLnel9YRftqG432y3oMFwDb2IpRkxN3 jU+Af2Ybkb5/tuVIO2Syvfc4FmKQMb9YgRBkBz8A0bzW4aiAVJqadvP8zk7sURsFdq 9H6QRDzmEtDhaCqNd5QV0tLlmYc3UCUnzVr10Ose4WBJ3Y3pPdqXm6R5O13/a2MM4E zjbsHeMoRX6f5Wq3b8rFEOXOqGc+bsufDN0sw/HX6dyFrzRngurTSRvr73Az6LgKOw K0fHIKD8/Jm840lIFcS8btD1QAYXSzCboBdKHm5WNI3rTPHkEsoWgdGUOnqEF5b8kC 8LPOS/Px9h9jA== Date: Fri, 26 Dec 2025 15:25:29 -0600 From: Bjorn Helgaas To: Manivannan Sadhasivam Cc: Shawn Lin , Qiang Yu , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Jingoo Han , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: Re: [PATCH 3/5] PCI: dwc: Remove MSI/MSIX capability if iMSI-RX is used as MSI controller Message-ID: <20251226212529.GA4142038@bhelgaas> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <7d4xj3tguhf6yodhhwnsqp5s4gvxxtmrovzwhzhrvozhkidod7@j4w2nexd5je2> On Thu, Nov 20, 2025 at 10:30:41PM +0530, Manivannan Sadhasivam wrote: > On Thu, Nov 20, 2025 at 10:06:03PM +0800, Shawn Lin wrote: > > 在 2025/11/10 星期一 14:59, Qiang Yu 写道: > > > Some platforms may not support ITS (Interrupt Translation Service) and > > > MBI (Message Based Interrupt), or there are not enough available empty SPI > > > lines for MBI, in which case the msi-map and msi-parent property will not > > > be provided in device tree node. For those cases, the DWC PCIe driver > > > defaults to using the iMSI-RX module as MSI controller. However, due to > > > DWC IP design, iMSI-RX cannot generate MSI interrupts for Root Ports even > > > when MSI is properly configured and supported as iMSI-RX will only monitor > > > and intercept incoming MSI TLPs from PCIe link, but the memory write > > > generated by Root Port are internal system bus transactions instead of > > > PCIe TLPs, so they are ignored. > > > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c > > > @@ -1083,6 +1083,16 @@ int dw_pcie_setup_rc(struct dw_pcie_rp *pp) > > > dw_pcie_dbi_ro_wr_dis(pci); > > > + /* > > > + * If iMSI-RX module is used as the MSI controller, remove MSI and > > > + * MSI-X capabilities from PCIe Root Ports to ensure fallback to INTx > > > + * interrupt handling. > > > + */ > > > + if (pp->has_msi_ctrl) { > > > > Isn't has_msi_ctrl means you have something like GIC-ITS > > support instead of iMSI module? Am I missing anything? > > It is the other way around. Presence of this flag means, iMSI-RX is > used. But I think the driver should clear the CAPs irrespective of > this flag. I didn't see any response to this. Is there a case where we want to preserve these capabilities? To ask another way, is there some platform where DWC-based Root Ports can generate MSIs themselves? > > > + dw_pcie_remove_capability(pci, PCI_CAP_ID_MSI); > > > + dw_pcie_remove_capability(pci, PCI_CAP_ID_MSIX);