From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9C0D72F25F8 for ; Fri, 9 Jan 2026 07:42:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767944580; cv=none; b=KN9OnpGkoTjb9eG5enK0TOBy4II86MGvVQIcsq7sgqakBZ1rDC6yWqpSWfyCWi1wkUNej4Ejk2Dk0Q6wv6zOUp1sWKRM6HyV40Kq6gMbxLrmvVs3D/Nl2cfJ5jWXtiCkKv5Y+AjQhTSerYFeSpWrBX6oEKMd8twDjYvUsLCXHmA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767944580; c=relaxed/simple; bh=ovCd+BJVw33SRcliQOTYvJweZC+sOqoqhfpnnO9imNQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Tafttt6gTcqJYI8zCd4kpwVoDfZv4a7WOmtDAIcmsuZPfxqR3tU6n5Ed30fvqqIIDwN+Y7PG/p8my5iRDUm7mplCWtRh4ZLw/+B7NwaWPlqMN+fkAnlGrGJF1RqovSCq7Y0AmMJM5qQIQL6raUvVMmYm+wHjSDS3UZCjhRj30rs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=FHzceKYF; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=iWrF2HdJ; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="FHzceKYF"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="iWrF2HdJ" Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 609602kg3142710 for ; Fri, 9 Jan 2026 07:42:56 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= JvP/B1mWLYKn1oaayhp9bETG3NQ3SXdNR2NSJ4KEGg0=; b=FHzceKYFtnvU9fYc gqf4+i4OPse8TxatcO7nNXzYcGJ6mk23KEcUFBYab68yNlXiGkKmd5Rum46XWqNK q8ZGwCsIv1yXSEaCBRXkd80IaYP6sHi7l0k3pMVRPbZ6gHaEd1W1VSit1Mz8CS8n nX0hxSgI6xu1/5BUoXSftSzNgQRnKku2WReTViFsATHWeqIQ1H1fFzjWlTfqU9td OpjJ+9JVkkpWyMwsbzsuF4O/98D6aJ4YGMPQV3ew4sKR+RLLcNtkgSu4O842Or48 GXlkG6KbWpZezd/0vBIRdFilJ5Pi6Y8t3C3mnYQQ7kyXxh+teBs3xkP2GEb1YziT UJECog== Received: from mail-pl1-f200.google.com (mail-pl1-f200.google.com [209.85.214.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4bjj8j1sat-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Fri, 09 Jan 2026 07:42:56 +0000 (GMT) Received: by mail-pl1-f200.google.com with SMTP id d9443c01a7336-29f25e494c2so32469015ad.0 for ; Thu, 08 Jan 2026 23:42:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1767944575; x=1768549375; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=JvP/B1mWLYKn1oaayhp9bETG3NQ3SXdNR2NSJ4KEGg0=; b=iWrF2HdJxQNtcCZ0Mlx8hqJEdcnNBu6IvC7iFFsPXY4d7kRcfnUplJp5t5LmG9eqZ4 zpmqfAnfmkJYjvCLQR6slgS8jkdVgZCgDO3YChIbnZrPg+HWhEFzWxnap51u2QE33GVF qOR/I+YsJYeUuvNJPgvuzhKbEF0g9VvMQKLhqpmaZHKJRLcB2MhQhvLLzqrMUXTY1tOk Fvr67ALRn5EbqoLTE0Q2mDcnrWPmXHYnaQYk40N3Xy4RwaqphXzDWAYuTZPdFfS8MFZC wEwB37ZAB1lO4ibVMvDzg9Y97tuk1DszemEUVfkBpTzm49VWZM+yGTDBsvcA7ZKXfv2D XgaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1767944575; x=1768549375; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=JvP/B1mWLYKn1oaayhp9bETG3NQ3SXdNR2NSJ4KEGg0=; b=nTFQEFn+SpuUBkGqpqEhlmorXvU0WBjcYGAWtTZrf6KOE5aNs+0+JFekWa200P25Gv +rwJlgjCzC24fHRE/IctyklWoHP8kgW1IpRpzyGJgqVVAhoEV8xdHpzpU2Bi++cZOqZ9 /oL+KnNfbkpsmqPlBE7V243JpzvjdSJRQHkG8zr5AQiw26gXoJDsBREcncbL3Vc8BzFm hdQYGZGOLRRi3WMrvM/G9O3eMK3+lk/lgdAKN5oRLf5XUkjvAqopTXgoQQTRELQT5qeH i56HRma54QOzaDwjTJe+G1QIsxeuCxspvCwH6ihp18dGUUDLDlCClss/RZl+sr674q40 rHdg== X-Forwarded-Encrypted: i=1; AJvYcCVZttLdE/zXHrLrs3fSpl4venQ7dO0vXy+ueRh6fAKCf3owBC/6dULLm3fY9oLuCU9arldx8muKwLviUmxR@vger.kernel.org X-Gm-Message-State: AOJu0YzHwRJGBvdJzmzIvKbo3Zz0kOk41FdVjD5viEQ0YQQpcszXvQAd mB5lLyOd9d1uOUU40FMWCPZu5yG9FqrAkgznKOGvEbQbMTiUWdbabrBDPIc4Amo4VAR8G0y2POw PhVXzVqENQL3GEuSyHWt8Cf5CJYXbK6Ffqyz7+dF11Udw8UAA/RQ5X62UlwMtJHde9gRf X-Gm-Gg: AY/fxX5EKP+Lj4yBmeNM/e1qnZrl6jRSaHDg7gT52OeIqDOWvFFeKKNxT4GFVVteJ0d oBvJUxzEczfh99aF2Sb7oIdIswUw+hHIV6XmnDKc4SPjazE/+RZMNuG508qKTBCRofHcIFCsFvc 4fneeFWQJu2FqJgWqM+6lPdkpAL8rSLmSJLY06r3qtoD1Bhxa96n11VRKcW8rR595b9b7ad7P2u PBrS5M6Ai4eHKY1WebOa1Si03fejCIEQDuR+lcorI8aTyJ4OMmMyLDzixXgPp1bWat5LGiH+Of1 pSonzxX/9RuMqmmvGXHRlLvdzxFW2+xyL2CUhShnqua1XRfabOs8cObtqvJR68V9881OjwKOYir hIF9QVKeXqGaYckbILwO07o/tGZO0r6w72QuwgVZtcRlVmrB1a0nexBWtKfHmXWRUHjHeOK0ZFn 8q4t3QObRY X-Received: by 2002:a17:902:ce8d:b0:2a0:906b:db3e with SMTP id d9443c01a7336-2a3e39fd2f9mr119855195ad.27.1767944574375; Thu, 08 Jan 2026 23:42:54 -0800 (PST) X-Google-Smtp-Source: AGHT+IHshcdK4ofVeshwrpU3y4fAL+QMGX449bzMUZnTjaxiKf4+fPAJOdzKdETyIc17EGFWGex/Aw== X-Received: by 2002:a17:902:ce8d:b0:2a0:906b:db3e with SMTP id d9443c01a7336-2a3e39fd2f9mr119854885ad.27.1767944573795; Thu, 08 Jan 2026 23:42:53 -0800 (PST) Received: from WANGAOW-LAB01.ap.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com. [103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2a3e3cd46a9sm98638195ad.93.2026.01.08.23.42.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Jan 2026 23:42:53 -0800 (PST) From: Wangao Wang Date: Fri, 09 Jan 2026 15:42:31 +0800 Subject: [PATCH v3 2/6] media: qcom: iris: Add Long-Term Reference support for encoder Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260109-batch2_iris_encoder_enhancements-v3-2-196855ef32ba@oss.qualcomm.com> References: <20260109-batch2_iris_encoder_enhancements-v3-0-196855ef32ba@oss.qualcomm.com> In-Reply-To: <20260109-batch2_iris_encoder_enhancements-v3-0-196855ef32ba@oss.qualcomm.com> To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab Cc: quic_qiweil@quicinc.com, Renjiang Han , Wangao Wang , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1767944563; l=16334; i=wangao.wang@oss.qualcomm.com; s=20251021; h=from:subject:message-id; bh=ovCd+BJVw33SRcliQOTYvJweZC+sOqoqhfpnnO9imNQ=; b=q3rddHX0Zn0sh9PC5WajodCLu1WuzYLBu0mRfFNzukxneSzeeIIURygXLHgGuqjB8PsSG8s5Q Ys0r2E4QP2ACeC2HoPrAQrzVMMUg5SUOBC6Pv9shVl4ZD6lt9nDIn0O X-Developer-Key: i=wangao.wang@oss.qualcomm.com; a=ed25519; pk=bUPgYblBUAsoPyGfssbNR7ZXUSGF8v1VF4FJzSO6/aA= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTA5MDA1MyBTYWx0ZWRfX8ioV2uwSym/f MzTD8jLiR8FiW6GhYwpu5he3RvnNYyjTwr83+CA8KbEgMGRGJbwlx6sju/JZ+hGAm8OQBSMXTQz S5eHZCzha5hu8xKAf2Hm4CJVp4ZYdXZZBqd5L0uxQASpX3BbdxCQC+D3YEn+K2eGYtDFT1AZSXX qymf9CyGhhLkVO2hsGJEPI+u78jbgC+ztYeed3v92mZESlf/r9WdaapJswkWNsU1Y6QVSI4kcwp gXQI/VRxViYSrRhlrvEgeKJpRFihwjAdOJvwG7o1YQoYnNIledfRfmJkAvxioBiiwg50qHMGk2Q xkvJ6LxoXOHOzI3ZIxZCYG4of1s3vox65udl8T/0UCphv9jLT5M1N7Kfd7gv6v7yCGmiAaYoTBG +mFakud46tFGKY1hLTsRCugk5V7XtdHvg22YIqIvlIC+r1NpqUSfuzIlw8rUzbjHO7MPgQHy2Fb za+splu1YjEdbIM5Iaw== X-Authority-Analysis: v=2.4 cv=JIs2csKb c=1 sm=1 tr=0 ts=6960b180 cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=QunbDvX0_-zBgmAapgUA:9 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-GUID: OcYC85L8KdqvHOem8szI68FgUOb1FEIb X-Proofpoint-ORIG-GUID: OcYC85L8KdqvHOem8szI68FgUOb1FEIb X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2026-01-09_02,2026-01-08_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 suspectscore=0 priorityscore=1501 lowpriorityscore=0 impostorscore=0 bulkscore=0 adultscore=0 spamscore=0 clxscore=1015 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2601090053 Add Long-Term Reference(LTR) frame support for both gen1 and gen2 encoders by enabling the following V4L2 controls: V4L2_CID_MPEG_VIDEO_LTR_COUNT V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX Reviewed-by: Dikshita Agarwal Signed-off-by: Wangao Wang --- drivers/media/platform/qcom/iris/iris_ctrls.c | 128 +++++++++++++++++++++ drivers/media/platform/qcom/iris/iris_ctrls.h | 5 + .../platform/qcom/iris/iris_hfi_gen1_command.c | 25 ++++ .../platform/qcom/iris/iris_hfi_gen1_defines.h | 24 ++++ .../platform/qcom/iris/iris_hfi_gen2_defines.h | 3 + .../platform/qcom/iris/iris_platform_common.h | 6 + .../media/platform/qcom/iris/iris_platform_gen1.c | 30 +++++ .../media/platform/qcom/iris/iris_platform_gen2.c | 30 +++++ drivers/media/platform/qcom/iris/iris_vpu_buffer.c | 20 +++- 9 files changed, 267 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.c b/drivers/media/platform/qcom/iris/iris_ctrls.c index eae4fedc929e980eb001a5a6625159958d53a3d1..428203af725ab5697ee42b5adf9557c65fafd7f4 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.c +++ b/drivers/media/platform/qcom/iris/iris_ctrls.c @@ -108,6 +108,12 @@ static enum platform_inst_fw_cap_type iris_get_cap_id(u32 id) return IR_TYPE; case V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD: return IR_PERIOD; + case V4L2_CID_MPEG_VIDEO_LTR_COUNT: + return LTR_COUNT; + case V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES: + return USE_LTR; + case V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX: + return MARK_LTR; default: return INST_FW_CAP_MAX; } @@ -205,6 +211,12 @@ static u32 iris_get_v4l2_id(enum platform_inst_fw_cap_type cap_id) return V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE; case IR_PERIOD: return V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD; + case LTR_COUNT: + return V4L2_CID_MPEG_VIDEO_LTR_COUNT; + case USE_LTR: + return V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES; + case MARK_LTR: + return V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX; default: return 0; } @@ -1025,6 +1037,122 @@ int iris_set_ir_period_gen2(struct iris_inst *inst, enum platform_inst_fw_cap_ty &ir_period, sizeof(u32)); } +int iris_set_ltr_count_gen1(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id) +{ + const struct iris_hfi_command_ops *hfi_ops = inst->core->hfi_ops; + u32 ltr_count = inst->fw_caps[cap_id].value; + u32 hfi_id = inst->fw_caps[cap_id].hfi_id; + struct hfi_ltr_mode ltr_mode; + + if (!ltr_count) + return -EINVAL; + + ltr_mode.count = ltr_count; + ltr_mode.mode = HFI_LTR_MODE_MANUAL; + ltr_mode.trust_mode = 1; + + return hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_STRUCTURE, + <r_mode, sizeof(ltr_mode)); +} + +int iris_set_use_ltr(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id) +{ + const struct iris_hfi_command_ops *hfi_ops = inst->core->hfi_ops; + struct vb2_queue *sq = v4l2_m2m_get_src_vq(inst->m2m_ctx); + struct vb2_queue *dq = v4l2_m2m_get_dst_vq(inst->m2m_ctx); + u32 ltr_count = inst->fw_caps[LTR_COUNT].value; + u32 hfi_id = inst->fw_caps[cap_id].hfi_id; + struct hfi_ltr_use ltr_use; + + if (!vb2_is_streaming(sq) && !vb2_is_streaming(dq)) + return -EINVAL; + + if (!ltr_count) + return -EINVAL; + + ltr_use.ref_ltr = inst->fw_caps[cap_id].value; + ltr_use.use_constrnt = true; + ltr_use.frames = 0; + + return hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_STRUCTURE, + <r_use, sizeof(ltr_use)); +} + +int iris_set_mark_ltr(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id) +{ + const struct iris_hfi_command_ops *hfi_ops = inst->core->hfi_ops; + struct vb2_queue *sq = v4l2_m2m_get_src_vq(inst->m2m_ctx); + struct vb2_queue *dq = v4l2_m2m_get_dst_vq(inst->m2m_ctx); + u32 ltr_count = inst->fw_caps[LTR_COUNT].value; + u32 hfi_id = inst->fw_caps[cap_id].hfi_id; + struct hfi_ltr_mark ltr_mark; + + if (!vb2_is_streaming(sq) && !vb2_is_streaming(dq)) + return -EINVAL; + + if (!ltr_count) + return -EINVAL; + + ltr_mark.mark_frame = inst->fw_caps[cap_id].value; + + return hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_STRUCTURE, + <r_mark, sizeof(ltr_mark)); +} + +int iris_set_ltr_count_gen2(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id) +{ + const struct iris_hfi_command_ops *hfi_ops = inst->core->hfi_ops; + u32 ltr_count = inst->fw_caps[cap_id].value; + u32 hfi_id = inst->fw_caps[cap_id].hfi_id; + + if (!ltr_count) + return -EINVAL; + + if (inst->hfi_rc_type == HFI_RC_CBR_VFR || + inst->hfi_rc_type == HFI_RC_CBR_CFR || + inst->hfi_rc_type == HFI_RC_OFF) { + inst->fw_caps[LTR_COUNT].value = 0; + return -EINVAL; + } + + return hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_U32, + <r_count, sizeof(u32)); +} + +int iris_set_use_and_mark_ltr(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id) +{ + const struct iris_hfi_command_ops *hfi_ops = inst->core->hfi_ops; + struct vb2_queue *sq = v4l2_m2m_get_src_vq(inst->m2m_ctx); + struct vb2_queue *dq = v4l2_m2m_get_dst_vq(inst->m2m_ctx); + u32 ltr_count = inst->fw_caps[LTR_COUNT].value; + u32 hfi_val = inst->fw_caps[cap_id].value; + u32 hfi_id = inst->fw_caps[cap_id].hfi_id; + + if (!vb2_is_streaming(sq) && !vb2_is_streaming(dq)) + return -EINVAL; + + if (!ltr_count || hfi_val == INVALID_DEFAULT_MARK_OR_USE_LTR) + return -EINVAL; + + return hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_U32, + &hfi_val, sizeof(u32)); +} + int iris_set_properties(struct iris_inst *inst, u32 plane) { const struct iris_hfi_command_ops *hfi_ops = inst->core->hfi_ops; diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.h b/drivers/media/platform/qcom/iris/iris_ctrls.h index a0d5338bdc910bd30407132e8b700c333ad74e4c..996c83fdc6f492dc252771129fc1d62e8b7a7e07 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.h +++ b/drivers/media/platform/qcom/iris/iris_ctrls.h @@ -36,6 +36,11 @@ int iris_set_rotation(struct iris_inst *inst, enum platform_inst_fw_cap_type cap int iris_set_flip(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id); int iris_set_ir_period_gen1(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id); int iris_set_ir_period_gen2(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id); +int iris_set_ltr_count_gen1(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id); +int iris_set_ltr_count_gen2(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id); +int iris_set_use_ltr(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id); +int iris_set_mark_ltr(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id); +int iris_set_use_and_mark_ltr(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id); int iris_set_properties(struct iris_inst *inst, u32 plane); #endif diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c b/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c index 4d9632ba86bc8f629cee6d726eb44efcdeba2475..139e7a9321d30d3e348671f99b0fa81afed4827e 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c @@ -693,6 +693,31 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_session_set_property_pkt *p packet->shdr.hdr.size += sizeof(u32) + sizeof(*intra_refresh); break; } + case HFI_PROPERTY_PARAM_VENC_LTRMODE: { + struct hfi_ltr_mode *in = pdata, *ltr_mode = prop_data; + + ltr_mode->mode = in->mode; + ltr_mode->count = in->count; + ltr_mode->trust_mode = in->trust_mode; + packet->shdr.hdr.size += sizeof(u32) + sizeof(*ltr_mode); + break; + } + case HFI_PROPERTY_CONFIG_VENC_USELTRFRAME: { + struct hfi_ltr_use *in = pdata, *ltr_use = prop_data; + + ltr_use->frames = in->frames; + ltr_use->ref_ltr = in->ref_ltr; + ltr_use->use_constrnt = in->use_constrnt; + packet->shdr.hdr.size += sizeof(u32) + sizeof(*ltr_use); + break; + } + case HFI_PROPERTY_CONFIG_VENC_MARKLTRFRAME: { + struct hfi_ltr_mark *in = pdata, *ltr_mark = prop_data; + + ltr_mark->mark_frame = in->mark_frame; + packet->shdr.hdr.size += sizeof(u32) + sizeof(*ltr_mark); + break; + } default: return -EINVAL; } diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen1_defines.h b/drivers/media/platform/qcom/iris/iris_hfi_gen1_defines.h index 04c79ee0463d7f32a2042044fe4564718cc01561..34249fc0d047918c2463517b8303e30df3666b97 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen1_defines.h +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen1_defines.h @@ -147,8 +147,16 @@ #define HFI_INTRA_REFRESH_RANDOM 0x5 #define HFI_PROPERTY_PARAM_VENC_INTRA_REFRESH 0x200500d + +#define HFI_LTR_MODE_DISABLE 0x0 +#define HFI_LTR_MODE_MANUAL 0x1 +#define HFI_LTR_MODE_PERIODIC 0x2 + +#define HFI_PROPERTY_PARAM_VENC_LTRMODE 0x200501c #define HFI_PROPERTY_PARAM_VENC_MAX_NUM_B_FRAMES 0x2005020 #define HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE 0x2006001 +#define HFI_PROPERTY_CONFIG_VENC_MARKLTRFRAME 0x2006009 +#define HFI_PROPERTY_CONFIG_VENC_USELTRFRAME 0x200600a #define HFI_PROPERTY_CONFIG_VENC_SYNC_FRAME_SEQUENCE_HEADER 0x2006008 struct hfi_pkt_hdr { @@ -460,6 +468,22 @@ struct hfi_intra_refresh { u32 mbs; }; +struct hfi_ltr_mode { + u32 mode; + u32 count; + u32 trust_mode; +}; + +struct hfi_ltr_use { + u32 ref_ltr; + u32 use_constrnt; + u32 frames; +}; + +struct hfi_ltr_mark { + u32 mark_frame; +}; + struct hfi_event_data { u32 error; u32 height; diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h b/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h index f6a214a6815420f299be70f80732943d02168f0c..2b8c87c25a066ead30bb1b134bdc3fe1e84e8f05 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h @@ -71,6 +71,9 @@ enum hfi_rate_control { #define HFI_PROP_MIN_QP_PACKED 0x0300012f #define HFI_PROP_MAX_QP_PACKED 0x03000130 #define HFI_PROP_IR_RANDOM_PERIOD 0x03000131 +#define HFI_PROP_LTR_COUNT 0x03000134 +#define HFI_PROP_LTR_MARK 0x03000135 +#define HFI_PROP_LTR_USE 0x03000136 #define HFI_PROP_TOTAL_BITRATE 0x0300013b #define HFI_PROP_MAX_GOP_FRAMES 0x03000146 #define HFI_PROP_MAX_B_FRAMES 0x03000147 diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/drivers/media/platform/qcom/iris/iris_platform_common.h index dd0a4210a2647ff4dadf8d67b71c6f4a22deb548..c48dfb6d47734fadd4f2e4123c93560f55355b86 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -29,6 +29,9 @@ struct iris_inst; #define MAX_QP_HEVC 63 #define DEFAULT_QP 20 #define BITRATE_DEFAULT 20000000 +#define INVALID_DEFAULT_MARK_OR_USE_LTR -1 +#define MAX_LTR_FRAME_COUNT_GEN1 4 +#define MAX_LTR_FRAME_COUNT_GEN2 2 enum stage_type { STAGE_1 = 1, @@ -148,6 +151,9 @@ enum platform_inst_fw_cap_type { VFLIP, IR_TYPE, IR_PERIOD, + LTR_COUNT, + USE_LTR, + MARK_LTR, INST_FW_CAP_MAX, }; diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen1.c b/drivers/media/platform/qcom/iris/iris_platform_gen1.c index 338f33f39cdc09094c63e476572b0a58afc7ef67..6650414fd8b7f127062e95f29203a55b33a43fa2 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen1.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen1.c @@ -249,6 +249,36 @@ static const struct platform_inst_fw_cap inst_fw_cap_sm8250_enc[] = { .flags = CAP_FLAG_OUTPUT_PORT, .set = iris_set_ir_period_gen1, }, + { + .cap_id = LTR_COUNT, + .min = 0, + .max = MAX_LTR_FRAME_COUNT_GEN1, + .step_or_mask = 1, + .value = 0, + .hfi_id = HFI_PROPERTY_PARAM_VENC_LTRMODE, + .flags = CAP_FLAG_OUTPUT_PORT, + .set = iris_set_ltr_count_gen1, + }, + { + .cap_id = USE_LTR, + .min = 0, + .max = ((1 << MAX_LTR_FRAME_COUNT_GEN1) - 1), + .step_or_mask = 0, + .value = 0, + .hfi_id = HFI_PROPERTY_CONFIG_VENC_USELTRFRAME, + .flags = CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + .set = iris_set_use_ltr, + }, + { + .cap_id = MARK_LTR, + .min = 0, + .max = (MAX_LTR_FRAME_COUNT_GEN1 - 1), + .step_or_mask = 1, + .value = 0, + .hfi_id = HFI_PROPERTY_CONFIG_VENC_MARKLTRFRAME, + .flags = CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + .set = iris_set_mark_ltr, + }, }; static struct platform_inst_caps platform_inst_cap_sm8250 = { diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/drivers/media/platform/qcom/iris/iris_platform_gen2.c index b3425dcea22ceadbd56021e5859a24134100d5df..6ae34312f50d4a3709ca20b3aadcfee12338a2f7 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -637,6 +637,36 @@ static const struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = { CAP_FLAG_DYNAMIC_ALLOWED, .set = iris_set_ir_period_gen2, }, + { + .cap_id = LTR_COUNT, + .min = 0, + .max = MAX_LTR_FRAME_COUNT_GEN2, + .step_or_mask = 1, + .value = 0, + .hfi_id = HFI_PROP_LTR_COUNT, + .flags = CAP_FLAG_OUTPUT_PORT, + .set = iris_set_ltr_count_gen2, + }, + { + .cap_id = USE_LTR, + .min = 0, + .max = ((1 << MAX_LTR_FRAME_COUNT_GEN2) - 1), + .step_or_mask = 0, + .value = 0, + .hfi_id = HFI_PROP_LTR_USE, + .flags = CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + .set = iris_set_use_and_mark_ltr, + }, + { + .cap_id = MARK_LTR, + .min = INVALID_DEFAULT_MARK_OR_USE_LTR, + .max = (MAX_LTR_FRAME_COUNT_GEN2 - 1), + .step_or_mask = 1, + .value = INVALID_DEFAULT_MARK_OR_USE_LTR, + .hfi_id = HFI_PROP_LTR_MARK, + .flags = CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + .set = iris_set_use_and_mark_ltr, + }, }; static struct platform_inst_caps platform_inst_cap_sm8550 = { diff --git a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c index 1e54ace966c74956208d88f06837b97b1fd48e17..b7413edfbc5646fbdee6139d1e6897d730e2c8d1 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c +++ b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c @@ -668,6 +668,19 @@ static u32 iris_vpu_enc_bin_size(struct iris_inst *inst) num_vpp_pipes, inst->hfi_rc_type); } +static inline u32 hfi_buffer_get_recon_count(struct iris_inst *inst) +{ + u32 num_ref = 1; + u32 ltr_count; + + ltr_count = inst->fw_caps[LTR_COUNT].value; + + if (ltr_count) + num_ref = num_ref + ltr_count; + + return num_ref; +} + static inline u32 hfi_buffer_comv_enc(u32 frame_width, u32 frame_height, u32 lcu_size, u32 num_recon, u32 standard) @@ -693,7 +706,7 @@ static u32 iris_vpu_enc_comv_size(struct iris_inst *inst) { u32 height = iris_vpu_enc_get_bitstream_height(inst); u32 width = iris_vpu_enc_get_bitstream_width(inst); - u32 num_recon = 1; + u32 num_recon = hfi_buffer_get_recon_count(inst); u32 lcu_size = 16; if (inst->codec == V4L2_PIX_FMT_HEVC) { @@ -1402,10 +1415,9 @@ static u32 iris_vpu_enc_scratch2_size(struct iris_inst *inst) { u32 frame_height = iris_vpu_enc_get_bitstream_height(inst); u32 frame_width = iris_vpu_enc_get_bitstream_width(inst); - u32 num_ref = 1; + u32 num_ref = hfi_buffer_get_recon_count(inst); - return hfi_buffer_scratch2_enc(frame_width, frame_height, num_ref, - false); + return hfi_buffer_scratch2_enc(frame_width, frame_height, num_ref, false); } static u32 iris_vpu_enc_vpss_size(struct iris_inst *inst) -- 2.43.0