From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-180.mta0.migadu.com (out-180.mta0.migadu.com [91.218.175.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3317554739 for ; Thu, 12 Mar 2026 00:58:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.180 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773277088; cv=none; b=JXgpN2tM0GXig3Ua6IxeSJ50x5fGnWLsjkRV0xYSH+x+j0iq5gYzzHLqbTm+38Dq63bynO9sbAUiyIBOu2tvY8PLDxQ46wWruU/Un1ZlYPeR2/YvVKBTs7AW7mhXmyhKdavtwf8jR7sgOQfGdHHu6KNNswsVowsvK8DsN4a8GsY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773277088; c=relaxed/simple; bh=KLGJUjz5sg/Q4Fg5EfUjCn3JO4fg1VjNIOzOrd20dJc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hN2402l/P2TzQuE+tTB9qMM1haKMyCwonAHkzGUkP6MCxwBf6tscEbMGplsLjVRf8Qyg7uZyqusrjo0K7sBos8/kFbPbTsnY7z782WnOuK7gk7y0ucC9Rnehg+BfoXhAsiF8aWqTn/R0ICoeIZ1tkbQxtvhU0XtIXN5AukFNems= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=oSbNLybD; arc=none smtp.client-ip=91.218.175.180 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="oSbNLybD" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1773277085; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=2CioL+3mGv+qdGBiMKwi58K8rdc7pcS3HJI4wKWNgDs=; b=oSbNLybDNMMkq1JfsBgTrGi1Ypa6Buf+Bv+ffimGvVITzLiCor5hCIh0h4xAPZ8Rh1Ypjr C6e4/LDw7uojEv3tTcnVBh0lccmwjFtWsl60YyiCSbmA51F7hGimkmzc70opDeqSyhYFXS PhFTAf/wLW5r/dPaj1714ZUUj0YM1xeLTV9KCuTheWxWvQPnc+sUwvH4nNZC+eHNzlQhf3 v9zShQ/GEctvdjELD/UDY19H2jEUHpzXo/wQCZ3O0FOhufgRsG/OSvf9MyNKsLiidneR92 DWNScYX8NUKc1KbzrUJJL2mB3puAU/vEFsKDAxR0OwBWHb1VHe4fxN7aarwOqg== From: Val Packett To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Laurentiu Tudor , Val Packett , "Bryan O'Donoghue" Cc: Konrad Dybcio , Abel Vesa , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 2/2] arm64: dts: qcom: x1-dell-thena: remove i2c20 (battery SMBus) and reserve its pins Date: Wed, 11 Mar 2026 21:53:37 -0300 Message-ID: <20260312005731.12488-2-val@packett.cool> In-Reply-To: <20260312005731.12488-1-val@packett.cool> References: <20260312005731.12488-1-val@packett.cool> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Migadu-Flow: FLOW_OUT i2c20 is used by the battmgr service on the ADSP to communicate with the SBS interface of the battery. Initializing it from Linux would break the battmgr functionality when booted in EL2. Mark those pins as reserved. Fixes: e7733b42111c ("arm64: dts: qcom: Add support for Dell Inspiron 7441 / Latitude 7455") Reviewed-by: Konrad Dybcio Reviewed-by: Abel Vesa Signed-off-by: Val Packett --- v4: Pull R-b v3: https://lore.kernel.org/all/20260228205818.13016-2-val@packett.cool/ v2: https://lore.kernel.org/all/20260210175001.7691-2-val@packett.cool/ v1: doesn't exist. oops, at v1 this wasn't a series, just the PCIe GPIO patch --- arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi b/arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi index d5018fdbdedb..967535b2bce7 100644 --- a/arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi +++ b/arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi @@ -982,12 +982,6 @@ &i2c8 { status = "okay"; }; -&i2c20 { - clock-frequency = <400000>; - - status = "okay"; -}; - &lpass_tlmm { spkr_01_sd_n_active: spkr-01-sd-n-active-state { pins = "gpio12"; @@ -1308,6 +1302,7 @@ right_tweeter: speaker@0,1 { &tlmm { gpio-reserved-ranges = <44 4>, /* SPI11 (TPM) */ <76 4>, /* SPI19 (TZ Protected) */ + <80 2>, /* I2C20 (Battery SMBus) */ <238 1>; /* UFS Reset */ cam_rgb_default: cam-rgb-default-state { -- 2.52.0