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Mon, 04 May 2026 12:08:31 -0700 (PDT) X-Received: by 2002:a05:6a20:4326:b0:398:8870:b58f with SMTP id adf61e73a8af0-3a7f1ad133amr11856247637.14.1777921711051; Mon, 04 May 2026 12:08:31 -0700 (PDT) Received: from localhost ([2601:1c0:5000:d5c:4ec8:83f5:8254:6891]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c7ffbc8ad8dsm10017506a12.23.2026.05.04.12.08.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2026 12:08:30 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, Akhil P Oommen , Rob Clark , Sean Paul , Konrad Dybcio , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Marijn Suijten , David Airlie , Simona Vetter , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v3 06/16] drm/msm: Add a6xx+ perfcntr tables Date: Mon, 4 May 2026 12:06:49 -0700 Message-ID: <20260504190751.61052-7-robin.clark@oss.qualcomm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260504190751.61052-1-robin.clark@oss.qualcomm.com> References: <20260504190751.61052-1-robin.clark@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: uq4SCa555nLoQk2us5QtaZFJpJi8N50W X-Authority-Analysis: v=2.4 cv=Z+vc2nRA c=1 sm=1 tr=0 ts=69f8eeb0 cx=c_pps a=Qgeoaf8Lrialg5Z894R3/Q==:117 a=xqWC_Br6kY4A:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=UuwE4gOO9k-hs8zF27AA:9 a=x9snwWr2DeNwDh03kgHS:22 X-Proofpoint-GUID: uq4SCa555nLoQk2us5QtaZFJpJi8N50W X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTA0MDE3NSBTYWx0ZWRfX7EH18h1DpySX FOX020qC4H8vU8u9pbxr//Ne7buXSGRsg3dNupL+LU+zMbwF+S7rPqMOZRtlJJ/bCbnLR7OCR7q uMhM0wfWN+BEAm+vsNl8H88pAdjMyJuVrLwY3G/Lbfx4pDLSUG5agqgWx4RTwO6M3GITjYtHeN2 YFq+YLtGKNhQiUwIxCdpWu39aOvy7bN2F2NJs+DU64xgWoR7uQBF5xbR0eVANKaSIbMYsJyOCAd i+qP5SVys2bIxnIfvoFwFxxidvuXPvNyuSwfAD5aSBlDcj/Q7EEZWeHs2qvdqI0DHBBz20N3sYJ NAppucUGcU36TjfY4m+kfESvUMXXnxEsl4+gNrP1N8y/U3EsTD8J1Bq0PJLU8mhRFQJGtqwJhxM reaFK9YGaEiy40mYCpUhxnGmP2LDegSc2QKvjIlzwzOZhSTaY2zcwFWNPAAIa85IvhUulNrJ/Gj nEkIi3Hb8M4sjaJRAJQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-04_05,2026-04-30_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 phishscore=0 adultscore=0 impostorscore=0 malwarescore=0 bulkscore=0 priorityscore=1501 lowpriorityscore=0 suspectscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2605040175 Wire up the generated perfcntr tables for a6xx+. The PERFCNTR_CONFIG ioctl will use this information to assign counters. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 15 +++++++++++++++ drivers/gpu/drm/msm/msm_gpu.h | 4 ++++ drivers/gpu/drm/msm/msm_perfcntr.h | 9 +++++++++ 3 files changed, 28 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index e578417a4949..727281fbef36 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -5,6 +5,7 @@ #include "msm_gem.h" #include "msm_mmu.h" #include "msm_gpu_trace.h" +#include "msm_perfcntr.h" #include "a6xx_gpu.h" #include "a6xx_gmu.xml.h" @@ -2637,6 +2638,20 @@ static struct msm_gpu *a6xx_gpu_init(struct drm_device *dev) adreno_gpu = &a6xx_gpu->base; gpu = &adreno_gpu->base; + if ((ADRENO_6XX_GEN1 <= config->info->family) && + (config->info->family <= ADRENO_6XX_GEN4)) { + gpu->perfcntr_groups = a6xx_perfcntr_groups; + gpu->num_perfcntr_groups = a6xx_num_perfcntr_groups; + } else if ((ADRENO_7XX_GEN1 <= config->info->family) && + (config->info->family <= ADRENO_7XX_GEN3)) { + gpu->perfcntr_groups = a7xx_perfcntr_groups; + gpu->num_perfcntr_groups = a7xx_num_perfcntr_groups; + } else if ((ADRENO_8XX_GEN1 <= config->info->family) && + (config->info->family <= ADRENO_8XX_GEN2)) { + gpu->perfcntr_groups = a8xx_perfcntr_groups; + gpu->num_perfcntr_groups = a8xx_num_perfcntr_groups; + } + mutex_init(&a6xx_gpu->gmu.lock); spin_lock_init(&a6xx_gpu->aperture_lock); diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index 78e1478669be..8c08dc065372 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -24,6 +24,7 @@ struct msm_gem_submit; struct msm_gem_vm_log_entry; struct msm_gpu_state; struct msm_context; +struct msm_perfcntr_group; struct msm_gpu_config { const char *ioname; @@ -262,6 +263,9 @@ struct msm_gpu { bool allow_relocs; struct thermal_cooling_device *cooling; + + const struct msm_perfcntr_group *perfcntr_groups; + unsigned num_perfcntr_groups; }; static inline struct msm_gpu *dev_to_gpu(struct device *dev) diff --git a/drivers/gpu/drm/msm/msm_perfcntr.h b/drivers/gpu/drm/msm/msm_perfcntr.h index 305dcde15c5e..64a5d29feba1 100644 --- a/drivers/gpu/drm/msm/msm_perfcntr.h +++ b/drivers/gpu/drm/msm/msm_perfcntr.h @@ -35,6 +35,15 @@ struct msm_perfcntr_group { const struct msm_perfcntr_counter *counters; }; +extern const struct msm_perfcntr_group a6xx_perfcntr_groups[]; +extern const unsigned a6xx_num_perfcntr_groups; + +extern const struct msm_perfcntr_group a7xx_perfcntr_groups[]; +extern const unsigned a7xx_num_perfcntr_groups; + +extern const struct msm_perfcntr_group a8xx_perfcntr_groups[]; +extern const unsigned a8xx_num_perfcntr_groups; + #define GROUP(_name, _pipe, _counters, _countables) { \ .name = _name, \ .pipe = _pipe, \ -- 2.54.0