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Fri, 23 Oct 2026 05:36:06 -0700 (PDT) Received: from DESKTOP-NM9EKIA ([125.134.240.130]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-cd8ba8a5342sm684757a12.17.2026.10.23.05.36.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Oct 2026 05:36:05 -0700 (PDT) From: Joonhoe Kim <26rote@gmail.com> To: sashiko-reviews@lists.linux.dev Cc: sashiko-bot@kernel.org, vkoul@kernel.org, neil.armstrong@linaro.org, olteanv@gmail.com, mani@kernel.org, konrad.dybcio@oss.qualcomm.com, dmitry.baryshkov@oss.qualcomm.com, val@packett.cool, wesley.cheng@oss.qualcomm.com, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] phy: qcom: qmp-combo: Leave the USB PCS alone in DP-only mode Date: Fri, 23 Oct 2026 21:36:00 +0900 Message-ID: <20261023123601.374-1-26rote@gmail.com> X-Mailer: git-send-email 2.55.0.windows.5 In-Reply-To: References: <20261022165219.1368-1-26rote@gmail.com> X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit On Thu, 22 Oct 2026 17:07:04 +0000, Sashiko AI review wrote: > - [High] phy: qcom: qmp-combo: qmp_combo_typec_switch_set() powers USB in DP-only mode [...] > Would this overwrite the serdes, lane, and PCS tables, time out waiting > for PHYSTATUS, and call clk_disable_unprepare(qmp->pipe_clk) on the > error path while qmp->init_count remains non-zero? [...] > Should both qmp_combo_typec_switch_set() and the power-off path in > qmp_combo_reconfigure_phy() also skip the USB PCS when qmp->qmpphy_mode is > QMPPHY_MODE_DP_ONLY? Yes. Since 89563a152973 ("phy: qualcomm: qmp-combo: Add preliminary USB4 support") the mux keeps usb_init_count when it enters DP-only mode, so an orientation change in that mode already re-ran the USB PCS power-on over the DisplayPort configuration before this patch. v2 skips the USB PCS in qmp_combo_typec_switch_set() as well. The power-off in qmp_combo_reconfigure_phy() when leaving DP-only mode only asserts SW_RESET, clears the start bits and puts the PCS into power-down, which it already is in DP-only mode, so it is harmless, but v2 skips it too for consistency. The pipe_clk handling on the error path of qmp_combo_usb_power_on() is a separate issue: pipe_clk is enabled in qmp_combo_com_init() and disabled in qmp_combo_com_exit(), so disabling it on a PHYSTATUS timeout leaves it unbalanced whatever the mode. This patch does not change that. v2: https://lore.kernel.org/all/20261023123512.1912-1-26rote@gmail.com/ Thanks, Joonhoe Kim